公开(公告)号：EP1495365A4

公开(公告)日：2009-06-03

申请号：EP03723925

申请日：2003-04-01

Applicant: IBM

Inventor： PFEIFFER DIRK ,  ANGELOPOULOS MARIE ,  BABICH KATHERINA ,  BROCK PHILLIP ,  HUANG WU-SONG ,  MAHOROWALA ARPAN P ,  MEDEIROS DAVID R ,  SOORIYAKUMARAN RATNAM

IPC: G03F7/11 ,  G03F7/004 ,  G03F7/038 ,  G03F7/075 ,  G03F7/09 ,  H01L21/027 ,  G03F7/00 ,  G03F7/26 ,  H01L21/312

CPC classification number: H01L21/0276 ,  G03F7/0045 ,  G03F7/0757 ,  G03F7/091 ,  Y10S430/151

Abstract: Antireflective compositions characterized by the presence of an SiO-containing polymer having chromophore moieties and transparent moieties are useful antireflective hardmask compositions in lithographic processes. These compositions provide outstanding optical, mechanical and etch selectivity properties while being applicable using spin-on application techniques. The compositions of the invention are advantagously useful with shorter wavelenght lithographic processes and/or have minimal residual acid content.

公开(公告)号：EP1497699A4

公开(公告)日：2008-07-09

申请号：EP03716998

申请日：2003-04-07

Applicant: IBM

Inventor： ANGELOPOULOS MARIE ,  BABICH KATHERINA ,  CHEY S JAY ,  HIBBS MICHAEL STRAIGHT ,  LANG ROBERT N ,  MAHOROWALA ARPAN PRAVIN ,  RACETTE KENNETH CHRISTOPHER

IPC: G03F1/32 ,  C23C14/06 ,  C23C14/08 ,  H01L21/027 ,  G03F9/00 ,  C23C14/00 ,  C23C14/32 ,  G03C5/00 ,  G03F1/08

CPC classification number: G03F1/32 ,  C23C14/0676 ,  C23C14/08

Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001 % up to 15 % at 157 nm) is obtained by this process.

公开(公告)号：WO02069037A2

公开(公告)日：2002-09-06

申请号：PCT/GB0200450

申请日：2002-02-01

Applicant: IBM ,  IBM UK

Inventor： ANGELOPOULOS MARIE ,  BABICH KATHERINA ,  BROOKS CAMERON JAMES ,  CHEY JAY ,  GUARNIERI RICHARD ,  HIBBS MICHAEL STRAIGHT ,  RACETTE KENNETH CHRISTOPHER

IPC: G03F1/32 ,  C23C14/06 ,  C23C14/35 ,  G03F7/16 ,  G03F1/00 ,  G03F1/08

CPC classification number: G03F1/32 ,  C23C14/0641 ,  C23C14/0676 ,  C23C14/352 ,  G03F7/16 ,  Y10T428/265

Abstract: An attenuating embedded phase shift photomask blank that produce s a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen or metal, silicon, nitrogen and oxygen. A wide range of optical transmission (0.001 % up to 20 % at 193 nm) is obtained by this process. A post deposition process is implemented to obtain the desired properties (stability of optical properties with respect to laser irradiation and acid treatment) for use in industry. A special fabrication process for the sputter target is implemented to lower the defects of the film.

Abstract translation: 使用由金属，硅，氮或金属，硅，氮和氧制成的光学半透明的膜形成产生透射光的相移的衰减的嵌入式相移光掩模坯料。 通过该方法获得宽范围的光学透射（0.001nm至高达193nm的20％）。 实现后沉积工艺以获得用于工业中的所需性能（相对于激光照射和酸处理的光学性质的稳定性）。 实现用于溅射靶的特殊制造工艺以降低膜的缺陷。

公开(公告)号：WO2010020578A4

公开(公告)日：2010-04-15

申请号：PCT/EP2009060484

申请日：2009-08-13

Applicant: IBM ,  IBM UK ,  BABICH KATHERINA ,  CHANG JOSEPHINE ,  FULLER NICHOLAS ,  GUILLORN MICHAEL ,  LAUER ISAAC ,  ROOKS MICHAEL

Inventor： BABICH KATHERINA ,  CHANG JOSEPHINE ,  FULLER NICHOLAS ,  GUILLORN MICHAEL ,  LAUER ISAAC ,  ROOKS MICHAEL

IPC: H01L21/60 ,  H01L21/768

CPC classification number: H01L21/76897 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating a transistor having self-aligned borderless electrical contacts is disclosed. A gate stack (102, 103) is formed on a silicon region (104). An off-set spacer (112, 114) is formed surrounding the gate stack. A sacrificial layer (222) that includes a carbon-based film is deposited overlying the silicon region, the gate stack, and the off-set spacer. A pattern (326) is defined in the sacrificial layer to define a contact area for the electrical contact. The pattern exposes at least a portion of the gate stack and source/drain. A dielectric layer (530) is deposited overlying the sacrificial layer that has been patterned and the portion of the gate stack that has been exposed. The sacrificial layer that has been patterned is selectively removed to define the contact area at the height that has been defined. The contact area for the height that has been defined is metalized to form the electrical contact.

Abstract translation: 公开了一种用于制造具有自对准无边界电触点的晶体管的方法。 栅极堆叠（102,103）形成在硅区域（104）上。 偏置间隔物（112,114）围绕栅极叠层形成。 包括基于碳的膜的牺牲层（222）被沉积为覆盖硅区域，栅极叠层和偏移间隔物。 图案（326）被限定在牺牲层中以限定用于电接触的接触区域。 该图案暴露出栅极叠层和源极/漏极的至少一部分。 沉积介电层（530），覆盖已经被图案化的牺牲层和已经暴露的栅极叠层的部分。 已经被图案化的牺牲层被选择性地去除以限定在已经限定的高度处的接触区域。 已经定义的高度的接触区域被金属化以形成电接触。

公开(公告)号：JP2005070776A

公开(公告)日：2005-03-17

申请号：JP2004237692

申请日：2004-08-17

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BABICH KATHERINA ,  HUANG ELBERT ,  MAHOROWALA ARPAN P ,  MEDEIROS DAVID R ,  PFEIFFER DIRK ,  TEMPLE KAREN

IPC: G03F7/11 ,  G03F7/00 ,  G03F7/004 ,  G03F7/075 ,  G03F7/09 ,  H01L21/027 ,  H01L21/32 ,  H01L21/3205 ,  H01L21/3213

CPC classification number: G03F7/091 ,  G03F7/0045 ,  G03F7/0757 ,  H01L21/0274 ,  H01L21/32139 ,  Y10S430/106 ,  Y10S430/115 ,  Y10S430/143 ,  Y10S430/151

Abstract: PROBLEM TO BE SOLVED: To provide an antireflective hardmask composition and a method for using the antireflective hardmask composition for processing a semiconductor device.
SOLUTION: The antireflective hardmask composition for lithography is obtained. The antireflective hardmask composition contains a carbosilane polymer backbone comprising at least one kind of chromophore moiety and at least one kind of transparent moiety and a crosslinking component. The method for processing a semiconductor device is provided. The method comprises steps of: providing a material layer on a substrate; and forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer contains a carbosilane polymer backbone comprising at least one kind of chromophore moiety and at least one kind of transparent moiety and a crosslinking component.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种抗反射硬掩模组​​合物和使用用于加工半导体器件的抗反射硬掩模组​​合物的方法。 解决方案：获得用于光刻的抗反射硬掩模组​​合物。 防反射硬质组合物含有包含至少一种发色团部分和至少一种透明部分和交联组分的碳硅烷聚合物主链。 提供了一种用于处理半导体器件的方法。 该方法包括以下步骤：在衬底上提供材料层; 以及在所述材料层上形成抗反射硬掩模层。 抗反射硬掩模层包含含有至少一种发色团部分和至少一种透明部分和交联组分的碳硅烷聚合物主链。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005055893A

公开(公告)日：2005-03-03

申请号：JP2004223337

申请日：2004-07-30

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BABICH KATHERINA ,  MAHOROWALA ARPAN P ,  MEDEIROS DAVID R ,  PFEIFFER DIRK

IPC: G03F7/11 ,  G03C3/00 ,  G03F1/14 ,  G03F7/004 ,  G03F7/075 ,  G03F7/09 ,  G03F7/20 ,  H01L21/00 ,  H01L21/027 ,  H01L21/312 ,  H01L21/3213

CPC classification number: G03F7/091 ,  G03F7/0757 ,  H01L21/0274 ,  H01L21/0276 ,  H01L21/32139

Abstract: PROBLEM TO BE SOLVED: To provide a composition and techniques for processing a semiconductor device, more particularly, to provide an antireflective hardmask composition in one aspect of the invention and to provide a method for processing a semiconductor device in another aspect.
SOLUTION: The composition contains a fully condensed polyhedral oligosilsesquioxane, {RSiO
1.5 }
n , wherein n equals 8; and at least one chromophore moiety and transparent moiety. The method comprises steps of: providing a material layer on a substrate; and forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO
1.5 }
n , wherein n equals 8; and at least one chromophore moiety and transparent moiety.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 解决的问题：提供一种用于处理半导体器件的组合物和技术，更具体地，提供在本发明的一个方面中的抗反射硬掩模组​​合物，并提供另一方面的半导体器件的处理方法。 解决方案：组合物含有完全缩合的多面体寡聚倍半硅氧烷，其中n等于8; 和至少一个发色团部分和透明部分。 该方法包括以下步骤：在衬底上提供材料层; 以及在所述材料层上形成抗反射硬掩模层。 抗反射硬掩模层包括完全冷凝的多面体低聚倍半硅氧烷，其中n等于8; 和至少一个发色团部分和透明部分。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：DE112010003451T8

公开(公告)日：2013-01-10

申请号：DE112010003451

申请日：2010-08-05

Applicant: IBM

Inventor： CALLEGARI ALESSANDRO ,  BABICH KATHERINA ,  O'SULLIVAN EUGENE ,  CONNOLLY JOHN

IPC: H01L21/768 ,  H01L23/532

公开(公告)号：WO2005047564A3

公开(公告)日：2005-09-15

申请号：PCT/US2004033864

申请日：2004-10-15

Applicant: TOKYO ELECTRON LTD ,  IBM ,  FUKIAGE NORIAKI ,  BABICH KATHERINA

Inventor： FUKIAGE NORIAKI ,  BABICH KATHERINA

IPC: C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  C23C16/509 ,  C23C16/56 ,  G03F7/09 ,  H01L21/027 ,  H01L21/033 ,  C23C16/50 ,  C23C16/30

CPC classification number: C23C16/56 ,  C23C16/401 ,  C23C16/45523 ,  C23C16/5096 ,  G03F7/091 ,  H01J2237/3321

Abstract: A method and apparatus for improving the post-development photoresist profile on a deposited dielectric film. The method includes depositing a TERA film having tunable optical and etch resistant properties on a substrate using a plasma-enhanced chemical vapor deposition process and post processing the TERA film using a plasma process. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple precursors and process gasses.

Abstract translation: 一种用于改善沉积介电膜上的显影后光刻胶轮廓的方法和设备。 该方法包括使用等离子体增强化学气相沉积工艺在衬底上沉积具有可调光学和抗蚀刻性能的TERA膜，并使用等离子体工艺后处理TERA膜。 该设备包括腔室，该腔室具有耦合到第一RF源的上电极和耦合到第二RF源的衬底支架; 以及用于提供多种前体和工艺气体的喷头。

公开(公告)号：AU2003230825A1

公开(公告)日：2003-11-03

申请号：AU2003230825

申请日：2003-04-01

Applicant: IBM

Inventor： ANGELOPOULOS MARIE ,  BABICH KATHERINA ,  BROCK PHILLIP ,  HUANG WU-SONG ,  MAHOROWALA ARPAN P ,  MEDEIROS DAVID R ,  SOORIYAKUMARAN RATNAM ,  PFEIFFER DIRK

IPC: G03F7/11 ,  G03F7/004 ,  G03F7/038 ,  G03F7/075 ,  G03F7/09 ,  H01L21/027 ,  G03F7/00 ,  G03F7/26

Abstract: Antireflective compositions characterized by the presence of an SiO-containing polymer having chromophore moieties and transparent moieties are useful antireflective hardmask compositions in lithographic processes. These compositions provide outstanding optical, mechanical and etch selectivity properties while being applicable using spin-on application techniques. The compositions of the invention are advantageously useful with shorter wavelength lithographic processes and/or have minimal residual acid content.

公开(公告)号：DE112010003451B4

公开(公告)日：2015-01-22

申请号：DE112010003451

申请日：2010-08-05

Applicant: IBM

Inventor： CALLEGARI ALESSANDRO ,  BABICH KATHERINA ,  O'SULLIVAN EUGENE ,  CONNOLLY JOHN

IPC: H01L21/768 ,  H01L23/532

Abstract: Verfahren zum selektiven Züchten von Kohlenstoffnanoröhren (44), das folgende Schritte umfasst: Bilden (100) einer Isolierschicht (10) auf einem Substrat (12), wobei die Isolierschicht (10) eine obere Fläche (14) aufweist; Bilden (102) eines Durchgangskontaktes (18) in der Isolierschicht (10); Bilden (104) einer aktiven Metallschicht (30) auf der Isolierschicht (10); Abtragen der aktiven Metallschicht (30) von Teilen der oberen Fläche (14) mittels eines Ionenstrahls (40), der unter einem flachen Winkel auftrifft, wobei der flache Winkel in einem Bereich von –1 Grad bis –45 Grad liegt, um das Abtragen der aktiven Schicht von einem Bodenteil des Durchgangskontaktes (18) zu verhindern; Zuführen eines kohlenstoffhaltigen Gases zum Durchgangskontakt (18), um eine einzelne Kohlenstoffnanoröhre zu bilden; und Anwenden eines zweiten Ionenstrahls (42) unter einem steilen Winkel zur aktiven Metallschicht (30) innerhalb des Durchgangskontaktes (18), wobei der steile Winkel in einem Bereich von ungefähr –46 Grad bis ungefähr –90 Grad liegt, um das selektive Wachstum einer einzelnen Kohlenstoffnanoröhre (44) innerhalb des Durchgangskontaktes (18) zu ermöglichen.