公开(公告)号：EP1560949A4

公开(公告)日：2007-02-28

申请号：EP03783387

申请日：2003-11-14

Applicant: IBM

Inventor： ECONOMIKOS LAERTIS ,  DELIGIANNI HARIKLIA ,  COTTE JOHN M ,  GRABARZ HENRY J ,  CHEN BOMY

IPC: C25D5/48 ,  C25D7/12 ,  H01L21/288 ,  H01L21/321 ,  H01L21/768 ,  C25D5/22 ,  C25D17/00

CPC classification number: C25D7/123 ,  C25D5/48 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/32125 ,  H01L21/7684 ,  Y10S205/917

Abstract: A method and apparatus are described for performing both electroplating of a metal layer and CMP planarization of the layer on a substrate. The apparatus includes a table (10) supporting a polishing pad (20); the table and pad have a plurality of holes (210, 220) forming channels for dispensing an electroplating solution onto the pad. Electroplating anodes (201, 202, 203) are disposed in the channels and in contact with the electroplating solution. A carrier (12) holds the substrate (1) substantially parallel to the top surface of the pad (20) and applies variable mechanical force on the substrate against the pad, so that the spacing between substrate and pad may be less during electroplating than during electroetching.

公开(公告)号：WO2004053922A3

公开(公告)日：2004-09-10

申请号：PCT/GB0305265

申请日：2003-12-02

Applicant: IBM ,  IBM UK

Inventor： WISE RICHARD ,  YAN HONGWEN ,  JI BRIAN ,  PANDA SIDDHARTHA ,  CHEN BOMY

IPC: H01J37/32

CPC classification number: H01J37/32623 ,  H01J37/3266

Abstract: A plasma etching system having a wafer chuck with a magnet that applies a magnetic field over a wafer to shield the wafer from charged particles. The magnetic field is parallel with the wafer, and is strongest near the wafer surface. The magnetic field may be straight, or circular. In operation, electrons are deflected from the wafer by the Lorentz force, the wafer acquires a positive charge, and ions are deflected by electrostatic repulsion. Neutral species are allowed through the magnetic field, and they collide with the wafer. Neutral species generally provide more isotropic and material-selective etching than charged particles, so the present magnetic field tends to increase etch isotropy and material selectivity. Also, the magnetic field can protect the wafer from seasoning processes designed to clean unwanted films from the chamber surface as seasoning processes typically rely on etching by charged particles

Abstract translation: 一种等离子体蚀刻系统，其具有带磁体的晶圆吸盘，该磁体在晶圆上施加磁场以将晶圆从带电粒子屏蔽。 磁场与晶圆平行，在晶圆表面附近最强。 磁场可以是直的，也可以是圆形的。 在操作中，电子通过洛伦兹力从晶片偏转，晶片获得正电荷，并且离子通过静电排斥偏转。 允许中性物质通过磁场，并与晶圆碰撞。 中性物质通常提供比带电粒子更多的各向同性和材料选择性蚀刻，因此目前的磁场倾向于增加蚀刻各向同性和材料选择性。 而且，磁场可以保护晶片避免设计成从腔室表面清洗不需要的膜的调味过程，因为调味过程通常依赖于带电粒子的蚀刻

公开(公告)号：WO0143197A3

公开(公告)日：2002-01-24

申请号：PCT/US0033564

申请日：2000-12-12

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： SRINIVASAN SENTHIL ,  CHEN BOMY

IPC: H01L21/336 ,  H01L29/06 ,  H01L21/8234 ,  H01L27/06

CPC classification number: H01L29/66636 ,  H01L29/0653

Abstract: Source and drain regions (6, 7) of field effect transistors are fabricated with an electrically insulating layer (8, 9) formed thereunder so as to reduce junction capacitance between each and a semiconductor body in which the regions are formed. Shallow trench isolation (5) partially surrounds each transistor so as to further electrically isolate the source and drain regions from the semiconductor body. In one embodiment for a single transistor only one surface of each drain and source region make direct contact to the semiconductor body (3) and these surfaces are on opposite sides of a channel region of each transistor. One embodiment contains two transistors having a common output region.

Abstract translation: 场效应晶体管的源极和漏极区（6,7）由其下面形成的电绝缘层（8,9）制成，以便减小其中形成区域的半导体本体之间的结电容。 浅沟槽隔离（5）部分地围绕每个晶体管，以进一步将源极和漏极区域与半导体本体电隔离。 在单个晶体管的一个实施例中，每个漏极和源极区域的仅一个表面与半导体本体（3）直接接触，并且这些表面位于每个晶体管的沟道区域的相对侧上。 一个实施例包含具有公共输出区域的两个晶体管。

公开(公告)号：JP2010251799A

公开(公告)日：2010-11-04

申请号：JP2010167117

申请日：2010-07-26

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： WISE RICHARD ,  YAN HONGWEN ,  JI BRIAN ,  PANDA SIDDHARTHA ,  CHEN BOMY

IPC: H01L21/3065 ,  H01J37/32 ,  H01L21/304

CPC classification number: H01J37/32623 ,  H01J37/3266

Abstract: PROBLEM TO BE SOLVED: To provide a plasma etching system having a wafer chuck including a magnet that applies a magnetic field over a wafer to shield the wafer from charged particles.
SOLUTION: The magnetic field is parallel to the wafer, and the intensity thereof is highest near the wafer surface. The magnetic field may be straight, or circular. In operation, electrons are deflected from the wafer by the Lorentz force, the wafer is positively charged, and ions are deflected by electrostatic repulsion. Neutral chemical species are allowed to pass through the magnetic field, and collide with the wafer. Neutral chemical species generally provide higher isotropic and material-selective etching than charged particles, so that this magnetic field tends to increase etching isotropy and material selectivity. The magnetic field can protect the wafer from seasoning processes designed to remove unwanted films from the chamber surface because seasoning processes generally rely on etching by charged particles.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种具有晶片卡盘的等离子体蚀刻系统，该晶片卡盘包括在晶片上施加磁场以使晶片免受带电粒子的磁体。

解决方案：磁场平行于晶片，其强度在晶片表面附近最高。 磁场可以是直的或圆形的。 在操作中，电子通过洛仑兹力从晶片偏转，晶片带正电，离子被静电排斥偏转。 允许中性化学物质通过磁场，并与晶片碰撞。 中性化学物质通常提供比带电粒子更高的各向同性和材料选择性蚀刻，使得该磁场倾向于增加蚀刻各向同性和材料选择性。 磁场可以保护晶片免受设计用于从腔室表面去除不需要的膜的调味过程，因为调味过程通常依赖于带电粒子的蚀刻。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：WO0143198A3

公开(公告)日：2002-01-31

申请号：PCT/US0033642

申请日：2000-12-12

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： SRINIVASAN SENTHIL ,  CHEN BOMY

IPC: H01L21/336 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06

CPC classification number: H01L29/66636 ,  H01L21/76264 ,  H01L21/76283 ,  H01L21/823425 ,  H01L29/0653

Abstract: Source (7) and drain (6) regions of field effect transistors are fabricated with an electrically insulating layer (8, 9) formed thereunder so as to reduce junction capacitance between each and a semiconductor body (3) in which the regions are formed. One method of fabrication of the source and drain regions is to form an isolating isolation region (5) around active areas in which a transistor is to be formed in a semiconductor body. Trenches separated by portions of the body are then formed in the active areas in which transistors are to be formed. On bottom surfaces of the trenches are formed an electrically insulating layer. The trenches are then filled with semiconductor material of a conductivity type opposite that of the semiconductor body. The semiconductor filled portion of each trench then serves as a drain and/or source (6, 7) of a field effect transistor.

Abstract translation: 场效应晶体管的源极（7）和漏极（6）区域由其下形成的电绝缘层（8,9）制成，以便减小其中形成区域的半导体本体（3）之间的结电容。 源极和漏极区域的一种制造方法是在半导体本体内形成晶体管的有源区域周围形成隔离隔离区域（5）。 然后在其中将形成晶体管的有源区域中形成由身体的部分分开的沟槽。 在沟槽的底表面上形成电绝缘层。 然后用与半导体本体相反的导电类型的半导体材料填充沟槽。 然后，每个沟槽的半导体填充部分用作场效应晶体管的漏极和/或源极（6,7）。

公开(公告)号：AU2003285581A1

公开(公告)日：2004-06-30

申请号：AU2003285581

申请日：2003-12-02

Applicant: IBM

Inventor： WISE RICHARD ,  YAN HONGWEN ,  JI BRIAN ,  PANDA SIDDHARTHA ,  CHEN BOMY

IPC: H01J37/32

Abstract: A plasma etching system having a wafer chuck with a magnet that applies a magnetic field over a wafer to shield the wafer from charged particles. The magnetic field is parallel with the wafer, and is strongest near the wafer surface. The magnetic field may be straight, or circular. In operation, electrons are deflected from the wafer by the Lorentz force, the wafer acquires a positive charge, and ions are deflected by electrostatic repulsion. Neutral species are allowed through the magnetic field, and they collide with the wafer. Neutral species generally provide more isotropic and material-selective etching than charged particles, so the present magnetic field tends to increase etch isotropy and material selectivity. Also, the magnetic field can protect the wafer from seasoning processes designed to clean unwanted films from the chamber surface as seasoning processes typically rely on etching by charged particles.

公开(公告)号：AT504079T

公开(公告)日：2011-04-15

申请号：AT05746299

申请日：2005-04-21

Applicant: IBM

Inventor： WISE RICHARD ,  CHEN BOMY ,  HAKEY MARK ,  YAN HONGWEN

IPC: H01L21/4763 ,  H01L21/44 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A method of forming a wiring structure for an integrated circuit includes the steps of forming a plurality of features in a layer of dielectric material, and forming spacers on sidewalls of the features. Conductors are then formed in the features, being separated from the sidewalls by the spacers. The spacers are then removed, forming air gaps at the sidewalls so that the conductors are separated from the sidewalls by the air gaps. Dielectric layers above and below the conductors may be low-k dielectrics having a dielectric constant less than that of the dielectric between the conductors. A cross-section of each of the conductors has a bottom in contact with the a low-k dielectric layer, a top in contact with another low-k dielectric, and sides in contact only with the air gaps. The air gaps serve to reduce the intralevel capacitance.

公开(公告)号：DE60329621D1

公开(公告)日：2009-11-19

申请号：DE60329621

申请日：2003-11-14

Applicant: IBM

Inventor： ECONOMIKOS LAERTIS ,  DELIGIANNI HARIKLIA ,  COTTE JOHN M ,  GRABARZ HENRY J ,  CHEN BOMY

IPC: C25D5/22 ,  C25D5/48 ,  C25D7/12 ,  C25D17/00 ,  H01L21/288 ,  H01L21/321 ,  H01L21/768

Abstract: A method and apparatus are described for performing both electroplating of a metal layer and planarization of the layer on a substrate. Electroplating and electroetching of metal (such as copper) are performed in a repeated sequence, followed by chemical-mechanical polishing. An electroplating solution, electroetching solution, and a non-abrasive slurry are dispensed on a polishing pad in the respective process steps. The substrate is held against the pad with a variable force in accordance with the process, so that the spacing between substrate and pad may be less during electroplating than during electroetching.

公开(公告)号：AT445034T

公开(公告)日：2009-10-15

申请号：AT03783387

申请日：2003-11-14

Applicant: IBM

Inventor： ECONOMIKOS LAERTIS ,  DELIGIANNI HARIKLIA ,  COTTE JOHN ,  GRABARZ HENRY ,  CHEN BOMY

IPC: C25D5/22 ,  C25D5/48 ,  C25D7/12 ,  C25D17/00 ,  H01L21/288 ,  H01L21/321 ,  H01L21/768

Abstract: A method and apparatus are described for performing both electroplating of a metal layer and planarization of the layer on a substrate. Electroplating and electroetching of metal (such as copper) are performed in a repeated sequence, followed by chemical-mechanical polishing. An electroplating solution, electroetching solution, and a non-abrasive slurry are dispensed on a polishing pad in the respective process steps. The substrate is held against the pad with a variable force in accordance with the process, so that the spacing between substrate and pad may be less during electroplating than during electroetching.

公开(公告)号：AU2003290804A1

公开(公告)日：2004-06-15

申请号：AU2003290804

申请日：2003-11-14

Applicant: IBM

Inventor： ECONOMIKOS LAERTIS ,  DELIGIANNI HARIKLIA ,  COTTE JOHN M ,  GRABARZ HENRY J ,  CHEN BOMY

IPC: C25D5/48 ,  C25D7/12 ,  H01L21/288 ,  H01L21/321 ,  H01L21/768 ,  C25D5/22 ,  C25D17/00

Abstract: A method and apparatus are described for performing both electroplating of a metal layer and planarization of the layer on a substrate. Electroplating and electroetching of metal (such as copper) are performed in a repeated sequence, followed by chemical-mechanical polishing. An electroplating solution, electroetching solution, and a non-abrasive slurry are dispensed on a polishing pad in the respective process steps. The substrate is held against the pad with a variable force in accordance with the process, so that the spacing between substrate and pad may be less during electroplating than during electroetching.