公开(公告)号：JP2000243938A

公开(公告)日：2000-09-08

申请号：JP2000035483

申请日：2000-02-14

Applicant: IBM

Inventor： LAM CHUNG H ,  MILES GLEN L ,  NAKOS JAMES S ,  WILLETS CHRISTA R

IPC: H01L21/8238 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To reduce the size of an NVRAM cell by allowing a cell selection circuit for selecting a cell in an array to respond to a plurality of logic gates and the logic gates to receive data being selected from the array. SOLUTION: A word line 180 is capacitively coupled to floating gates 180f and 228, and at the same time a word line 182 is capacitively coupled to floating gates 182f and 230. Then, four cells indicated by the floating gates 182f and floating gate parts 180f, 228, and 230 are allowed to share each of bit line diffusion regions 224 and 234, and a plurality of logic gates in a selection circuit for selecting the cells receive the data of a selected cell, thus reducing the size of an NVRAM cell for including in a single integrated circuit chip.

公开(公告)号：JP2001332553A

公开(公告)日：2001-11-30

申请号：JP2001098276

申请日：2001-03-30

Applicant: IBM

Inventor： JAMES W ADKINSON ,  BALLANTINE ARNE W ,  MATTHEW D GULAGER ,  PETER J GASE ,  GILBERT JEFFREY D ,  SHU-JEN JEN ,  DANA K JOHNSON ,  ROBB A JOHNSON ,  MILES GLEN L ,  PETERSON KIRK D ,  JAMES J TOOMEY ,  TINA WAGNER

IPC: C23C16/42 ,  H01L21/02 ,  H01L21/28 ,  H01L21/318 ,  H01L21/331 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/04 ,  H01L27/092 ,  H01L29/73 ,  H01L29/737

Abstract: PROBLEM TO BE SOLVED: To provide a nitride film that has characteristics being more superior than a conventional nitride film obtained by the conventional PECVD or LPCVD onto a semiconductor substrate. SOLUTION: In the manufacturing process of a semiconductor device, a method is indicated, where the method includes a step for exposing the surface of the substrate to a rapid thermochemical vapor deposition(RTCVD). The nitride film obtained by the method has an etching-resistant property and high conformality, and an excellent barrier layer can be provided without changing the structure and processes of a conventional semiconductor device.

公开(公告)号：CA2118147A1

公开(公告)日：1995-04-30

申请号：CA2118147

申请日：1994-10-14

Applicant: IBM

Inventor： CABRAL CYRIL JR ,  CLEVENGER LAWRENCE A ,  D HEURLE FRANCOIS M ,  HARPER JAMES M E ,  MANN RANDY W ,  MILES GLEN L ,  RAKOWSKI DONALD W D

IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B31/02

Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.