Integrated magnetic bubble and semiconductor device
    1.
    发明授权
    Integrated magnetic bubble and semiconductor device 失效
    集成磁性泡沫和半导体器件

    公开(公告)号:US3786445A

    公开(公告)日:1974-01-15

    申请号:US3786445D

    申请日:1972-07-03

    Applicant: IBM

    Inventor: HO I RISEMAN J

    CPC classification number: H01F10/06 G11C19/085 G11C19/0866

    Abstract: A magnetic bubble device and its associated read, write, propagation, sensing, addressing, driving, timing and control elements are combined in a unitary magnetic sheet-semiconductor structure.

    Abstract translation: 磁性气体装置及其相关的读,写,传播,感测,寻址,驱动,定时和控制元件组合在一体的磁性薄片半导体结构中。

    Apparatus for controlling functionally severable parts of a computer system
    2.
    发明授权
    Apparatus for controlling functionally severable parts of a computer system 失效
    用于控制计算机系统的功能可分的部件的装置

    公开(公告)号:US3843953A

    公开(公告)日:1974-10-22

    申请号:US41690973

    申请日:1973-11-19

    Applicant: IBM

    Inventor: MALEY G RISEMAN J

    CPC classification number: G06F9/5016 G06F11/3419

    Abstract: Disclosed is apparatus in a computer for selecting the usage of functionally severable parts of the computer, for example, the amount of memory used by a computer having a plurality of memory partitions and an operating program such as the IBM OS/360 supervisor program for determining the allocation and activation of memory space. In the example given the apparatus includes an added register having a plurality of latches linking the ALU output bus to control by enabling or disabling selectively one or more memory partitions in accordance with usage dictated by the operating system program since the register contents are changeable only when the system is in the supervisor state. A meter is coupled to the memories to indicate elapsed time of use of the memory partitions so as to permit charging of a customer based upon usage. The purpose of this abstract is to enable the public and the Patent Office to determine rapidly the subject matter of the technical disclosure of the application. This abstract is neither intended to define the invention of the application nor is it intended to be limiting as to the scope thereof.

    Abstract translation: 公开了一种计算机中用于选择计算机的功能可分割部分的使用的装置,例如由具有多个存储器分区的计算机使用的存储器的量以及诸如IBM OS / 360管理程序之类的操作程序,用于确定 内存空间的分配和激活。 在该示例中,该装置包括具有多个锁存器的附加寄存器,该多个锁存器通过根据操作系统程序所使用的使用选择性地启用或禁用一个或多个存储器分区来将ALU输出总线链接到控制,因为寄存器内容仅在 该系统处于主管状态。 仪表与存储器耦合以指示使用存储器分区的经过时间,以便允许基于使用情况对客户进行充电。

    7.
    发明专利
    未知

    公开(公告)号:SE345343B

    公开(公告)日:1972-05-23

    申请号:SE312367

    申请日:1967-03-07

    Applicant: IBM

    Abstract: 1,162,184. Semi-conductor devices; printed circuit assemblies. INTERNATIONAL BUSINESS MACHINES CORP. 9 March, 1967, No. 11043/67. Headings H1K and H1R. Monolithic or integrated semi-conductor devices are gold-coated on their lower surfaces and hot pressure bonded to superposed gold and chromium layers at the bottom of cavities in a substrate of glass or ceramic (e.g. 96% alumina). The cavities are formed by pressing the green ceramic or by bonding an apertured alumina sheet to an alumina blank. Each device has a plurality of built-up contacts extending through a protective glass coating on its upper surface and these lie in substantially the same plane as lands on the top surface of the substrate and which consist of aluminium, copper, or one or more noble metals. (For example the lands may have superposed gold, copper, and chromium layers). A plate is provided with conductive tracks suitably placed to interconnect adjacent contacts and lands. Suitable plates are aluminium or copper foils, paper, resin-reinforced fibrous materials, tetrafluoroethylene resins, polyethylene-terephthalate resins, and polyimide resins. The conductive tracks are formed on these, preferably on an intermediate acrylate resin parting layer, by laminating and etching, or by masked evaporation and may consist of aluminium, copper, or one or more noble metals. (A track may have superposed gold, lead, tin and copper layers). Preferably the plate is transparent so that visual alignment may be used in the bonding process, and is preferably insulating so that interconnection tests may be made before bonding. The backing may be clamped to the devices and substrate on a hot stage (which may have orienting pegs engaging the backing) and the assembly bonded by a solder reflow technique using lead-tin solder. Instead, single or multi-tipped thermocompression bonding machines may be used, the tips penetrating the backing during bonding. If ultrasonic bonding heads are used these are first heated to penetrate the backing and ultrasonic energy then supplied to affect the bonding. Laser or electron beam bonding may be used instead. The bonding layer is pulled away from the bonded contact tracks and lands, any parting layer being dissolved away. Alternatively the backing plate may be multilayered and consist of polyimide sheets bearing conductive tracks formed by masked evaporation or electrochemical deposition. Through-holes in the backing are metallized to provide interconnection between tracks in the various planes. Such a backing plate remains in place after bonding to interconnect the devices on the substrate.

    10.
    发明专利
    未知

    公开(公告)号:SE349424B

    公开(公告)日:1972-09-25

    申请号:SE3470

    申请日:1970-01-02

    Applicant: IBM

    Abstract: 1,269,130. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 17 Nov., 1969 [3 Jan., 1969], No. 56104/69. Heading H1K. Ohmic contact to a semi-conductor body is made within an aperture in a surface insulating layer by a layer of silicon monoxide-chromium cermet overcoated with a metal layer. A silicon or germanium body may be provided with an apertured coating of a silicon oxide, nitride, or oxide-nitride, or of a silicate glass. The cermet is applied to the entire surface at a substrate temperature of 100-500‹C. by flash evaporation of a sintered mixture of its two components or by coevaporation of the two components from separate sources. The chromium content of the cermet may be 50-90 atomic per cent. Without breaking vacuum, a layer of copper, silver or gold is applied and may be followed by a flashed layer of chromium or titanium. After selective etching to leave a contact and track pattern (resistors are formed in the pattern by the removal of the metallic layers to leave the cermet only), the system is baked for 1 hour at 300- 500‹ C. to effect diffusion of cermet components into the semi-conductor. A single- or multiplelayer insulation is applied and apertures formed at terminal areas. Further interconnection levels may be provided.

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