Abstract:
PROBLEM TO BE SOLVED: To provide a method and structure for generating a void fuse structure on a gate conductor stack. SOLUTION: A semiconductor substrate is provided, wherein a gate conductor stack 32 is provided on a shallow trench isolation region. Oxide layers 33 and 34 are formed on a substrate around the gate conductor stack 32, and an electric contact opening part etched to the substrate down to the oxide layer is filled with a first conductive material 40, establishing electric contact to the gate conductor stack. A conductive layer 41 of a second conductive material is allowed to stick to the oxide layer and the electric contact, and the oxide layer is anisotropically etched so that at least one etching hole, as far as the shallow trench isolation region through the oxide layer, is formed. A part 60 around the least the etching hole of the oxide layer is isotropically etched to form a void under at least a part of a conductive player pattern. The gate conductor stack comprises a fuse.
Abstract:
A method for cleaning an oxidized diffusion barrier layer, in accordance with the present invention, includes providing a conductive diffusion barrier layer (26) employed for preventing oxygen and metal diffusion therethrough and providing a wet chemical etchant (wet etch) including hydrofluoric acid. The diffusion barrier layer (26) is etched with the wet chemical etchant to remove oxides from the diffusion barrier layer such that by employing the wet chemical etchant linear electrical behavior is achieved through the diffusion barrier layer.
Abstract:
A method for polishing a dielectric layer containing silicon (16) provides a fluorine-based compound (34) during a polishing process. The dielectric layer is polished in the presence of the fluorine based compound to accelerate a polishing rate of the dielectric layer.
Abstract:
An aqueous based ceria slurry system and method for chemical mechanical polishing of semiconductor wafers, the slurry comprising less than 5 wt % abrasive cerium oxide particles and up to about the critical micelle concentration of a cationic surfactant, absent other abrasives, in a neutral to alkaline pH solution is disclosed. Also disclosed is slurry comprising a blend of surfactants including a pre-existing amount of anionic surfactant and an added amount of cationic and/or non-ionic surfactant.
Abstract:
An aqueous slurry-less composition for chemical-mechanical-polishing of a silicon dioxide workpiece comprising: a cationic surfactant that is soluble and ionized at neutral to alkaline pH conditions, in which the cationic surfactant is present in an aqueous slurry-less composition in an amount less than its critical micelle concentration.
Abstract:
An aqueous slurry-less composition for chemical-mechanical-polishing of a silicon dioxide workpiece comprising: a cationic surfactant that is soluble and ionized at neutral to alkaline pH conditions, in which the cationic surfactant is present in an aqueous slurry-less composition in an amount less than its critical micelle concentration.
Abstract:
A process for providing an aqueous back-end-of-line (BEOL) clean with feed-back control to monitor the active component of HF in the clean, for a wiring/interconnect of a reactive ion etched semiconductor device, comprising: subjecting the reactive ion etched semiconductor device to a post metal RIE clean using an etchant composition comprising about 0.01 to about 15 percent by weight of sulfuric acid; about 0.1 to about 100 ppm of a fluoride containing compound; and a member selected from the group consisting of about 0.01 to about 20 percent by weight of hydrogen peroxide or about 1 to about 30 ppm of ozone, comprising: a) mixing water, sulfuric acid and hydrogen peroxide in a mixing tank; b) mixing HF directly into the mixing tank or adding HF into a separate vessel for wafer processing, either before, during or after the mixture water, sulfuric acid and hydrogen peroxide as a mixture is transported to the separate tank for wafer processing; c) taking a sample comprising HR from the mixing tank or HF from the wafer processing tank and sending the sample through a feedback loop; d) comprising the sample to a standard dilute solution of HF to obtain a value of HF concentration in the sample; e) inputting the value to a tank tool recipe control to cause any needed adjustment in concentration of HF to a predetermined range, either in the mixing tank or the wafer processing vessel; and f) subjecting the wiring/interconnect of the semiconductor device to etching by the etchant composition to remove sidewall polymer, polymer rails and via residue without etching conductive materials during removal of sidewall polymer, polymer rails, and via residue.
Abstract:
The present invention, in one embodiment, provides a method of forming a semiconductor device that includes providing a substrate including a first conductivity type region and a second conductivity type region; forming a gate stack including a gate dielectric atop the first conductivity type region and the second conductivity type region of the substrate and a first metal gate conductor overlying the high-k gate dielectric; removing a portion of the first metal gate conductor that is present in the first conductivity type region to expose the gate dielectric present in the first conductivity type region; applying a nitrogen based plasma to the substrate, wherein the nitrogen based plasma nitrides the gate dielectric that is present in the first conductivity type region and nitrides the first metal gate conductor that is present in the second conductivity type region; and forming a second metal gate conductor overlying at least the gate dielectric that is present in the first conductivity type region.
Abstract:
PROBLEM TO BE SOLVED: To prevent the formation of watermarks on a wafer after it has dried up by a method, wherein the wafer is rinsed by deionized water before it is dried up, then the wafer is rinsed by the first and the second organic solvents, and water is mixed into the solution. SOLUTION: When a silicon substrate is exposed to long-chain alcohol, for example, by conducting an exposing process wherein dipping, rinsing and spraying operations are performed, the density of water on the surface of the silicon substrate is reduced sharply. Then, the long-chain alcohol is removed by rinsing with other solution such as short-chain alcohol, for example. Higher class alcohol is dissolved by low class alcohol. Accordingly, higher class alcohol is removed from the surface of the silicon substrate when the silicon substrate is put in an isopropanol drier, for example. Then, water is removed from the surface of the substrate in a substrate drying process. The quantity of water remaining on the surface of the silicon substrate is reduced sharply by performing a process in which the substrate is dipped into alcohol. As a result, the formation of watermarks on wafer surface can be reduced sharply.