公开(公告)号：JP2001298165A

公开(公告)日：2001-10-26

申请号：JP2001057296

申请日：2001-03-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHHOFER HARALD ,  HARTNER WALTER ,  SCHINDLER GUENTHER DR ,  HANEDER THOMAS PETER ,  HONLEIN WOLFGANG

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To facilitate the production of a storage capacitor. SOLUTION: The crystallizing temperature of a ferroelectric layer (3) (dielectric) to be used for the storage capacitor can be lowered by applying an extremely thin CeO2 layer (2) to a first platinum electrode layer (1) before depositing the ferroelectric layer (3). Continuously, in a treatment process, the dielectric layer (3) deposited in a noncrystalline state is crystallized at a temperature within the range from 590 to 620 deg.C. Next, a second electrode layer (4) is applied and the storage capacitor is completed.

公开(公告)号：JP2001273761A

公开(公告)日：2001-10-05

申请号：JP2001037522

申请日：2001-02-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHHOFER HARALD ,  HANEDER THOMAS PETER ,  ULLMANN MARC ,  BRAUN GEORG ,  HONLEIN WOLFGANG

IPC: G11C11/22 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To prevent a present state from being changed to a polarization state in which other ferroelectrioc transistor in other memory cell in a memory matrix cannot be discriminated, when a state is read out from a ferroelectric transistor or a state is stored in the ferroelectric transistor. SOLUTION: Threshold voltage of an other ferroelectric transistor in a memory matrix is increased by applying drain-substrate voltage to a ferroelectric transistor, when a state is read out from a ferroelectric transistor or a state is stored in the ferroelectric transistor.

公开(公告)号：WO0045441A3

公开(公告)日：2001-03-29

申请号：PCT/DE0000203

申请日：2000-01-25

Applicant: INFINEON TECHNOLOGIES AG ,  BACHHOFER HARALD ,  REISINGER HANS ,  HANEDER THOMAS PETER

Inventor： BACHHOFER HARALD ,  REISINGER HANS ,  HANEDER THOMAS PETER

IPC: H01L29/51 ,  H01L21/28

CPC classification number: H01L29/511

Abstract: The invention relates to a semiconductor device with a multiple dielectric, especially an ONO-triple dielectric, comprising a semiconductor substrate (10) of a first conduction type, a first doping area (20) of a second conduction type which is provided in said semiconductor substrate (10), a second doping area (30) of the second conduction type which is provided in the semiconductor substrate (10), a channel area (25) which is situated between the first and the second doping area (20, 30), a gate dielectric (40, 50, 60) which lies on top of the channel area (25) and which has at least three layers; and a gate terminal (70) which is provided on top of the gate dielectric (40, 50, 60). The bottom layer (40) of the gate dielectric (40, 50, 60) has an essentially smaller dielectric constant than the top layer (60) of the gate dielectric (40, 50, 60).

Abstract translation: 本发明提供了一种具有Mehrfachdielektrikum的半导体器件，特别是ONO Dreifachdielektrikum，包括：第一导电类型的半导体衬底（10）; 一个在设置于第二导电型的第一杂质区（20）的半导体衬底（10）; 一个在设置于第二导电型的第二杂质区（30）的半导体衬底（10）; 一个所述第一和第二杂质区之间躺在（20，30）沟道区（25）; 一个在所述沟道区（25）下面的栅极电介质（40，50，60），其具有至少三个层; 及以上的栅极端子（70）设置在栅极电介质（40，50，60）。 栅极电介质（40，50，60）的底部层（40）的介电常数比所述栅极电介质（40，50，60）的最上层（60）显着更小。

公开(公告)号：DE10032370C1

公开(公告)日：2001-12-13

申请号：DE10032370

申请日：2000-07-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HANEDER THOMAS PETER ,  HOENLEIN WOLFGANG ,  KREUPL FRANZ

IPC: B82B1/00 ,  H01L29/15 ,  H01L29/16 ,  H01L29/775 ,  H01L51/30

Abstract: The field effect transistor (100) has a first carbon nanotube (101), providing a source region, a channel region and a drain region and a second carbon nanotube (106), providing a gate region and supplied with a control voltage, for controlling the conductivity of the channel region. The nanotubes are spaced apart by a sufficient distance to prevent any tunnel current between them, e.g. the second nanotube is applied to an insulation layer (105) around the channel region provided by the first nanotube.

公开(公告)号：DE50112892D1

公开(公告)日：2007-10-04

申请号：DE50112892

申请日：2001-02-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHHOFER HARALD ,  BRAUN GEORG ,  HANEDER THOMAS PETER ,  HOENLEIN WOLFGANG DR ,  ULLMANN MARC

IPC: G11C11/22 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L29/788 ,  H01L29/792

Abstract: The state of a ferroelectric transistor in a memory cell is read or stored, and the threshold voltage of further ferroelectric transistors in further memory cells in the memory matrix is increased during the reading or storing, or is increased permanently. A memory configuration including ferroelectric memory cells is also provided.

公开(公告)号：DE10032412A1

公开(公告)日：2002-01-24

申请号：DE10032412

申请日：2000-07-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ENGELHARDT MANFRED ,  HANEDER THOMAS PETER ,  HOENLEIN WOLFGANG ,  KREUPL FRANZ

IPC: B82B3/00 ,  G11C11/21 ,  G11C11/56 ,  G11C13/02 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/15 ,  H01L29/16 ,  H01L51/30 ,  H01L51/20

Abstract: Electronic storage element (600) comprises first nanotubes (601) and second nanotubes (603) arranged skew to each other or crossing each other so that an electrical coupling is produced between one part of the first tubes and one part of the second tubes. It is possible to decide whether the tubes are electrically coupled to each other or not at their crossing points (605). An Independent claim is also included for a process for the production of an electronic storage element. Preferred Features: The nanotubes are carbon nanotubes. A dielectric is arranged between the first and second nanotubes. A layer system made up of a first silicon dioxide layer, a silicon nitride layer and a second silicon dioxide layer is arranged between the first and second nanotubes.