公开(公告)号：DE10040464A1

公开(公告)日：2002-02-28

申请号：DE10040464

申请日：2000-08-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： LUETZEN JOERN ,  MORGENSCHWEIS ANJA ,  GUTSCHE MARTIN ,  FOERSTER MATTHIAS

IPC: H01L21/02 ,  H01L21/8242

公开(公告)号：DE10142267A1

公开(公告)日：2003-03-27

申请号：DE10142267

申请日：2001-08-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BERNHARDT HENRY ,  STADTMUELLER MICHAEL ,  OTTENWAELDER DIETMAR ,  MORGENSCHWEIS ANJA

IPC: C23C16/34

Abstract: Process for depositing silicon nitride on a substrate (2) comprises subjecting the substrate to a stream containing a silicon component and a nitrogen component in an oven (1) under the action of heat. The temperature in the oven is adjusted to 600-645 deg C or not more than 650 deg C. Preferred Features: The temperature is adjusted to approximately 620 deg C. The silicon component is dichlorosilane and the nitrogen component is ammonia. The substrate is made from silicon.

公开(公告)号：DE10143283C1

公开(公告)日：2002-12-12

申请号：DE10143283

申请日：2001-09-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FOERSTER MATTHIAS ,  MOLL ANETT ,  MORGENSCHWEIS ANJA ,  SACHSE JENS-UWE ,  SCHUPKE KRISTIN

IPC: H01L21/02 ,  H01L21/8242

Abstract: Production of a trench capacitor comprises a preparing a substrate having a surface in which a trench is formed and having an upper region, a lower region and a sidewall; inserting a dopant through the trench side wall in the lower region of the trench. Method also involves forming a mask layer on the trench side wall of the lower region of the trench; depositing nanocrystals on the mask layers so that the crystals cover a first part of the mask layer and expose a second part of the mask layer; etching the mask layer to expose the trench side wall; etching the substrate in the lower region of trench using a structured mask layer; removing the structured mask layer (110) by etching; forming an insulation layer on the trench side wall; depositing a conducting trench filling in the trench on the insulation layer as inner capacitor electrode; and forming a transistor which is connected to the conducting trench filling to control the trench capacitor. Preferred Features: An insulation collar is produced in the upper region of the trench on the side wall before the side wall is roughened. The mask layer is formed using LPCVD nitride deposition.

公开(公告)号：DE10121778B4

公开(公告)日：2005-12-01

申请号：DE10121778

申请日：2001-05-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  MORGENSCHWEIS ANJA ,  OTTENWAELDER DIETMAR ,  SCHROEDER UWE

IPC: H01L21/223 ,  H01L21/8242

公开(公告)号：DE10121778A1

公开(公告)日：2002-11-21

申请号：DE10121778

申请日：2001-05-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HAUPT MORITZ ,  MORGENSCHWEIS ANJA ,  OTTENWAELDER DIETMAR ,  SCHROEDER UWE

IPC: H01L21/223 ,  H01L21/8242

Abstract: Improving a doping profile during gas phase doping comprises preparing a semiconductor substrate; introducing silicon nitride and/or decomposition products of silicon nitride deposition in a process chamber; and gas phase doping in the chamber. Preferred Features: Ammonium chloride crystals are introduced into the process chamber together with small amounts of HCl and/or NH3. Gas phase doping is carried out in a pressure region of 13.33 Pa to 133.3 kPa and in a temperature region of 800-1100 deg C. Arsenic, phosphorus or boron gas doping is carried out. A trench is formed in the substrate and an insulating collar in an upper region of the trench.

公开(公告)号：DE10034005A1

公开(公告)日：2002-01-24

申请号：DE10034005

申请日：2000-07-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FOERSTER MATTHIAS ,  MORGENSCHWEIS ANJA ,  MARTINI TORSTEN ,  SACHSE JENS-UWE

IPC: H01L21/02 ,  H01L21/205 ,  H01L21/306 ,  H01L21/3205 ,  H01L21/8242

Abstract: Production of a micro-roughness on a surface comprises forming finely divided semiconductor grains from a process gas on the surface. Preferred Features: The semiconductor grains are silicon or germanium grains. The process gas is SiH4 or GeH4. The semiconductor grains are formed in a temperature region of 500-600 degrees C for 5-60 minutes. The surface is an oxide, nitride or silicon substrate. The process gas has a hydrogen dilution of 1: 20-0.2.