公开(公告)号：WO0154168A3

公开(公告)日：2001-12-27

申请号：PCT/EP0013024

申请日：2000-12-20

Applicant: INFINEON TECHNOLOGIES AG ,  PFIRSCH FRANK ,  PAIRITSCH HERBERT

Inventor： PFIRSCH FRANK ,  PAIRITSCH HERBERT

IPC: H01L27/02 ,  H01L27/06 ,  H01L29/06 ,  H01L29/40 ,  H01L29/739 ,  H01L29/78 ,  H01L21/66

CPC classification number: H01L29/404 ,  H01L24/05 ,  H01L27/0255 ,  H01L27/0676 ,  H01L29/0619 ,  H01L29/7395 ,  H01L29/7808 ,  H01L29/7811 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00014

Abstract: The invention relates to a semiconductor component comprising a first main terminal (40); a second main terminal (80); a gate terminal (70) for controlling the current between the main terminals (40, 80), a first diode device (100) which can be switched between the first gate (40) and the gate terminal (70) and whose first breakdown voltage is such that the first diode device short-circuits the first main terminal (40) with the gate terminal (70), hereby switching on the semiconductor component, when the voltage that drops off over the first diode device (100) exceeds a certain predetermined value. The first diode device (100) is connected to the control gate (70) in an integrated manner and has an external contacting area (120) for connecting to the first main terminal (40).

Abstract translation: 本发明提供了一种具有第一主端子（40）的半导体器件; 第二主终端（80）; 控制端子（70），用于控制在所述主端子（40,80）之间流动的电流; 第一主端子（40）和控制端子之间的（70）可切换的第一二极管装置具有这样的第一击穿电压，短路的第一主端子（40）的控制端子（70）（100），因此转弯时在半导体装置上 第一二极管装置（100）两端的电压降超过预定值，第一二极管装置（100）整体连接到控制端子（70）。 第一二极管器件（100）具有用于连接到第一主连接（40）的第一外部接触区域（120）。

公开(公告)号：WO0052750A3

公开(公告)日：2001-08-09

申请号：PCT/DE0000677

申请日：2000-03-03

Applicant: INFINEON TECHNOLOGIES AG ,  HIRLER FRANZ ,  KANERT WERNER ,  GASSEL HELMUT ,  STRACK HELMUT ,  PAIRITSCH HERBERT

Inventor： HIRLER FRANZ ,  KANERT WERNER ,  GASSEL HELMUT ,  STRACK HELMUT ,  PAIRITSCH HERBERT

IPC: H01L21/331 ,  H01L21/336 ,  H01L29/06 ,  H01L29/10 ,  H01L21/225 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/7813 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7802

Abstract: The invention relates to a method for producing a body area for a vertical MOS transistor array in a semiconductor body, wherein the body area has at least one channel region disposed between the source area and the drain area and borders on a gate electrode. A first implantation of doping material is effected in the semiconductor body, wherein the maximum of doping material of the first implantation is placed in the back part of the channel region (11) within the semiconductor body. At least a second implantation of doping material is then effected with a smaller dose than in the first implantation, wherein the maximum of doping material of the second implantation lies within the semiconductor body below the maximum of doping material of the first implantation. Subsequently, the doping material is diffused off.

Abstract translation: 描述一种用于在半导体本体中的垂直MOS晶体管布置，其中所述体区包括至少一个沟道区，设置于栅极电极的源极区域和漏极区域和相邻之间产生的体区的过程。 有掺杂剂至该半导体本体的第一植入物，植入最大与沟道区（11）在半导体本体中的第一植入的复位。 接着进行掺杂材料中的至少一个第二注入具有比第一注入较低的剂量，植入低于最大值的最大注入所述第一注入的半导体主体内的第二植入的位置。 随后，执行掺杂材料的向外扩散。

公开(公告)号：AT510300T

公开(公告)日：2011-06-15

申请号：AT00918684

申请日：2000-03-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HIRLER FRANZ ,  KANERT WERNER ,  GASSEL HELMUT ,  STRACK HELMUT ,  PAIRITSCH HERBERT

IPC: H01L21/336 ,  H01L21/225 ,  H01L21/265 ,  H01L21/331 ,  H01L29/06 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78

Abstract: Production of a body area (9) of first conductivity type comprises implanting a doping material of first conductivity type into a semiconductor body followed by implanting a doping material of second conductivity type having a lower dose than the first implantation step, and then diffusion of the doping material. Production of a body area (9) of first conductivity type comprises implanting a doping material of first conductivity type into a semiconductor body followed by implanting a doping material of second conductivity type having a lower dose than the first implantation step. The body area has at least one channel region (11) arranged between a source region (10) and a drain region (2, 3) of second conductivity and bordering a gate electrode (5). The body area and the source region extend from a first surface (14) into the semiconductor body, and the drain region extends from a second surface (15) into the semiconductor body. The dosage of the first implantation is 10-1000 times larger than that of the second implantation.

公开(公告)号：DE102005047102B3

公开(公告)日：2007-05-31

申请号：DE102005047102

申请日：2005-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FALCK ELMAR ,  PAIRITSCH HERBERT ,  SCHULZE HANS-JOACHIM

IPC: H01L29/06 ,  H01L21/762

Abstract: A semiconductor component with a pn junction comprises a semiconductor body comprising a front side and an edge region. A pn junction is formed fashion in curved fashion in the edge region of the semiconductor body. An edge structure comprising depressions is also provided in the edge region of the semiconductor body. The depressions may comprise, for example, a number of capillaries which extend into the semiconductor body proceeding from the front side of the semiconductor body. In one suitable embodiment, the capillaries may be filled with a dielectric

公开(公告)号：DE10156465C1

公开(公告)日：2003-07-10

申请号：DE10156465

申请日：2001-11-16

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUEB MICHAEL ,  PAIRITSCH HERBERT

IPC: H01L21/68 ,  H01L21/58

Abstract: The first and second surfaces (3, 4) of a first wafer (1) are recessed (2, 5) forming penetrations between them, over the entire first surface of the first wafer. A temperature-stable, detachable connection (21) is formed between them, with spacing layers (13-15) of dielectric, uniting the first surface of the first wafer with a first surface of the second wafer, by wafer-bonding connection. An Independent claim is included for a corresponding method of forming a detachable, highly-temperature stable bond between two wafers.

公开(公告)号：DE10001865B4

公开(公告)日：2004-09-23

申请号：DE10001865

申请日：2000-01-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK ,  PAIRITSCH HERBERT

IPC: H01L27/02 ,  H01L27/06 ,  H01L29/06 ,  H01L29/40 ,  H01L29/739 ,  H01L29/78 ,  H01L21/66 ,  H01L23/62

公开(公告)号：DE10001865A1

公开(公告)日：2001-08-23

申请号：DE10001865

申请日：2000-01-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PFIRSCH FRANK ,  PAIRITSCH HERBERT

IPC: H01L27/02 ,  H01L27/06 ,  H01L29/06 ,  H01L29/40 ,  H01L29/739 ,  H01L29/78 ,  H01L21/66 ,  H01L23/62

公开(公告)号：DE10001868B4

公开(公告)日：2006-03-16

申请号：DE10001868

申请日：2000-01-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KRISCHKE NORBERT ,  KNAPP ACHIM ,  PAIRITSCH HERBERT

IPC: H01L29/06 ,  H01L29/40

公开(公告)号：DE10001868A1

公开(公告)日：2001-08-02

申请号：DE10001868

申请日：2000-01-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KRISCHKE NORBERT ,  KNAPP ACHIM ,  PAIRITSCH HERBERT

IPC: H01L29/06 ,  H01L29/40

Abstract: The component has a semiconducting body (1) of one conductor type contg. a body zone (2) of the opposite conductor type and at least one field plate (4) on an insulating coating (5,6) on the semiconducting body and essentially in a region outside the pn-junction defined by the body zone and the semiconducting body. The body zone has an extension zone (10) of the other conductor type formed by additional doping that extends in the semiconducting body until beneath the insulating coating at a distance from the surface of the semiconducting body.