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公开(公告)号:WO03016590A3
公开(公告)日:2003-05-30
申请号:PCT/DE0202592
申请日:2002-07-15
Applicant: INFINEON TECHNOLOGIES AG , KOGLER RUDOLF , SCHOENHERR HELMUT , SKRABL SILKE , URSCHITZ ROLF
Inventor: KOGLER RUDOLF , SCHOENHERR HELMUT , SKRABL SILKE , URSCHITZ ROLF
IPC: C23C16/44 , C23C16/448 , C23C16/455
CPC classification number: C23C16/4408 , C23C16/4481 , C23C16/455 , C23C16/45561
Abstract: The invention relates to a device comprising a supply line branch (Z1) for a gas mixture consisting of an atomized medium (M1) and a carrier gas (T) to a CVD reactor (R). The supply line branch (Z1) comprises a supply line for the liquid medium (M1), a supply line for the carrier gas (T) and a processing unit which is fed by the supply lines and is used to convert the liquid medium (M1) into a gaseous state using an injector valve (EV1) and to mix the medium (M1) with the carrier gas (T). The supply lines are respectively provided with a through flow control unit (DS11, DS12)
Abstract translation: 本发明涉及一种具有用于雾化介质(M1)和载气(T)的气体混合物到CVD反应器(R)的进料分支(Z1)的装置。 输送支路(Z1)包括用于将所述液体介质的进料管线(M1),用于将载气(T)的供给线,并且通过进料管线处理单元,用于通过在所述气体状态的喷射阀(EV1)的装置将流体传递介质(M1)进给,并 用于将介质(M1)与载气(T)混合。 供电线路各有一个流量控制单元(DS11,DS12)。
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公开(公告)号:DE102013107784A1
公开(公告)日:2014-01-30
申请号:DE102013107784
申请日:2013-07-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor: GRILLE THOMAS , HEDENIG URSULA , MUTH RALPH , PLAGMANN JOERG , SCHOENHERR HELMUT
IPC: H01L23/485 , H01L21/283 , H01L21/311 , H01L21/60 , H01L23/50
Abstract: Gemäß verschiedenen Aspekten der Offenbarung enthält ein Halbleiterbauelement (401) mindestens einen ungehäusten Halbleiterchip; eine an den ungehäusten Halbleiterchip angrenzende dielektrische Schicht (415); in der dielektrischen Schicht (415) gebildete geometrische Strukturen; und eine über der dielektrischen Schicht (415) aufgetragene leitfähige Schicht (410), wobei die leitfähige Schicht (410) mindestens teilweise über den geometrischen Strukturen positioniert ist.
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公开(公告)号:DE10127387A1
公开(公告)日:2003-01-02
申请号:DE10127387
申请日:2001-06-06
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FATHULLA AHMAD , NEIDHART THOMAS , SCHOENHERR HELMUT
IPC: H01L21/98 , H01L31/18 , H01L21/58 , H01L31/105
Abstract: Production of a semiconductor substrate comprises applying a connecting layer (6) made from a non-single crystalline material on the connecting surface of at least one semiconductor wafer (2,4); contacting the wafers with the connecting surfaces with the connecting layer between them; and heat treating to join the wafers. An Independent claim is also included for an alternative process for the production of a semiconductor substrate. Preferred Features: The connecting layer is initially applied as a non-crystalline material and is converted during heat treatment into a partially crystalline semiconductor layer. The connecting layer is made from a polycrystalline silicon layer and is 50-500 nm thick.
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公开(公告)号:DE102006030869A1
公开(公告)日:2008-01-10
申请号:DE102006030869
申请日:2006-07-04
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FATHULLA AHMAD , LACKNER GERALD , RUPP THOMAS , SANTOS RODRIGUEZ FRANCISCO JAV , SCHOENHERR HELMUT , SCHULZE HANS-JOACHIM
IPC: H01L21/306 , C30B25/02
Abstract: The production of a semiconductor wafer useful in e.g. chip cards, comprises providing a semiconductor substrate (1) from a first semiconductor material with a first surface and a second surface, which faces the first surface, applying a first semiconductor layer (2) from a second semiconductor material epitaxially on the second surface, and partially removing the substrate from the first semiconductor layer. The epitaxial application of a second semiconductor layer (3) from a third semiconductor material on the first semiconductor layer takes place to the desired target thickness. The production of a semiconductor wafer useful in e.g. chip cards, comprises providing a semiconductor substrate (1) from a first semiconductor material with a first surface and a second surface, which faces the first surface, applying a first semiconductor layer (2) from a second semiconductor material epitaxially on the second surface, and partially removing the substrate from the first semiconductor layer. The epitaxial application of a second semiconductor layer (3) from a third semiconductor material on the first semiconductor layer takes place to the desired target thickness. After the partial removing, the first semiconductor layer is partly removed via corroding. Before corroding a prefabricated device is attached as an etching mask at the first surface of the substrate. The device covers an external area of the first surface and limits an opening that releases an internal area of the first surface of the substrate, and is again removed after corroding. A semiconductor component (4) is formed in the first- and second semiconductor layer before the partial removing of the substrate.
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公开(公告)号:DE10137673A1
公开(公告)日:2003-02-27
申请号:DE10137673
申请日:2001-08-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor: KOGLER RUDOLF , URSCHITZ ROLF , SKRABL SILKE , SCHOENHERR HELMUT
IPC: C23C16/44 , C23C16/448 , C23C16/455
Abstract: The invention relates to a device comprising a supply line branch (Z1) for a gas mixture consisting of an atomized medium (M1) and a carrier gas (T) to a CVD reactor (R). The supply line branch (Z1) comprises a supply line for the liquid medium (M1), a supply line for the carrier gas (T) and a processing unit which is fed by the supply lines and is used to convert the liquid medium (M1) into a gaseous state using an injector valve (EV1) and to mix the medium (M1) with the carrier gas (T). The supply lines are respectively provided with a through flow control unit (DS11, DS12)
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公开(公告)号:DE10228771B4
公开(公告)日:2008-02-14
申请号:DE10228771
申请日:2002-06-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DETZEL THOMAS , LANZERSTORFER SVEN , SCHOENHERR HELMUT , SKRABL SILKE
IPC: H01L21/768 , H01L21/314 , H01L23/52
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公开(公告)号:DE10127387B4
公开(公告)日:2006-09-21
申请号:DE10127387
申请日:2001-06-06
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FATHULLA AHMAD , NEIDHART THOMAS , SCHOENHERR HELMUT
IPC: H01L21/58 , H01L21/98 , H01L31/105 , H01L31/18
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公开(公告)号:DE10228771A1
公开(公告)日:2004-01-15
申请号:DE10228771
申请日:2002-06-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: DETZEL THOMAS , LANZERSTORFER SVEN , SCHOENHERR HELMUT , SKRABL SILKE
IPC: H01L21/768 , H01L21/314
Abstract: Process for filling holes and planarizing between metal strips (1) during the manufacture of integrated semiconductor circuits comprises depositing a filler layer (2) between the metal strips using a high density plasma oxide deposition process in a thickness so that the filler layer fills the holes between the metal strips lying on one level, depositing an undoped dielectric layer (3) on the filler layer, and anisotropically back-etching the dielectric layer to reach a final thickness of the filler layer and the dielectric layer. An independent claim is also included for an integrated semiconductor circuit produced by the above process.
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