公开(公告)号：DE10157361A1

公开(公告)日：2003-03-13

申请号：DE10157361

申请日：2001-11-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ZUHR BERNHARD ,  WAIDHAUS BERND

IPC: H01L25/065 ,  H01L23/50 ,  H01L21/60

Abstract: Electronic component comprises large semiconductor chip (1) and small semiconductor chip (2), each with contact surfaces (3, 8) and bond wires (5, 7) for contacting with substrate (11) with wiring plane (6) with contact connecting surfaces (14) and outer contact surfaces (15). The semiconductor chips are arranged on the substrate and plastic filler (10) is provided between the substrate and the large semiconductor chip. An Independent claim is also included for a process for the production of the electronic component.

公开(公告)号：DE10360708B4

公开(公告)日：2008-04-10

申请号：DE10360708

申请日：2003-12-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  ROEMER BERND ,  SCHAETZLER BERNHARD ,  VILSMEIER HERMANN ,  WOERNER HOLGER ,  ZUHR BERNHARD ,  STUEMPFL CHRISTIAN

IPC: H01L23/12 ,  H01L25/065 ,  H01L21/50 ,  H01L21/56 ,  H01L23/00 ,  H01L23/04 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H01L25/10

Abstract: An electronic semiconductor module component with a semiconductor stack includes semiconductor components arranged in a vertically stacked relationship. A basic semiconductor component includes a lower interposing unit, on which lower external contact pads are arranged. The basic semiconductor component further includes an upper interposing unit, on which upper external contact pads are arranged. The two interposing units are electrically connected to one another via bonding connections disposed at their edge areas. The basic semiconductor component is a compact component on which different, customer-specific semiconductor components can be stacked.

公开(公告)号：DE102004036909A1

公开(公告)日：2006-03-23

申请号：DE102004036909

申请日：2004-07-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  WOERNER HOLGER ,  STEINER RAINER ,  VILSMEIER HERMANN ,  BAUER MICHAEL ,  ZUHR BERNHARD ,  BACHMAIER ULRICH ,  HAGEN ROBERT

IPC: H01L23/50 ,  H01L21/50 ,  H01L21/60 ,  H01L25/065

Abstract: A semiconductor stack and a semiconductor base device with a wiring substrate and an intermediate wiring board for a semiconductor device stack is disclosed. In one embodiment, a semiconductor chip is arranged between the intermediate wiring board and the wiring substrate, which is electrically connected by way of the wiring substrate on the one hand to external contacts on the underside of the wiring substrate and on the other hand to contact terminal areas in the edge regions of the wiring substrate. The intermediate wiring board has angled-away external flat conductors, which are electrically connected in the contact terminal areas of the wiring board. Furthermore, on the upper side of the intermediate wiring board, arranged on the free ends of the internal flat conductors are external contact terminal areas, which correspond in size and arrangement to external contacts of a semiconductor device to be stacked.

公开(公告)号：DE10142114C1

公开(公告)日：2003-02-13

申请号：DE10142114

申请日：2001-08-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： DAECHE FRANK ,  ZUHR BERNHARD

IPC: H01L25/065 ,  H01L23/50 ,  H01L21/60 ,  H01L21/58

Abstract: The electronic component (2) has at least 2 semiconductor chips (4,6) mounted on an intermediate carrier (8), provided on its underside (82) with external contacts (85) positioned in a common plane with external contacts (43) provided by the active surface (41) of one of the chips. The rear surface (42) of this chip faces the passive or active surface (61) of the second chip. An Independent claim for manufacture of an electronic component is also included.

公开(公告)号：DE10209204B4

公开(公告)日：2009-05-14

申请号：DE10209204

申请日：2002-03-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ZUHR BERNHARD

IPC: H01L25/065 ,  H01L21/58 ,  H01L23/13 ,  H01L23/31 ,  H01L23/50 ,  H01L23/552 ,  H01L29/06

公开(公告)号：DE102004036909B4

公开(公告)日：2007-04-05

申请号：DE102004036909

申请日：2004-07-29

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  WOERNER HOLGER ,  STEINER RAINER ,  VILSMEIER HERMANN ,  BAUER MICHAEL ,  ZUHR BERNHARD ,  BACHMAIER ULRICH ,  HAGEN ROBERT

IPC: H01L23/50 ,  H01L21/50 ,  H01L21/60 ,  H01L25/065

Abstract: A semiconductor stack and a semiconductor base device with a wiring substrate and an intermediate wiring board for a semiconductor device stack is disclosed. In one embodiment, a semiconductor chip is arranged between the intermediate wiring board and the wiring substrate, which is electrically connected by way of the wiring substrate on the one hand to external contacts on the underside of the wiring substrate and on the other hand to contact terminal areas in the edge regions of the wiring substrate. The intermediate wiring board has angled-away external flat conductors, which are electrically connected in the contact terminal areas of the wiring board. Furthermore, on the upper side of the intermediate wiring board, arranged on the free ends of the internal flat conductors are external contact terminal areas, which correspond in size and arrangement to external contacts of a semiconductor device to be stacked.

公开(公告)号：DE102004049654B3

公开(公告)日：2006-04-13

申请号：DE102004049654

申请日：2004-10-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BAUER MICHAEL ,  BACHMAIER ULRICH ,  HAGEN ROBERT ,  POHL JENS ,  STEINER RAINER ,  STROBEL PETER ,  VILSMEIER HERMANN ,  WOERNER HOLGER ,  ZUHR BERNHARD

IPC: H01L23/50 ,  H01L23/055 ,  H01L25/10

Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.

公开(公告)号：DE102004027788A1

公开(公告)日：2006-01-05

申请号：DE102004027788

申请日：2004-06-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  BEER GOTTFRIED ,  ZUHR BERNHARD

IPC: H01L21/60 ,  H01L23/50 ,  H01L25/065

Abstract: The component has a semiconductor chip (7) arranged between a re-wiring substrate (5) and an intermediate distribution plate (6). Boundary regions of the substrate surrounding the chip, has an elastic contact unit (9) which is electrically connected with the boundary regions (10) of the distribution plate. A top side of the plate ahs external contact surfaces whose size corresponds to the size of contact surfaces in the unit. Independent claims are also included for the following: (A) a method for the production of a semiconductor base component (B) a method for producing an elastic contact unit.

公开(公告)号：DE10360708A1

公开(公告)日：2005-07-28

申请号：DE10360708

申请日：2003-12-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： POHL JENS ,  ROEMER BERND ,  SCHAETZLER BERNHARD ,  VILSMEIER HERMANN ,  WOERNER HOLGER ,  ZUHR BERNHARD ,  STUEMPFL CHRISTIAN

IPC: H01L23/12 ,  H01L21/56 ,  H01L23/00 ,  H01L23/04 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L25/065 ,  H01L23/50 ,  H01L23/16 ,  H01L21/50

Abstract: An electronic semiconductor module component with a semiconductor stack includes semiconductor components arranged in a vertically stacked relationship. A basic semiconductor component includes a lower interposing unit, on which lower external contact pads are arranged. The basic semiconductor component further includes an upper interposing unit, on which upper external contact pads are arranged. The two interposing units are electrically connected to one another via bonding connections disposed at their edge areas. The basic semiconductor component is a compact component on which different, customer-specific semiconductor components can be stacked.

公开(公告)号：DE10209204A1

公开(公告)日：2003-10-02

申请号：DE10209204

申请日：2002-03-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ZUHR BERNHARD

IPC: H01L23/31 ,  H01L23/552 ,  H01L25/065 ,  H01L29/06 ,  H01L23/13 ,  H01L21/58

Abstract: Electronic component comprises a stack of semiconductor chips (2, 3) of different size. The first semiconductor chip (2) has a lower thickness (d) and lower outer dimensions than the second semiconductor chip (3). The second semiconductor chip has a recess (5) on its passive rear side (4) in which the first semiconductor chip is arranged. An Independent claim is also included for a process for the production of the electronic component.