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1.
公开(公告)号:WO2010117964A3
公开(公告)日:2011-01-13
申请号:PCT/US2010030008
申请日:2010-04-05
Applicant: LAM RES CORP , JI BING , TAKESHITA KENJI , BAILEY ANDREW D III , HUDSON ERIC A , MORAVEJ MARYAM , SIRARD STEPHEN M , KO JUNGMIN , LE DANIEL , HEFTY ROBERT C , CHENG YU , DELGADINO GERARDO A , YEN BI-MING
Inventor: JI BING , TAKESHITA KENJI , BAILEY ANDREW D III , HUDSON ERIC A , MORAVEJ MARYAM , SIRARD STEPHEN M , KO JUNGMIN , LE DANIEL , HEFTY ROBERT C , CHENG YU , DELGADINO GERARDO A , YEN BI-MING
IPC: H01L21/3065 , H05H1/34
CPC classification number: H01L21/31116 , H01L21/02063 , H01L21/31138
Abstract: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.
Abstract translation: 通过本发明的实施例提供了一种用于蚀刻位于有机掩模下方的低k电介质层中的特征的方法。 通过有机掩模将特征蚀刻到低k电介质层中。 在低k电介质层上沉积氟碳层。 氟碳层被固化。 剥去有机面膜。
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2.
公开(公告)号:WO2010045513A3
公开(公告)日:2010-07-15
申请号:PCT/US2009060931
申请日:2009-10-16
Applicant: LAM RES CORP , FISCHER ANDREAS , MORAVEJ MARYAM
Inventor: FISCHER ANDREAS , MORAVEJ MARYAM
IPC: H01L21/3065
CPC classification number: C23C16/04 , C23C16/509 , H01J37/32091 , H01J37/32862 , H01L21/67028 , H01L21/6833
Abstract: In a wafer processing system having an electrode, an electrostatic chuck (ESC) and a confinement chamber portion, the ESC is established to be RF-floating, whereas a confinement chamber portion is grounded during a pre-coating process. Accordingly, the confinement chamber portion and the upper electrode are selectively targeted for pre-coating material deposition. As such, the amount of pre-coating material that is deposited onto the ESC is greatly reduced over that of conventional systems. Therefore, less time, energy and material are needed to remove pre-coating material from the ESC during a wafer auto clean (WAC) process. Further, the upper electrode is established to be RF-floating, whereas the confinement chamber portion is grounded during a WAC process. As such, the cleaning material is selectively targeted toward the confinement hardware portion of the chamber. Therefore, the upper electrode is subjected to less wear during a WAC process.
Abstract translation: 在具有电极,静电卡盘(ESC)和约束室部分的晶片处理系统中,ESC被建立为RF浮动,而限制室部分在预涂工艺期间接地。 因此,限制室部分和上部电极被选择性地靶向用于预涂材料沉积。 因此,与常规系统相比,沉积在ESC上的预涂料的量大大降低。 因此,在晶圆自动清洗(WAC)过程中,需要较少的时间,能量和材料来从ESC中去除预涂材料。 此外,上电极被建立为RF浮动,而限制室部分在WAC处理期间接地。 因此,清洁材料选择性地朝向腔室的限制硬件部分。 因此,在WAC工艺期间,上电极受到较少的磨损。
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公开(公告)号:SG174500A1
公开(公告)日:2011-10-28
申请号:SG2011068251
申请日:2010-04-05
Applicant: LAM RES CORP
Inventor: JI BING , TAKESHITA KENJI , BAILEY ANDREW D III , HUDSON ERIC A , MORAVEJ MARYAM , SIRARD STEPHEN M , KO JUNGMIN , LE DANIEL , HEFTY ROBERT C , CHENG YU , DELGADINO GERATDO A , YEN BI-MING
Abstract: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.
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公开(公告)号:SG194414A1
公开(公告)日:2013-11-29
申请号:SG2013075452
申请日:2009-10-16
Applicant: LAM RES CORP
Inventor: FISCHER ANDREAS , MORAVEJ MARYAM
Abstract: PRE-COATING AND WAFER-LESS AUTO-CLEANING SYSTEM AND METHODIn a wafer processing system having an electrode, an electrostatic chuck (ESC) and a confinement chamber portion, the ESC is established to be RF-floating, whereas a confinement chamber portion is grounded during a pre-coating process. Accordingly, the confinement chamber portion and the upper electrode are selectively targeted for pre-coating material deposition. As such, the amount of pre-coating material that is deposited onto the ESC is greatly reduced over that of conventional systems. Therefore, less time, energy and material are needed to remove pre-coating material from the ESC during a wafer auto clean (WAC) process. Further, the upper electrode is established to be RF-floating, whereas the confinement chamber portion is grounded during a WAC process As such, the cleaning material is selectively targeted toward the confinement hardware portion of the chamber. Therefore, the upper electrode is subjected to less wear during a WAC process. Figure for publication: None
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公开(公告)号:SG10201507919TA
公开(公告)日:2015-10-29
申请号:SG10201507919T
申请日:2008-03-26
Applicant: LAM RES CORP
Inventor: DHINDSA RAJINDER , HUDSON ERIC , MARAKHTANOV ALEXEI , FISCHER ANDREAS , MORAVEJ MARYAM
Abstract: In a plasma processing chamber, a method for processing a substrate is provided. The method includes supporting the substrate in the plasma processing chamber configured with an upper electrode (UE) and a lower electrode (LE), configuring at least one radio frequency power source to ignite plasma between the UE and the LE, and providing a conductive coupling ring, the conductive coupling ring is coupled to the LE to provide a conductive path. The method further includes providing a plasma-facing-substrate-periphery (PFSP) ring, the PFSP ring being disposed above the conductive coupling ring. The method yet further includes coupling the PFSP ring to at least one of a direct current (DC) ground through an RF filter, the DC ground through the RF filter and a variable resistor, a positive DC power source through the RF filter, and a negative DC power source through the RF filter to control plasma processing parameters.
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