Abstract:
PROBLEM TO BE SOLVED: To simultaneously use two pieces of different peripheral equipment capable of functioning by a single pin by providing process circuit mechanism and settable pin setting. SOLUTION: A multiplexer 14 is connected with a function circuit 12 via a communication line 18, connected with a pin P1 via a communication line 20, connected with a pin P2 via a communication line 22 and connected with a setting register 16 via a communication line 24. When a flag received from the setting register 16 is '1', the multiplexer 14 is operated so as to connect the function circuit 12 with the pin P1. When the flag received from the setting register 16 is 'zero', the multiplexer 14 is further operated so as to connect the function circuit 12 with the pin P2. Therefore, a user is able to transfer a function related to the function circuit 12 from one pin to another by using the multiplexer 14 and the setting register 16 by a circuit 10.
Abstract:
Method and apparatus for controlling the updating of a random access memory (RAM) that stores data for coding the activation of segments of one or more alphanmeric characters of a liquid crystal display (LCD), to maintain substantially a direct current (DC) voltage value of zero across transparent conductive plates of the LCD, is performed or provided in a microcontroller having internal LCD control capabilities. A type B waveform is employed for activating the LCD, the waveform being of a type in which data is transmitted over two frames, the data in the second frame of which is the inverse of data in the first frame thereof to maintain an average DC voltage value over each two-frame portion of the waveform at substantially zero volt. The RAM is allowed to be written to for updating the data therein only after completion of an entire two-frame portion of the waveform and before commencement of a new two-frame portion, to avoid a non-zero average DC voltage across the LCD glass during a two-frame portion. An error bit is set whenever an attempt is made to write to the RAM at times other than between the end of a two-frame portion and the commencement of a new two-frame portion. A response to the error bit is made by returning to the write step that prompted it, to determine whether all of the data intended to be written has been stored in the RAM.
Abstract:
Method and apparatus for controlling the updating of a random access memory (RAM) that stores data for coding the activation of segments of one or more alphanmeric characters of a liquid crystal display (LCD), to maintain substantially a direct current (DC) voltage value of zero across transparent conductive plates of the LCD, is performed or provided in a microcontroller having internal LCD control capabilities. A type B waveform is employed for activating the LCD, the waveform being of a type in which data is transmitted over two frames, the data in the second frame of which is the inverse of data in the first frame thereof to maintain an average DC voltage value over each two-frame portion of the waveform at substantially zero volt. The RAM is allowed to be written to for updating the data therein only after completion of an entire two-frame portion of the waveform and before commencement of a new two-frame portion, to avoid a non-zero average DC voltage across the LCD glass during a two-frame portion. An error bit is set whenever an attempt is made to write to the RAM at times other than between the end of a two-frame portion and the commencement of a new two-frame portion. A response to the error bit is made by returning to the write step that prompted it, to determine whether all of the data intended to be written has been stored in the RAM.
Abstract:
Un sistema para asegurar la operación, a alta temperatura, de circuitos de bajo consumo de energía, que comprende: una unidad funcional integrada que genera una señal de salida con un oscilador (202) que comprende una referencia (203) de corriente y un generador (204) de rampa, en el que la unidad funcional puede ser controlada para operar en un primer modo y en un segundo modo para generar dicha señal de salida, en el que el primer modo es un modo de bajo consumo de energía y el segundo modo es un modo de alta temperatura, en el que el oscilador comprende una entrada de control que recibe una señal de control y en el que, dependiendo de la señal de control, la referencia (203) de corriente y el generador (204) de rampa operan ya sea en el primero o el segundo modos, en el que el oscilador (202) es controlado en el modo de alta temperatura para compensar las corrientes de fuga; y una unidad (201) de selección para controlar la unidad funcional para operar en el modo de bajo consumo de energía o en el modo de alta temperatura.
Abstract:
A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used in some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus increasing performance and decreasing program memory usage.
Abstract:
A microcontroller (50) chip (51) includes a charge pump with a switched-capacitor (83) that develops a plurality of discrete voltages. A switched-capacitor (83) charging circuit selectively charges a capacitor to produce successive charges individually retrievable from the capacitor. An LCD driver (173) selectively transmits the discrete operating voltage levels to activate the LCD (10) according to status of an external system under the control of the microcontroller (50). Voltage losses that may occur during the switched-capacitor (83) charging are compensated to maintain the levels of the discrete operating voltages free of decay. Compensation is achieved by overcharging the capacitor (83) by an amount substantially equivalent to the amount of voltage loss on the capacitor, using active feedback obtained from monitoring the charge on the capacitor.
Abstract:
A dual port random access memory (RAM) stores data representative of information to be displayed on the LCD. The RAM includes a plurality of master data storage latches (150-153) and a single slave data storage latch (154) shared by all of the plurality of master storage latches (150-153). A microcontroller has a central processing unit (CPU) for communicating with the master storage latches (150-153) via one of the RAM ports to periodically change the data stored therein. An LCD control module successively updates the data in the single slave storage latch (154) with data from each of the master storage latches (150-153) and downloads the updated data from the single slave storage latch (154) to a temporary store associated with the LCD after each update from a master storage latch and before the update of data from the next master storage latch.
Abstract:
A device including a microcontroller fabricated on a semiconductor chip is used to control an LCD display of an external system intended to be controlled by the microcontroller. The microcontroller enters a sleep state in which it operates in a battery power conservation mode during periods of time when functional activity of the microcontroller is reduced. The microcontroller awakens from the sleep state for resumption of activity when such a period ends. Timing to the LCD is decoupled from the microcontroller's own internal clock when the independent internal on-chip clock, which may be an RC oscillator, is selected by the user of the device. This allows the chip to continue to drive the LCD display even though the microcontroller's internal clock has stopped during the sleep.
Abstract:
Method and apparatus for controlling the updating of a random access memory (RAM, 137) that stores data for coding the activation of segments of one or more alphanumeric characters of a liquid crystal display (LCD) (30), to maintain substantially a direct current (DC) voltage value of zero across transparent conductive plates of the LCD (30), is performed or provided in a microcontroller having internal LCD (137) control capabilities. A type B waveform is employed for activiting the LCD (30), the waveform being of a type in which data is transmitted over frames, the data in the second frame of which is inverse of data in the first frame thereof to maintain an average DC voltage value over each two-frame portion of the waveform at substantially zero volt.