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公开(公告)号：JP2010282637A
公开(公告)日：2010-12-16
申请号：JP2010157075
申请日：2010-07-09
Applicant: Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
Inventor： SIH GILBERT C , ZOU QUIZHEN , JHA SANJAY K , KANG INYUP , LIN JIAN , MOTIWALA QUAEED , JOHN DEEPU , ZHANG LI , ZHANG HAITAO , LEE WAY-SHING , SAKAMAKI CHARLES E , KANTAK PRASHANT A
CPC classification number: G06F12/0886 , G06F9/30036 , G06F9/30105 , G06F9/30112 , G06F9/3012 , G06F9/30141 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/3816 , G06F9/3885 , G06F9/3893 , G06F15/7807
Abstract: PROBLEM TO BE SOLVED: To provide a digital signal processor which enhances performance and availability. SOLUTION: A DSP includes a set of three data buses over which data may be exchanged with a register bank 120 and three data memories 102, 103 and 104. The register bank 120 may be used that includes registers accessible by at least two processing units 128 and 130. An instruction fetch unit 156 may include that receives instructions of variable length stored in an instruction memory 152. The instruction memory 152 may be separated from the set of three data memories 102, 103 and 104. COPYRIGHT: (C)2011,JPO&INPIT
Abstract translation: 要解决的问题：提供一种提高性能和可用性的数字信号处理器。 解决方案：DSP包括一组三条数据总线，数据可以通过该组三个数据总线与寄存器组120和三个数据存储器102,103和104进行交换。可以使用寄存器组120，其包括可由至少两个 处理单元128和130.指令提取单元156可以包括接收存储在指令存储器152中的可变长度的指令。指令存储器152可以与三组数据存储器102,103和104分离。 ：（C）2011，JPO＆INPIT
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公开(公告)号：JP2011045096A
公开(公告)日：2011-03-03
申请号：JP2010204841
申请日：2010-09-13
Applicant: Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
Inventor： BUTLER BRIAN K , MOHSENI JAFAR M , JOHN DEEPU , ZHANG HAITAO
IPC: H04J13/10 , H04B1/707 , H04B1/7093
CPC classification number: H04B1/7093 , H04B1/707
Abstract: PROBLEM TO BE SOLVED: To provide a system having solved a problem, wherein since respective spread signals output by a spreading system is based on two or more data signals, when using such a spreading system, several separation processes of the data signals must be performed before spreading, but the complexity of the spreading system is increased, when a separation processing operation increases the complexity of the data signal, and a desired operation cannot be attained.
SOLUTION: A spreading system spreads two data signals. The system produces a filtered signal, based on one of the data signals and an output signal that is based on both of the data signals. In one example, a spreading system is used to perform QPSK spreading of two data signals, the QPSK spreading actually including separation processing of the two data signals. Such a separation control can include a filtering and/or a gain control.
COPYRIGHT: (C)2011,JPO&INPITAbstract translation: 要解决的问题：为了提供一种解决问题的系统，其中由于由扩展系统输出的各个扩展信号基于两个或更多个数据信号，当使用这种扩展系统时，数据信号的几个分离处理 必须在扩展之前执行，但是当分离处理操作增加数据信号的复杂性时，扩展系统的复杂性增加，并且不能获得期望的操作。 解决方案：扩展系统扩展两个数据信号。 该系统基于数据信号中的一个和基于两个数据信号的输出信号产生滤波信号。 在一个示例中，扩频系统用于执行两个数据信号的QPSK扩展，实际上QPSK扩展包括两个数据信号的分离处理。 这种分离控制可以包括滤波和/或增益控制。 版权所有（C）2011，JPO＆INPIT
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公开(公告)号：JP2007306582A
公开(公告)日：2007-11-22
申请号：JP2007140429
申请日：2007-05-28
Applicant: Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
Inventor： BUTLER BRIAN K , MOHSENI JAFAR M , JOHN DEEPU , ZHANG HAITAO
IPC: H04J13/10 , H04B1/707 , H04B1/7093
CPC classification number: H04B1/7093 , H04B1/707
Abstract: PROBLEM TO BE SOLVED: To solve the problem that since each spread signal output by a spreading system may be based on more than one data signal, any separate processing of the data signals must be performed before spreading when existing spreading systems are used, but in a case where the separate processing operation increases the complexity of the data signal, the resulting increase in the complexity of the spreading system that may be required may render the desired implementation impracticable.
SOLUTION: Two data signals are spread. The system produces a filtered signal that is based on one of the data signals and an output signal that is based on both of the data signals. In one example, a spreading system is used to perform QPSK spreading of two data signals, including separate processing of the two data signals, in a practical manner. Such separate control may include filtering and/or gain control.
COPYRIGHT: (C)2008,JPO&INPITAbstract translation: 解决的问题为了解决由于扩展系统输出的每个扩展信号可以基于多于一个数据信号的问题，在使用现有的扩展系统时必须在扩展之前执行数据信号的任何单独的处理 但是在单独的处理操作增加数据信号的复杂性的情况下，可能需要的扩展系统的复杂性的增加可使得期望的实现变得不可行。 解决方案：两个数据信号传播。 系统产生基于数据信号之一的滤波信号和基于两个数据信号的输出信号。 在一个示例中，扩展系统用于以实用的方式执行两个数据信号的QPSK扩展，包括两个数据信号的单独处理。 这种单独的控制可以包括滤波和/或增益控制。 版权所有（C）2008，JPO＆INPIT
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公开(公告)号：JP2012060663A
公开(公告)日：2012-03-22
申请号：JP2011248789
申请日：2011-11-14
Applicant: Qualcomm Inc , クゥアルコム・インコーポレイテッドQualcomm Incorporated
Inventor： MOHSENI MOHAMMAD JAFAR , BRIAN BATTLER , JOHN DEEPU , HAITAO ZANG
CPC classification number: H04L27/206 , H04L27/2082
Abstract: PROBLEM TO BE SOLVED: To provide a method and apparatus for rotating the phase of a complex PSK signal.SOLUTION: In applications employing phase-shift keying modulation, phase rotators (200, 202) as disclosed herein are used to rotate the constellation of signal vectors before carrier modulation in order to maximize modulator output power. The rotators (200, 202) may be applied in the digital domain (to complex signals having either binary-valued or multi-valued components) or in the analog domain.
Abstract translation: 要解决的问题：提供用于旋转复合PSK信号的相位的方法和装置。 解决方案：在采用相移键控调制的应用中，如本文所公开的相位旋转器（200,202）用于在载波调制之前旋转信号矢量的星座图，以便最大化调制器输出功率。 旋转器（200,202）可以应用于数字域（具有二进制值或多值分量的复数信号）或模拟域中。 版权所有（C）2012，JPO＆INPIT
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公开(公告)号：HK1094608A1
公开(公告)日：2007-04-04
申请号：HK07101408
申请日：2001-09-04
Applicant: QUALCOMM INC
Inventor： SIH GILBERT C , ZOU QUIZHEN , JHA SANJAY K , KANG INYUP I , LIN JIAN , MOTIWALA QUAEED , JOHN DEEPU , ZHANG LI , ZHANG HAITAO , LEE WAY-SHING , SAKAMAKI CHARLES E , KANTAK PRASHANT A
Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).
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Patent Agency Ranking
公开(公告)号：AT421192T
公开(公告)日：2009-01-15
申请号：AT01992057
申请日：2001-11-03
Applicant: QUALCOMM INC
Inventor： MOHSENI JAFAR , BUTLER BRIAN , JOHN DEEPU , ZHANG HAITAO
Abstract: A system for digital filtering includes a set of logic gates, a state storage, and a multiplexer. The state storage includes two or more storage banks and may also include combinatorial logic and/or at least one lookup table. In one application, a filtering operation according to a finite-impulse-response filter coefficient vector is performed without runtime multiplications. Applications to symmetric and antisymmetric filter coefficient vectors are described, as well as applications to filter coefficient vectors of arbitrary odd or even length.
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公开(公告)号：DE69925720T2
公开(公告)日：2006-03-16
申请号：DE69925720
申请日：1999-03-04
Applicant: QUALCOMM INC
Inventor： SIH C , ZOU QUIZHEN , JHA K , KANG INYUP , LIN JIAN , MOTIWALA QUAEED , JOHN DEEPU , ZHANG LI , ZHANG HAITAO , LEE WAY-SHING , SAKAMAKI E , KANTAK A
Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).
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公开(公告)号：AT297567T
公开(公告)日：2005-06-15
申请号：AT99911150
申请日：1999-03-04
Applicant: QUALCOMM INC
Inventor： SIH GILBERT C , ZOU QUIZHEN , JHA SANJAY K , KANG INYUP , LIN JIAN , MOTIWALA QUAEED , JOHN DEEPU , ZHANG LI , ZHANG HAITAO , LEE WAY-SHING , SAKAMAKI CHARLES E , KANTAK PRASHANT A
Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).
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公开(公告)号：DK1066559T3
公开(公告)日：2005-10-03
申请号：DK99911150
申请日：1999-03-04
Applicant: QUALCOMM INC
Inventor： SIH GILBERT C , ZOU QUIZHEN , JHA SANJAY K , KANG INYUP , LIN JIAN , MOTIWALA QUAEED , JOHN DEEPU , ZHANG LI , ZHANG HAITAO , LEE WAY-SHING , SAKAMAKI CHARLES E , KANTAK PRASHANT A
Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).
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公开(公告)号：AU3253102A
公开(公告)日：2002-05-27
申请号：AU3253102
申请日：2001-11-03
Applicant: QUALCOMM INC
Inventor： MOHSENI JAFAR M , BUTLER BRIAN K , JOHN DEEPU , ZHANG HAITAO
Abstract: A system for digital filtering includes a set of logic gates, a state storage, and a multiplexer. The state storage includes two or more storage banks and may also include combinatorial logic and/or at least one lookup table. In one application, a filtering operation according to a finite-impulse-response filter coefficient vector is performed without runtime multiplications. Applications to symmetric and antisymmetric filter coefficient vectors are described, as well as applications to filter coefficient vectors of arbitrary odd or even length.
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