公开(公告)号：JP2010282637A

公开(公告)日：2010-12-16

申请号：JP2010157075

申请日：2010-07-09

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： SIH GILBERT C ,  ZOU QUIZHEN ,  JHA SANJAY K ,  KANG INYUP ,  LIN JIAN ,  MOTIWALA QUAEED ,  JOHN DEEPU ,  ZHANG LI ,  ZHANG HAITAO ,  LEE WAY-SHING ,  SAKAMAKI CHARLES E ,  KANTAK PRASHANT A

IPC: G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F12/08 ,  G06F13/16 ,  G06F15/78

CPC classification number: G06F12/0886 ,  G06F9/30036 ,  G06F9/30105 ,  G06F9/30112 ,  G06F9/3012 ,  G06F9/30141 ,  G06F9/30149 ,  G06F9/3016 ,  G06F9/30167 ,  G06F9/3816 ,  G06F9/3885 ,  G06F9/3893 ,  G06F15/7807

Abstract: PROBLEM TO BE SOLVED: To provide a digital signal processor which enhances performance and availability. SOLUTION: A DSP includes a set of three data buses over which data may be exchanged with a register bank 120 and three data memories 102, 103 and 104. The register bank 120 may be used that includes registers accessible by at least two processing units 128 and 130. An instruction fetch unit 156 may include that receives instructions of variable length stored in an instruction memory 152. The instruction memory 152 may be separated from the set of three data memories 102, 103 and 104. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种提高性能和可用性的数字信号处理器。 解决方案：DSP包括一组三条数据总线，数据可以通过该组三个数据总线与寄存器组120和三个数据存储器102,103和104进行交换。可以使用寄存器组120，其包括可由至少两个 处理单元128和130.指令提取单元156可以包括接收存储在指令存储器152中的可变长度的指令。指令存储器152可以与三组数据存储器102,103和104分离。 ：（C）2011，JPO＆INPIT

公开(公告)号：JP2009060632A

公开(公告)日：2009-03-19

申请号：JP2008243068

申请日：2008-09-22

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： MOTIWALA QUAEED ,  RIDDLE CHRISTOPHER C ,  BLESSENT LUCA ,  YEH SHIH-YI ,  FUCHS ROBERT J

IPC: H04B1/707 ,  H04B1/7117 ,  H04B7/26

CPC classification number: H04B1/7117 ,  H04B7/2659 ,  H04B2201/70707

Abstract: PROBLEM TO BE SOLVED: To provide a method and an apparatus for efficient use of communication resources for processing a plurality of data frames in a communication system.
SOLUTION: A data frame is partitioned into a plurality of portions of data symbols. A plurality of channel elements is assigned to demodulate data symbols of the plurality of portions of data symbols. Channel elements are assigned to the data frame at high data rate more than to the data frame at low data rate.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于在通信系统中有效利用通信资源来处理多个数据帧的方法和装置。 解决方案：将数据帧分割成多个数据符号部分。 分配多个信道单元以对数据符号的多个部分中的数据符号进行解调。 信道要素以高数据速率被分配给数据帧，而不是以低数据速率分配给数据帧。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：DE60015969T2

公开(公告)日：2005-11-10

申请号：DE60015969

申请日：2000-04-21

Applicant: QUALCOMM INC

Inventor： BLESSENT LUCA ,  MOTIWALA QUAEED

IPC: H04B1/7093 ,  H04B20060101 ,  H04B1/7113 ,  H04B1/7115 ,  H04B7/005 ,  H04B7/216

Abstract: The punctured pilot channel comprises information symbols of uncertain sign punctured into a sequence of pilot channel symbols of predetermined sign. The apparatus includes an information sign demodulation circuit for determining the sign of the information symbols in response to the pilot channel symbols. A continuous pilot generator generates a non-punctured pilot channel of predetermined sign from the information symbols and the pilot channel symbols. In a first embodiment, the information sign demodulator further comprises a dot product circuit for calculating a dot product of the pilot channel symbols and the punctured information symbols, and a threshold comparator for comparing the dot product to a predetermined threshold.

公开(公告)号：AU2607500A

公开(公告)日：2000-08-01

申请号：AU2607500

申请日：2000-01-11

Applicant: QUALCOMM INC

Inventor： AGRAWAL AVNEESH ,  BENDER PAUL E ,  BLESSENT LUCA ,  BUTLER BRIAN K ,  MOTIWALA QUAEED

IPC: H04B1/707 ,  H04B7/26 ,  H04L7/00

Abstract: Techniques for coherent demodulation in the presence of phase discontinuities is described. In the exemplary embodiment, times when phase discontinuities occur are known apriori by a receiver in which demodulation is being performed. In an alternate embodiment, the discontinuity location is signaled to the receiver in advance by the transmitter which generates the signals being demodulated. A pilot signal is prepared for optimal coherent demodulation by the use of two filters: one capable of withstanding the effects of phase discontinuity; a second providing superior filtering performance than the first so long as phase discontinuities are not present. Both filters are simultaneously operated. However, the superior performing filter is selected for use in demodulation whenever possible.

公开(公告)号：DE69925720T2

公开(公告)日：2006-03-16

申请号：DE69925720

申请日：1999-03-04

Applicant: QUALCOMM INC

Inventor： SIH C ,  ZOU QUIZHEN ,  JHA K ,  KANG INYUP ,  LIN JIAN ,  MOTIWALA QUAEED ,  JOHN DEEPU ,  ZHANG LI ,  ZHANG HAITAO ,  LEE WAY-SHING ,  SAKAMAKI E ,  KANTAK A

IPC: G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F12/08 ,  G06F12/0886 ,  G06F15/78

Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).

公开(公告)号：AT297567T

公开(公告)日：2005-06-15

申请号：AT99911150

申请日：1999-03-04

Applicant: QUALCOMM INC

Inventor： SIH GILBERT C ,  ZOU QUIZHEN ,  JHA SANJAY K ,  KANG INYUP ,  LIN JIAN ,  MOTIWALA QUAEED ,  JOHN DEEPU ,  ZHANG LI ,  ZHANG HAITAO ,  LEE WAY-SHING ,  SAKAMAKI CHARLES E ,  KANTAK PRASHANT A

IPC: G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F12/08 ,  G06F12/0886 ,  G06F15/78

Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).

公开(公告)号：BR0009924A

公开(公告)日：2002-12-31

申请号：BR0009924

申请日：2000-04-21

Applicant: QUALCOMM INC

Inventor： BLESSENT LUCA ,  MOTIWALA QUAEED

IPC: H04B1/7093 ,  H04B20060101 ,  H04B1/7113 ,  H04B1/7115 ,  H04B7/005 ,  H04B7/216

Abstract: The punctured pilot channel comprises information symbols of uncertain sign punctured into a sequence of pilot channel symbols of predetermined sign. The apparatus includes an information sign demodulation circuit for determining the sign of the information symbols in response to the pilot channel symbols. A continuous pilot generator generates a non-punctured pilot channel of predetermined sign from the information symbols and the pilot channel symbols. In a first embodiment, the information sign demodulator further comprises a dot product circuit for calculating a dot product of the pilot channel symbols and the punctured information symbols, and a threshold comparator for comparing the dot product to a predetermined threshold.

公开(公告)号：HK1094608A1

公开(公告)日：2007-04-04

申请号：HK07101408

申请日：2001-09-04

Applicant: QUALCOMM INC

Inventor： SIH GILBERT C ,  ZOU QUIZHEN ,  JHA SANJAY K ,  KANG INYUP I ,  LIN JIAN ,  MOTIWALA QUAEED ,  JOHN DEEPU ,  ZHANG LI ,  ZHANG HAITAO ,  LEE WAY-SHING ,  SAKAMAKI CHARLES E ,  KANTAK PRASHANT A

IPC: G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F12/08 ,  G06F12/0886 ,  G06F15/78

Abstract: A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).

公开(公告)号：HK1043889A1

公开(公告)日：2002-09-27

申请号：HK02105486

申请日：2002-07-25

Applicant: QUALCOMM INC

Inventor： BLESSENT LUCA ,  MOTIWALA QUAEED

IPC: H04B1/7093 ,  H04B20060101 ,  H04B1/7113 ,  H04B1/7115 ,  H04B7/005 ,  H04B7/216 ,  H04B

Abstract: The punctured pilot channel comprises information symbols of uncertain sign punctured into a sequence of pilot channel symbols of predetermined sign. The apparatus includes an information sign demodulation circuit for determining the sign of the information symbols in response to the pilot channel symbols. A continuous pilot generator generates a non-punctured pilot channel of predetermined sign from the information symbols and the pilot channel symbols. In a first embodiment, the information sign demodulator further comprises a dot product circuit for calculating a dot product of the pilot channel symbols and the punctured information symbols, and a threshold comparator for comparing the dot product to a predetermined threshold.

公开(公告)号：CA2355837A1

公开(公告)日：2000-07-20

申请号：CA2355837

申请日：2000-01-11

Applicant: QUALCOMM INC

Inventor： BUTLER BRIAN K ,  MOTIWALA QUAEED ,  AGRAWAL AVNEESH ,  BLESSENT LUCA ,  BENDER PAUL E

IPC: H04B1/707 ,  H04B7/26 ,  H04L7/00

Abstract: A novel and improved method and apparatus for coherent demodulation in the presence of phase discontinuities is described. The pilot signal is prepared for optimal coherent demodulation by the use of two filters: one capable of withstanding the effects of phase discontinuity; a second providing superior filtering performance than the first so long as phase discontinuities are no t present. Both filters are simultaneously operated. In the exemplary embodime nt of the present invention, a sliding window filter (410) is employed for the superior performing filter absent phase discontinuity and a block filter (44 0) is employed for use when phase discontinuities are present.