Circuit board
    2.
    发明授权

    公开(公告)号:US11974388B2

    公开(公告)日:2024-04-30

    申请号:US17310657

    申请日:2020-02-13

    Abstract: A circuit board, according to an embodiment, comprises: a first insulating layer; a second insulating layer disposed on one surface of the first insulating layer; and a third insulating layer disposed on the other surface of the first insulating layer. A circuit pattern is disposed on at least one insulating layer from among the first to third insulating layers, at least one insulating layer from among the first to third insulating layers comprises glass fiber, at least one insulating layer from among the first to third insulating layers does not comprise glass fiber, and the thicknesses of the first to third insulating layers are different from each other.

    PCB for heatsink based power delivery

    公开(公告)号:US11963289B2

    公开(公告)日:2024-04-16

    申请号:US17724376

    申请日:2022-04-19

    CPC classification number: H05K1/0218 H05K1/0203 H05K1/115 H05K2201/09481

    Abstract: A printed circuit board (PCB) includes an array of signal pads on a first surface of the PCB, a power contact pad on the first surface, and a ground contact pad on a second surface of the PCB. Each signal pad of the array of signal pads is associated with a signal contact of a central processing unit (CPU). The power contact pad provides power for the CPU apart from the array of signal pads. The ground contact pad provides a ground for the CPU apart from the array of signal pads.

    Wiring substrate
    5.
    发明授权

    公开(公告)号:US11864316B2

    公开(公告)日:2024-01-02

    申请号:US17630630

    申请日:2021-07-16

    Applicant: Fujikura Ltd.

    Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, and a plurality of filled vias. The first insulating layer has a first surface and a second surface positioned on a side opposite to the first surface. The first conductor layer is formed on the first surface of the first insulating layer. The plurality of filled vias are formed inside the first insulating layer. The plurality of filled vias each have a structure in which a via hole penetrating the first insulating layer is filled with a metal. The first conductor layer includes a pad. The pad overlaps the plurality of filled vias in a plan view from a thickness direction of the first insulating layer and is connected to the plurality of filled vias.

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