MEMS RECORDER APPARATUS METHOD AND SYSTEM
    92.
    发明申请
    MEMS RECORDER APPARATUS METHOD AND SYSTEM 有权
    MEMS记录仪设备方法与系统

    公开(公告)号:US20170024345A1

    公开(公告)日:2017-01-26

    申请号:US14532582

    申请日:2014-11-04

    Abstract: A Micro-Electromechanical System (MEMS) recorder is provided. The MEMS recorder includes a scheduler, a serializer, a multiplexer, a transmit/receive switch, a master clock generator, a deserializer, a comparator array to determine whether to generate a signal to wake up a controller and/or a location module from a sleep mode, and a First-In-First-Out (FIFO) memory to output data to be stored and wake up the controller and/or the location module from the sleep mode if a signal to wake up the controller and/or the location module is received or if the FIFO memory is full, wherein the controller and/or the location module is awakened directly by the MEMS recorder or via the controller.

    Abstract translation: 提供了一种微机电系统(MEMS)记录仪。 MEMS记录器包括调度器,串行器,多路复用器,发送/接收开关,主时钟发生器,解串器,比较器阵列,用于确定是否产生将控制器和/或位置模块从 睡眠模式和先入先出(FIFO)存储器,用于输出待存储的数据,并且如果唤醒控制器和/或位置的信号,则将控制器和/或位置模块从睡眠模式唤醒 模块被接收或者如果FIFO存储器已满,其中控制器和/或定位模块被MEMS记录器或经由控制器直接唤醒。

    Integrated MEMS pressure sensor and MEMS inertial sensor
    93.
    发明授权
    Integrated MEMS pressure sensor and MEMS inertial sensor 有权
    集成MEMS压力传感器和MEMS惯性传感器

    公开(公告)号:US09550668B1

    公开(公告)日:2017-01-24

    申请号:US14834498

    申请日:2015-08-25

    Abstract: Integrated MEMS devices for pressure sensing and inertial sensing, methods for fabricating such integrated devices, and methods for fabricating vertically integrated MEMS pressure sensor/inertial sensor devices are provided. In an example, a method for fabricating an integrated device for pressure and inertial sensing includes forming a MEMS pressure sensor on a first side of a semiconductor substrate. The method further includes forming a MEMS inertial sensor on a second side of the semiconductor substrate. The second side of the semiconductor substrate is opposite the first side of the semiconductor substrate.

    Abstract translation: 提供用于压力感测和惯性感测的集成MEMS器件,用于制造这种集成器件的方法,以及用于制造垂直集成的MEMS压力传感器/惯性传感器器件的方法。 在一个示例中,用于制造用于压力和惯性感测的集成装置的方法包括在半导体衬底的第一侧上形成MEMS压力传感器。 该方法还包括在半导体衬底的第二侧上形成MEMS惯性传感器。 半导体衬底的第二面与半导体衬底的第一侧相对。

    Capacitive micromechanical sensor structure and micromechanical accelerometer
    95.
    发明授权
    Capacitive micromechanical sensor structure and micromechanical accelerometer 有权
    电容式微机械传感器结构和微机械加速度计

    公开(公告)号:US09547020B2

    公开(公告)日:2017-01-17

    申请号:US14314243

    申请日:2014-06-25

    Abstract: The invention relates to a capacitive micromechanical sensor structure comprising a stator structure rigidly anchored to a substrate and a rotor structure movably anchored by means of spring structures to the substrate. The stator structure has a plurality of stator finger support beams and the rotor structure has a plurality of rotor finger support beams. Stator fingers along the stator finger support beam of the stator structure extend into rotor gaps along the rotor finger support beam of the rotor structure, and rotor fingers along the rotor finger support beam of the rotor structure extend into stator gaps along the stator finger support beam of the stator structure.

    Abstract translation: 本发明涉及一种电容微机械传感器结构,其包括刚性地锚定到基底的定子结构和通过弹簧结构可移动地锚定到基底的转子结构。 定子结构具有多个定子指状支撑梁,转子结构具有多个转子手指支撑梁。 沿着定子结构的定子指状支撑梁的定子指状物沿着转子结构的转子指状支撑梁延伸到转子间隙中,沿着转子结构的转子指状支撑梁的转子指状物沿着定子指状支撑梁延伸到定子间隙中 的定子结构。

    Recess with Tapered Sidewalls for Hermetic Seal in MEMS Devices
    98.
    发明申请
    Recess with Tapered Sidewalls for Hermetic Seal in MEMS Devices 有权
    嵌入式锥形侧壁用于MEMS器件中的密封

    公开(公告)号:US20160332867A1

    公开(公告)日:2016-11-17

    申请号:US14713287

    申请日:2015-05-15

    Abstract: An integrated circuit (IC) device is provided. The IC device includes a first substrate having a frontside and a backside. The backside includes a first cavity extending into the first substrate. A dielectric layer is disposed on the backside of the first substrate, and includes an opening corresponding to the first cavity and a trench extending laterally away from the opening and terminating at a gas inlet recess. A recess in the frontside of the first substrate extends downwardly from the frontside to the dielectric layer. The recess has substantially vertical upper sidewalls which adjoin lower sidewalls which taper inwardly from the substantially vertical sidewalls to points on the dielectric layer which circumscribe the gas inlet recess. A conformal sealant layer is arranged over the frontside of the first substrate, along the substantially vertical upper sidewalls, and along the lower sidewalls. The sealant layer hermetically seals the gas inlet recess.

    Abstract translation: 提供集成电路(IC)装置。 IC器件包括具有前侧和后侧的第一基板。 背面包括延伸到第一基底中的第一腔。 电介质层设置在第一基板的背面,并且包括对应于第一空腔的开口和从开口横向延伸并终止于气体入口凹部的沟槽。 第一衬底的前侧的凹部从前侧向下延伸到电介质层。 凹部具有基本上垂直的上侧壁,其邻接下部侧壁,所述下侧壁从基本上垂直的侧壁向内逐渐向包围气体入口凹部的电介质层上的点倾斜。 共形密封剂层沿着基本垂直的上侧壁以及沿着下侧壁设置在第一基板的前侧上。 密封剂层密封气体入口凹部。

    STRUCTURE TO REDUCE BACKSIDE SILICON DAMAGE
    100.
    发明申请
    STRUCTURE TO REDUCE BACKSIDE SILICON DAMAGE 有权
    结构减少背面的硅损坏

    公开(公告)号:US20160318757A1

    公开(公告)日:2016-11-03

    申请号:US14699094

    申请日:2015-04-29

    Abstract: A method of forming an IC (integrated circuit) device is provided. The method includes receiving a first wafer including a first substrate and including a plasma-reflecting layer disposed on an upper surface thereof. The plasma-reflecting layer is configured to reflect a plasma therefrom. A dielectric protection layer is formed on a lower surface of a second wafer, wherein the second wafer includes a second substrate. The second wafer is bonded to the first wafer, such that a cavity is formed between the plasma-reflecting layer and the dielectric protection layer. An etch process is performed with the plasma to form an opening extending from an upper surface of the second wafer and through the dielectric protection layer into the cavity. A resulting structure of the above method is also provided.

    Abstract translation: 提供一种形成IC(集成电路)装置的方法。 该方法包括接收包括第一基板的第一晶片,并且包括设置在其上表面上的等离子体反射层。 等离子体反射层被配置为从其反射等离子体。 介电保护层形成在第二晶片的下表面上,其中第二晶片包括第二基板。 第二晶片被接合到第一晶片,使得在等离子体反射层和介电保护层之间形成空腔。 用等离子体进行蚀刻工艺以形成从第二晶片的上表面延伸并通过介电保护层进入空腔的开口。 还提供了上述方法的结果。

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