中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

1344 records (took 0.028 seconds)

    MULTILAYER CHIP CAPACITOR, CIRCUIT BOARD APPARATUS HAVING THE CAPACITOR, AND CIRCUIT BOARD
    102.
    发明申请
    MULTILAYER CHIP CAPACITOR, CIRCUIT BOARD APPARATUS HAVING THE CAPACITOR, AND CIRCUIT BOARD 有权
    多层芯片电容器，具有电容器的电路板装置和电路板

    公开(公告)号：US20090059469A1

    公开(公告)日：2009-03-05

    申请号：US12198342

    申请日：2008-08-26

    Applicant: Byoung Hwa LEE ,  Sung Kwon WI ,  Hae Suk CHUNG ,  Dong Seok PARK ,  Sang So PARK ,  Min Cheol PARK

    Inventor： Byoung Hwa LEE ,  Sung Kwon WI ,  Hae Suk CHUNG ,  Dong Seok PARK ,  Sang So PARK ,  Min Cheol PARK

    IPC: H01G4/06 ,  H01G4/228 ,  H05K7/00

    CPC classification number: H01G4/232 ,  H01G4/012 ,  H01G4/30 ,  H01G4/385 ,  H05K1/0231 ,  H05K1/113 ,  H05K2201/09309 ,  H05K2201/09772 ,  H05K2201/0979 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

    Abstract: Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.

    Abstract translation: 本发明提供一种多层片状电容器，其包括具有层叠方向配置的第一和第二电容器单元的电容器体; 以及形成在电容器主体外部的多个外部电极。 第一电容器单元包括交替设置在电容器主体的内部的至少一对第一和第二内部电极，第二电容器单元包括交替设置在电容器主体内部的多个第三和第四内部电极， 并且第一至第四内部电极耦合到第一至第四外部电极。 第一电容器单元具有比第二电容器单元更低的等效串联电感（ESL），并且第一电容器单元具有比第二电容器单元更高的等效串联电阻（ESR）。

    SEMICONDUCTOR MEMORY MODULE INCORPORATING ANTENNA
    103.
    发明申请
    SEMICONDUCTOR MEMORY MODULE INCORPORATING ANTENNA 失效
    半导体存储器模块天线

    公开(公告)号：US20090040734A1

    公开(公告)日：2009-02-12

    申请号：US12280456

    申请日：2007-03-28

    Applicant: Shozo Ochi ,  Hidenobu Nishikawa ,  Hiroshi Sakurai

    Inventor： Shozo Ochi ,  Hidenobu Nishikawa ,  Hiroshi Sakurai

    IPC: H01Q7/00 ,  H05K1/03

    CPC classification number: G06K19/0723 ,  G06K19/07732 ,  G06K19/07749 ,  H01Q1/2208 ,  H05K1/0306 ,  H05K1/0373 ,  H05K1/09 ,  H05K1/117 ,  H05K1/144 ,  H05K1/16 ,  H05K2201/086 ,  H05K2201/09309

    Abstract: The semiconductor memory module incorporating antenna includes a wiring board (11) having a connection terminal (17) connected with a control semiconductor element (16) and arranged at a position exposed to the surface of an outer case (15), and a terminal electrode (18) for antenna connection connected with the control semiconductor element (16) and arranged in the outer case (15); a semiconductor storage element (12) mounted on one side of the wiring board (11); and a loop-like antenna (13) and an antenna terminal electrode (20) formed on the other side of the wiring board (11) along the outer peripheral thereof, the wiring board (11) includes at least one magnetic body layer (14) and the terminal electrode (18) for antenna connection is connected with the antenna terminal electrode (20).

    Abstract translation: 具有天线的半导体存储器模块包括具有连接端子（17）的布线板（11），该连接端子（17）与控制半导体元件（16）连接并布置在暴露于外壳（15）的表面的位置处，以及端子电极 （18），用于与控制半导体元件（16）连接并布置在外壳（15）中的天线连接; 安装在所述布线板（11）一侧的半导体存储元件（12）。 以及沿其外周形成在布线板（11）的另一侧的环状天线（13）和天线端子电极（20），布线基板（11）包括至少一个磁性体层（14） ）和用于天线连接的端子电极（18）与天线端子电极（20）连接。

    MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
    104.
    发明申请
    MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 有权
    多层印刷线路板及其制造方法

    公开(公告)号：US20090038835A1

    公开(公告)日：2009-02-12

    申请号：US12186604

    申请日：2008-08-06

    Applicant: Hironori Tanaka ,  Keisuke Shimizu

    Inventor： Hironori Tanaka ,  Keisuke Shimizu

    IPC: H05K3/30 ,  H05K1/16

    CPC classification number: H05K1/162 ,  H05K1/09 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/096 ,  H05K2201/09718 ,  Y10T29/4913

    Abstract: A multilayer printed wiring board includes a core substrate, a resin insulation layer laminated on the core substrate and a capacitor section coupled to the resin insulating layer. The capacitor section includes a first electrode including a first metal and configured to be charged by a negative charge, and a second electrode including a second metal and opposing the first electrode, the second electrode configured to be charged by a positive charge. A dielectric layer is interposed between the first electrode and second electrode, and an ionization tendency of the first metal is larger than and ionization tendency of the second metal.

    Abstract translation: 多层印刷线路板包括芯基板，层叠在芯基板上的树脂绝缘层和耦合到树脂绝缘层的电容器部分。 电容器部分包括第一电极，其包括第一金属并被构造为通过负电荷充电;以及第二电极，包括第二金属并与第一电极相对，第二电极被配置为通过正电荷充电。 电介质层插入在第一电极和第二电极之间，第一金属的电离倾向大于第二金属的离子化倾向。

    Methods and apparatuses for thermal dissipation
    107.
    发明授权
    Methods and apparatuses for thermal dissipation 有权
    散热方法和装置

    公开(公告)号：US07474534B2

    公开(公告)日：2009-01-06

    申请号：US11978860

    申请日：2007-10-29

    Applicant: Ping Liu ,  Min Li

    Inventor： Ping Liu ,  Min Li

    IPC: H05K7/20 ,  G06F1/16

    CPC classification number: H05K1/0209 ,  G06F1/203 ,  H05K2201/066 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/10446

    Abstract: A method and apparatus for providing thermal dissipation from a PC card is disclosed. For one embodiment of the invention, an extension portion, having a heat sink implemented thereon, is provided for a PC card. The extension portion extends beyond the PC card slot allowing thermal dissipation from the card due to air flow over the heat sink. For one embodiment of the invention, heat producing components of the PC card are identified and a thermally conductive path is provided from the components to the extension portion of the PC card.

    Abstract translation: 公开了一种用于从PC卡提供散热的方法和装置。 对于本发明的一个实施例，为PC卡提供了具有其上实现的散热器的延伸部分。 延伸部分延伸超出PC卡槽，由于空气流过散热器，可以从卡散热。 对于本发明的一个实施例，识别出PC卡的发热部件，并且从部件到PC卡的延伸部分提供导热路径。

    Method of making a circuitized substrate having at least one capacitor therein
    108.
    发明申请
    Method of making a circuitized substrate having at least one capacitor therein 审中-公开
    制造其中具有至少一个电容器的电路化基板的方法

    公开(公告)号：US20080248596A1

    公开(公告)日：2008-10-09

    申请号：US11878673

    申请日：2007-07-26

    Applicant: Rabindra N. Das ,  Frank D. Egitto ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich

    Inventor： Rabindra N. Das ,  Frank D. Egitto ,  How T. Lin ,  John M. Lauffer ,  Voya R. Markovich

    IPC: H01L21/77

    CPC classification number: H01G4/206 ,  H01G4/232 ,  H01G4/33 ,  H05K1/162 ,  H05K3/0032 ,  H05K3/107 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/09236 ,  H05K2201/09309 ,  H05K2201/09881 ,  H05K2203/0108 ,  H05K2203/066

    Abstract: A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art. In still another embodiment, at least two spaced-apart conductors may be formed within a metal layer deposited on a dielectric layer, these conductors defining a channel there-between. The capacitive dielectric material may then be deposited (e.g., using lamination) within the channels.

    Abstract translation: 一种制造电路化衬底的方法，其包括至少一个可能的几个电容器作为其一部分。 在一个实施例中，通过在电介质层上形成电容电介质材料层，然后用电容材料形成通道，例如使用激光来制造衬底。 然后使用所选择的沉积技术，例如溅射，无电镀和电镀，用导电材料（例如铜）填充通道。 然后在电容器顶部形成第二电介质层，并产生电容器“芯”。 然后，该“芯”可以与其它电介质层和导电层组合以形成较大的多层PCB或芯片载体。 在替代方法中，电容介电材料可以是可光成像的，其中通道是使用本领域已知的常规曝光和显影处理形成的。 在另一个实施例中，可以在沉积在电介质层上的金属层内形成至少两个间隔开的导体，这些导体在其间限定通道。 然后可以在通道内沉积（例如，使用层压）的电容电介质材料。

    Capacitive/resistive devices, organic dielectric laminates and printed wiring boards incorporating such devices, and methods of making thereof
    109.
    发明授权
    Capacitive/resistive devices, organic dielectric laminates and printed wiring boards incorporating such devices, and methods of making thereof 有权
    电容/电阻装置，有机介电层压板和包含这种装置的印刷线路板及其制造方法

    公开(公告)号：US07430128B2

    公开(公告)日：2008-09-30

    申请号：US10967541

    申请日：2004-10-18

    Applicant: William J. Borland ,  G. Sidney Cox ,  David Ross McGregor

    Inventor： William J. Borland ,  G. Sidney Cox ,  David Ross McGregor

    IPC: H05K1/16

    CPC classification number: H05K1/167 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/0154 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09672 ,  H05K2201/09763 ,  H05K2203/0361 ,  H05K2203/1461 ,  Y10T29/435

    Abstract: This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode, a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0. This invention also relates to a method of making the device.

    Abstract translation: 本发明涉及可以嵌入在印刷线路板的层内的电容/电阻装置。 嵌入器件节省了电路板表面的空间，并减少了焊接连接的数量，从而提高了可靠性。 更具体地，该装置包括第一金属箔; 第二金属箔; 由所述第一金属箔形成的第一电极; 设置在所述第一电极上的电介质; 形成在电介质上并与其相邻的电阻元件; 导电迹线 以及由所述第二金属箔形成并且设置在所述电介质上并与所述电阻元件电接触的第二电极，其中所述电介质设置在所述第一电极和所述第二电极之间，并且其中所述电介质包括介电常数小于 4.0。 本发明还涉及制造该装置的方法。

Patent Agency Ranking