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111.发明申请公开(公告)号：US20170232474A1
公开(公告)日：2017-08-17
申请号：US15225118
申请日：2016-08-01
Applicant: North Carolina State University
Inventor： Omer Oralkan , Feysel Yalcin Yamaner , Xiao Zhang
CPC classification number: B06B1/0292 , B06B1/0215 , B06B2201/51 , B81B2201/0271 , B81B2201/0292 , B81B2201/047 , B81B2207/053 , B81C3/001 , B81C2203/031
Abstract: A capacitive micromachined ultrasonic transducer (CMUT) and methods of forming the same are disclosed herein. In one implementation, the CMUT comprises a glass substrate having a cavity; a patterned metal bottom electrode situated within the cavity of the glass substrate; and a vibrating plate comprising at least a conducting layer, wherein the vibrating plate is anodically bonded to the glass substrate to form an air-tight seal between the vibrating plate and the substrate and wherein a pressure inside the cavity is less than atmospheric pressure (i.e., a vacuum). In another implementation, the CMUT comprises a glass substrate with Through-Glass-Via (TGV) interconnects, wherein a metal electrode is electrically connected to a TGV and wherein said metal electrode can be in the bottom of a cavity of the glass substrate or on the vibrating plate.
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公开(公告)号：US20170015548A1
公开(公告)日：2017-01-19
申请号：US14963362
申请日：2015-12-09
Applicant: Texas Instruments Incorporated
Inventor： Jie Mao , Hau Nguyen , Luu Nguyen , Anindya Poddar
CPC classification number: B81C1/00873 , B81B7/007 , B81B2201/0214 , B81B2201/0235 , B81B2201/0257 , B81B2201/0264 , B81B2201/0278 , B81B2201/0292 , B81B2201/047 , B81B2207/07 , B81B2207/098 , B81C1/00333 , B81C2201/0125 , B81C2201/0132 , B81C2201/0159 , B81C2201/0181 , B81C2201/0188 , B81C2203/0136 , H01L21/561 , H01L21/568 , H01L21/6836 , H01L23/3121 , H01L24/19 , H01L2221/68359 , H01L2224/04105 , H01L2224/96 , H01L2924/3511
Abstract: A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.
Abstract translation: 一种以面板格式制造具有开口腔（110a）的封装半导体器件（100）的方法; 将具有平垫（230）和对称放置的垂直柱（231）的金属片的面板尺寸网格放置（处理201）在粘合剂载带上。 将具有传感器系统的半导体芯片（工艺202）面朝下地附接到带上; 层压（工艺203）和减薄（工艺204）低CTE绝缘材料（234）以填充芯片和网格之间的间隙; 翻转（过程205）组装以去除胶带; 等离子体清洁组件正面，溅射和图案化（工艺206）跨组合均匀的金属层和任选的电镀（工艺209）金属层以形成重新布线迹线和扩展的接触垫用于组装; 层压（工艺212）跨板的绝缘加强件; 在加强件中打开（过程213）空腔以接近传感器系统; 并通过切割金属片来分割（处理214）包装的装置。
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公开(公告)号：US09540229B2
公开(公告)日：2017-01-10
申请号：US14962945
申请日：2015-12-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Giuseppe Bruno , Sebastiano Conti , Mario Chiricosta , Michele Vaiana , Calogero Marco Ippolito , Mario Maiore , Daniele Casella
IPC: B81B7/00
CPC classification number: B81B7/007 , B81B7/02 , B81B2201/0264 , B81B2201/0292 , B81B2207/094 , G01L19/0092 , G01N27/223 , H01L23/3121 , H01L2224/32145 , H01L2224/48091 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
Abstract: A packaged sensor assembly includes: a packaging structure, having at least one opening; a humidity sensor and a pressure sensor, which are housed inside the packaging structure and communicate fluidically with the outside through the opening, and a control circuit, operatively coupled to the humidity sensor and to the pressure sensor; wherein the humidity sensor and the control circuit are integrated in a first chip, and the pressure sensor is integrated in a second chip distinct from the first chip and bonded to the first chip.
Abstract translation: 包装传感器组件包括：具有至少一个开口的包装结构; 湿度传感器和压力传感器，其容纳在包装结构内并通过开口与外部流体连通;以及控制电路，可操作地耦合到湿度传感器和压力传感器; 其中所述湿度传感器和所述控制电路集成在第一芯片中，并且所述压力传感器集成在与所述第一芯片不同的第二芯片中并且被结合到所述第一芯片。
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公开(公告)号：US20160347605A1
公开(公告)日：2016-12-01
申请号：US14723927
申请日：2015-05-28
Applicant: InvenSense, Inc.
Inventor： Matthew Thompson , Joseph Seeger
IPC: B81B3/00
CPC classification number: B81B3/0086 , B81B7/02 , B81B2201/014 , B81B2201/0214 , B81B2201/0235 , B81B2201/0242 , B81B2201/0257 , B81B2201/0264 , B81B2201/0271 , B81B2201/0292 , B81B2201/036 , B81B2203/0118 , B81B2203/0307 , B81B2203/04 , B81B2207/012 , B81C2203/0792 , H01H1/0036
Abstract: A system and/or method for utilizing MEMS switching technology to operate MEMS sensors. As a non-limiting example, a MEMS switch may be utilized to control DC and/or AC bias applied to MEMS sensor structures. Also for example, one or more MEMS switches may be utilized to provide drive signals to MEMS sensors (e.g., to provide a drive signal to a MEMS gyroscope).
Abstract translation: 一种利用MEMS开关技术来操作MEMS传感器的系统和/或方法。 作为非限制性示例，可以使用MEMS开关来控制施加到MEMS传感器结构的DC偏压和/或AC偏压。 也可以使用一个或多个MEMS开关来向MEMS传感器提供驱动信号（例如，向MEMS陀螺仪提供驱动信号）。
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公开(公告)号：US20160320426A1
公开(公告)日：2016-11-03
申请号：US15206935
申请日：2016-07-11
Applicant: Motion Engine, Inc.
Inventor： Robert Mark Boysel , Louis Ross
IPC: G01P15/18 , G01P15/125 , B81B7/00
CPC classification number: B81B7/007 , B81B2201/0235 , B81B2201/0242 , B81B2201/0257 , B81B2201/0264 , B81B2201/0278 , B81B2201/0292 , B81B2207/012 , B81B2207/07 , B81C1/00238 , G01P15/0802 , G01P15/125 , G01P15/18 , H01L2224/16145
Abstract: The present invention provides a 3D System (“3DS”) MEMS architecture that enables the integration of MEMS devices with IC chips to form a System on Chip (SoC) or System in Package (SiP). The integrated MEMS system comprises at least one MEMS chip, including MEMS transducers, and at least one IC chip, including not only MEMS processing circuitry, but also additional/auxiliary circuitry to process auxiliary signals. The MEMS chip can include first and second insulated conducting pathways. The first pathways conduct the MEMS-signals between the transducers and the IC chip, for processing; and the second conducting pathways can extend through the entire thickness of the MEMS chip, to conduct auxiliary signals, such as power, RF, I/Os, to the IC chip, to be processed the additional circuitry.
Abstract translation: 本发明提供了一种3D系统（“3DS”）MEMS架构，其能够将MEMS器件与IC芯片集成以形成片上系统（SoC）或系统级封装（SiP）。 集成MEMS系统包括至少一个MEMS芯片，包括MEMS换能器，以及至少一个IC芯片，不仅包括MEMS处理电路，还包括用于处理辅助信号的附加/辅助电路。 MEMS芯片可以包括第一和第二绝缘导电路径。 第一路通过传感器和IC芯片之间的MEMS信号进行处理; 并且第二导电路径可以延伸穿过MEMS芯片的整个厚度，以将辅助信号（例如功率，RF，I / O）传送到IC芯片，以便处理附加电路。
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Patent Agency Ranking
公开(公告)号：US20160297675A1
公开(公告)日：2016-10-13
申请号：US15183540
申请日：2016-06-15
Applicant: Yuichi ANDO , Yukito Sato , Katsunori Mae
Inventor： Yuichi ANDO , Yukito Sato , Katsunori Mae
CPC classification number: B81C1/00301 , B81B7/007 , B81B2201/0235 , B81B2201/0264 , B81B2201/0292 , B81B2201/047 , B81B2207/095 , B81C2203/031 , B81C2203/0707 , H01L24/03 , H01L24/09 , H01L2924/1461 , H01L2924/15788 , H01L2924/00
Abstract: A device including a first substrate in which a functional element and an electrode are formed; a second substrate in which a through electrode is formed; a joining material that joins the first substrate and the second substrate while reserving a predetermined space between the functional element and the second substrate; and a conductive material that electrically connects the electrode to the through electrode. Here, the joining material is harder than the conductive material, and the joining material is electrically less conductive than the conductive material.
Abstract translation: 一种包括形成功能元件和电极的第一基板的装置; 形成通孔的第二基板; 连接材料，其在所述功能元件和所述第二基板之间保留预定空间的同时连接所述第一基板和所述第二基板; 以及将电极与贯通电极电连接的导电材料。 这里，接合材料比导电材料硬，并且接合材料比导电材料导电性更差。
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公开(公告)号：US20160289063A1
公开(公告)日：2016-10-06
申请号：US14778514
申请日：2014-04-17
Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
Inventor： Ilker E. Ocak , Julius Ming Lin Tsai , Navab Singh
IPC: B81B7/00 , G01P15/125 , G01R33/028 , B81C1/00
CPC classification number: B81B7/0048 , B81B2201/0235 , B81B2201/0242 , B81B2201/0271 , B81B2201/0292 , B81B2203/04 , B81B2207/07 , B81C1/00285 , B81C2203/0118 , B81C2203/0172 , G01C19/56 , G01P15/0802 , G01P15/125 , G01P2015/0814 , G01P2015/0828 , G01R33/00 , G01R33/0052 , G01R33/0286 , H01L25/00 , H01L2924/0002 , H01L2924/00
Abstract: An electromechanical device and method of fabrication thereof comprising: providing a first wafer with a circuit arrangement on a first surface thereof and a first electrode on a second surface thereof; forming first and second via structures from the first surface to the second surface of the first wafer, said first via electrically connecting the first electrode with the circuit arrangement; providing a second wafer with a suspended structure on a first surface thereof; forming a second electrode on the suspended structure; forming an interconnect structure on the first surface of the second wafer that electrically connects with the second electrode; bonding the first wafer to the second wafer with the second surface of the first wafer facing the first surface of the second wafer, with the second via structure electrically connecting the circuit arrangement to the interconnect structure, and the first and second electrodes forming a capacitive structure.
Abstract translation: 一种机电装置及其制造方法，包括：在其第一表面上提供具有电路装置的第一晶片和在其第二表面上的第一电极; 从所述第一晶片的第一表面到所述第二表面形成第一和第二通孔结构，所述第一通孔将所述第一电极与所述电路装置电连接; 在其第一表面上提供具有悬挂结构的第二晶片; 在所述悬挂结构上形成第二电极; 在与第二电极电连接的第二晶片的第一表面上形成互连结构; 将第一晶片接合到第二晶片，其中第一晶片的第二表面面向第二晶片的第一表面，其中第二通孔结构将电路装置电连接到互连结构，并且第一和第二电极形成电容结构 。
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118.发明授权公开(公告)号：US09376310B2
公开(公告)日：2016-06-28
申请号：US14806481
申请日：2015-07-22
Applicant: FREESCALE SEMICONDUCTOR INC.
Inventor： Philip H. Bowles , Stephen R. Hooper
CPC classification number: B81B7/0074 , B81B7/0041 , B81B7/007 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/0292 , B81B2207/096 , H01L25/16 , H01L25/50 , H01L2224/48091 , H01L2924/00014
Abstract: Methods for fabricating multi-sensor microelectronic packages and multi-sensor microelectronic packages are provided. In one embodiment, the method includes positioning a magnetometer wafer comprised of an array of non-singulated magnetometer die over an accelerometer wafer comprised of an array of non-singulated accelerometer die. The magnetometer wafer is bonded to the accelerometer wafer to produce a bonded wafer stack. The bonded wafer stack is then singulated to yield a plurality of multi-sensor microelectronic packages each including a singulated magnetometer die bonded to a singulated accelerometer die.
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公开(公告)号：US09316704B2
公开(公告)日：2016-04-19
申请号：US14463814
申请日：2014-08-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Kuei-Sung Chang , Chun-Wen Cheng
CPC classification number: G01R33/06 , B81B2201/0292 , B81C1/00182 , G01R33/0286
Abstract: The present disclosure relates to a MEMS device with a magnetic film disposed on a first substrate, and an associated method of formation. In some embodiments, the magnetic film is disposed on a planar front surface of the first substrate such that depositing and patterning processes of the magnetic film is improved. A sensing gap of a MEMS device associated with the magnetic film is located between the magnetic film and a recessed lateral surface of a second substrate. The second substrate is bonded to the first substrate at front surfaces of the first and second substrate. Forming the magnetic film on the planar front allows for patterning of the magnetic film without leaving unwanted residues of magnetic material. Without the unwanted residue of magnetic material, less contamination from the magnetic material is introduced after dry etching and passivation processes, improving yield and reliability of the MEMS device.
Abstract translation: 本公开涉及具有设置在第一基板上的磁性膜的MEMS器件和相关联的形成方法。 在一些实施例中，磁性膜设置在第一基板的平面前表面上，使得磁性膜的沉积和图案化工艺得到改善。 与磁性膜相关联的MEMS器件的感测间隙位于第二衬底的磁性膜和凹入的侧表面之间。 第二基板在第一和第二基板的前表面处接合到第一基板。 在平坦的前表面上形成磁性膜允许磁性膜的图案化，而不会留下不需要的磁性材料残留物。 没有磁性材料的不需要的残留物，在干蚀刻和钝化处理之后，引入较少的磁性材料污染，提高了MEMS器件的成品率和可靠性。
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公开(公告)号：US20160054401A1
公开(公告)日：2016-02-25
申请号：US14463814
申请日：2014-08-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Kuei-Sung Chang , Chun-Wen Cheng
CPC classification number: G01R33/06 , B81B2201/0292 , B81C1/00182 , G01R33/0286
Abstract: The present disclosure relates to a MEMS device with a magnetic film disposed on a first substrate, and an associated method of formation. In some embodiments, the magnetic film is disposed on a planar front surface of the first substrate such that depositing and patterning processes of the magnetic film is improved. A sensing gap of a MEMS device associated with the magnetic film is located between the magnetic film and a recessed lateral surface of a second substrate. The second substrate is bonded to the first substrate at front surfaces of the first and second substrate. Forming the magnetic film on the planar front allows for patterning of the magnetic film without leaving unwanted residues of magnetic material. Without the unwanted residue of magnetic material, less contamination from the magnetic material is introduced after dry etching and passivation processes, improving yield and reliability of the MEMS device.
Abstract translation: 本公开涉及具有设置在第一基板上的磁性膜的MEMS器件和相关联的形成方法。 在一些实施例中，磁性膜设置在第一基板的平面前表面上，使得磁性膜的沉积和图案化工艺得到改善。 与磁性膜相关联的MEMS器件的感测间隙位于第二衬底的磁性膜和凹入的侧表面之间。 第二基板在第一和第二基板的前表面处接合到第一基板。 在平坦的前表面上形成磁性膜允许磁性膜的图案化，而不会留下不需要的磁性材料残留物。 没有磁性材料的不需要的残留物，在干法蚀刻和钝化处理之后引入较少的磁性材料污染，提高MEMS器件的产量和可靠性。
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