公开(公告)号：US09414493B2

公开(公告)日：2016-08-09

申请号：US14715943

申请日：2015-05-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Andreas C. Doering ,  Ralph Heller ,  Ronald P. Luijten ,  Martin L. Schmatz

IPC: H05K1/11 ,  H01R12/52 ,  H01R13/24 ,  H05K1/14 ,  H01R12/73 ,  H01R43/26 ,  H05K3/36

CPC classification number: H05K1/117 ,  H01R12/52 ,  H01R12/73 ,  H01R13/2414 ,  H01R43/26 ,  H05K1/144 ,  H05K3/368 ,  H05K2201/0133 ,  H05K2201/0314 ,  H05K2201/041 ,  H05K2201/042 ,  H05K2201/10159 ,  H05K2201/10189 ,  H05K2201/10265 ,  H05K2201/10954 ,  Y10T29/49128

Abstract: A printed circuit board (PCB) assembly includes a first PCB and a second PCB disposed substantially parallel and opposite to each other, such that a second side of the first PCB is opposite to a first side of the second PCB; wherein the second PCB has a first set of side connectors on its first side and a second set of side connectors on its second side, configured for both electrical power supply to and signal communication with the second PCB; the second PCB both electrically and mechanically connected to the second side of the first PCB via a first elastomeric connector; and the second PCB electrically connected to the first PCB via its second set of side connectors and a flexible electrical connector that is electrically connected to the second set of side connectors and the first PCB.

Abstract translation: 印刷电路板（PCB）组件包括基本上平行且彼此相对设置的第一PCB和第二PCB，使得第一PCB的第二面与第二PCB的第一侧相对; 其中所述第二PCB在其第一侧上具有第一组侧连接器，在其第二侧上具有第二组侧连接器，其被配置用于与所述第二PCB的电力供应和信号通信; 第二PCB经由第一弹性体连接器电连接和机械地连接到第一PCB的第二侧; 并且所述第二PCB经由其第二组侧连接器电连接到所述第一PCB，以及电连接到所述第二组侧连接器和所述第一PCB的柔性电连接器。

公开(公告)号：US20160218166A1

公开(公告)日：2016-07-28

申请号：US15006481

申请日：2016-01-26

Applicant: Japan Display Inc.

Inventor： Toshihiko FUKUMA ,  Norio OKU

IPC: H01L27/32 ,  H01L25/16 ,  H01L51/52

CPC classification number: H01L27/3276 ,  H01L25/167 ,  H01L27/323 ,  H01L2251/5338 ,  H01L2924/0002 ,  H05K1/147 ,  H05K2201/041 ,  H05K2201/09063 ,  H05K2201/10128 ,  H01L2924/00

Abstract: The display module includes first and second FPC substrates disposed on top of each other. The first substrate has an IC mounted on it. The second FPC substrate has a cutout inside which the IC is disposed.

Abstract translation: 显示模块包括彼此顶部布置的第一和第二FPC基板。 第一基板具有安装在其上的IC。 第二FPC基板具有设置有IC的切口。

公开(公告)号：US20160197400A1

公开(公告)日：2016-07-07

申请号：US14591120

申请日：2015-01-07

Applicant: DELPHI TECHNOLOGIES, INC.

Inventor： DAVID W. ZIMMERMAN ,  JAMES F. SEARCY ,  CHARLES I. DELHEIMER

IPC: H01Q1/50 ,  H05K1/02

CPC classification number: H01Q1/50 ,  H01L23/66 ,  H01L2223/6683 ,  H01L2224/48472 ,  H01L2224/49175 ,  H01L2924/0002 ,  H01P5/028 ,  H01Q21/065 ,  H05K1/02 ,  H05K1/0243 ,  H05K1/141 ,  H05K1/184 ,  H05K3/368 ,  H05K2201/041 ,  H05K2201/10007 ,  H05K2201/10098 ,  H05K2203/049

Abstract: A circuit board assembly includes a low-frequency (LF) substrate, a monolithic microwave integrated circuit (MMIC), electrical components, a high-frequency (HF) substrate, and an antenna. The LF substrate is formed of FR-4 type material. The LF substrate defines a waveguide through the LF substrate. The MMIC is attached to the top-side of the LF substrate and outputs the radio-frequency signal. The electrical components are electrically attached to the LF substrate. The HF substrate is soldered to the top side of the LF substrate. An opening through the HF substrate surrounds the MMIC. A vertical transition guides the radio-frequency signal output by the MMIC to the waveguide. A plurality of wire bonds electrically connects the MMIC to the HF substrate and couple the radio-frequency signal from the MMIC to the vertical transition. The antenna is attached to the LF substrate and configured to radiate the radio-frequency signal from the waveguide.

Abstract translation: 电路板组件包括低频（LF）衬底，单片微波集成电路（MMIC），电气部件，高频（HF）衬底和天线。 LF基板由FR-4型材料形成。 LF衬底限定通过LF衬底的波导。 MMIC连接到LF基板的顶侧，并输出射频信号。 电气部件电连接到LF基板。 将HF衬底焊接到LF衬底的顶侧。 通过HF衬底的开口围绕MMIC。 垂直转换将MMIC输出的射频信号引导到波导。 多个引线键合将MMIC电连接到HF衬底，并将来自MMIC的射频信号耦合到垂直转换。 天线连接到LF衬底并且被配置为辐射来自波导的射频信号。

公开(公告)号：US20160163610A1

公开(公告)日：2016-06-09

申请号：US14428376

申请日：2013-08-28

Applicant: Shimon PODVAL ,  QUBEICON LTD.

Inventor： Shimon Podval

IPC: H01L23/13 ,  H05K1/11 ,  H05K1/02 ,  H01L25/065 ,  H01L23/498 ,  H05K1/14

CPC classification number: H01L23/13 ,  H01L23/49838 ,  H01L23/49855 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/06135 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/49177 ,  H01L2224/73265 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81385 ,  H01L2924/00014 ,  H01L2924/15162 ,  H01L2924/15192 ,  H05K1/0204 ,  H05K1/117 ,  H05K1/141 ,  H05K3/3415 ,  H05K3/3442 ,  H05K2201/041 ,  H05K2201/09063 ,  H05K2201/09154 ,  H05K2201/09163 ,  H05K2201/0939 ,  H05K2201/09472 ,  Y02P70/613 ,  H01L2924/014 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A submount for connecting a semiconductor device to an external circuit, the submount comprising: a planar substrate formed from an insulating material and having relatively narrow edge surfaces and first and second relatively large face surfaces; at least one recess formed along an edge surface; a layer of a conducting material formed on a surface of each of the at least one recess; a first plurality of soldering pads on the first face surface configured to make electrical contact with a semiconductor device; and electrically conducting connections each of which electrically connects a soldering pad in the first plurality of soldering pads to the layer of conducting material of a recess of the at least one recess.

Abstract translation: 一种用于将半导体器件连接到外部电路的基座，所述基座包括：平面基板，由绝缘材料形成并且具有相对窄的边缘表面和第一和第二相对大的表面; 沿着边缘表面形成的至少一个凹部; 形成在所述至少一个凹部中的每一个的表面上的导电材料层; 所述第一表面上的第一多个焊盘被配置为与半导体器件电接触; 以及导电连接，每个导电连接将所述第一多个焊盘中的焊盘电连接到所述至少一个凹部的凹部的导电材料层。

公开(公告)号：US09357639B2

公开(公告)日：2016-05-31

申请号：US14633726

申请日：2015-02-27

Applicant: Metrospec Technology, LLC

Inventor： Henry V. Holec ,  Wm. Todd Crandell

IPC: H01R12/00 ,  H05K1/02 ,  H01R4/02 ,  H01R12/52 ,  H01R13/717 ,  H05K1/11 ,  H05K1/14 ,  H05K3/00 ,  H05K3/36 ,  F21Y101/02 ,  F21Y111/00

CPC classification number: H05K1/0293 ,  F21Y2107/30 ,  F21Y2115/10 ,  H01R4/02 ,  H01R9/096 ,  H01R12/523 ,  H01R13/717 ,  H05K1/0266 ,  H05K1/0269 ,  H05K1/0292 ,  H05K1/0298 ,  H05K1/11 ,  H05K1/113 ,  H05K1/118 ,  H05K1/14 ,  H05K1/144 ,  H05K1/147 ,  H05K3/0061 ,  H05K3/363 ,  H05K2201/041 ,  H05K2201/09481 ,  H05K2201/09918 ,  H05K2201/10106 ,  H05K2201/2027 ,  H05K2203/0228

Abstract: In some embodiments, an interconnectable circuit board may include one or more of the following features: (a) a first electrically conductive pad located on a top of the circuit board, (b) a plated through hole on the conductive pad which passes through the circuit board, (c) a second electrically conductive pad coupled to the plated through hole; the second conductive pad capable of being electrically connected to a third electrically conductive pad attached to a top of a second interconnectable circuit board, (d) cut marks indicating safe locations for separating the circuit board, and (e) a second cut mark adjacent to the first cut mark where the area between the first and second cut mark can be utilized to make a safe cut through the circuit board.

Abstract translation: 在一些实施例中，可互连电路板可以包括以下特征中的一个或多个：（a）位于电路板顶部的第一导电焊盘，（b）导电焊盘上的电镀通孔， 电路板，（c）耦合到电镀通孔的第二导电焊盘; 第二导电焊盘能够电连接到附接到第二可互连电路板的顶部的第三导电焊盘，（d）切割标记，指示用于分离电路板的安全位置，以及（e）与第二导电焊盘相邻的第二切割标记 可以利用第一和第二切割标记之间的区域来进行通过电路板的安全切割的第一切割标记。

公开(公告)号：US09355966B2

公开(公告)日：2016-05-31

申请号：US13937040

申请日：2013-07-08

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.

Inventor： Adam Gallegos ,  Walter J. Dauksher

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/16 ,  H01L23/498 ,  H05K1/14 ,  H05K3/34

CPC classification number: H01L23/562 ,  H01L23/16 ,  H01L23/3675 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10155 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/26155 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83007 ,  H01L2224/83203 ,  H01L2224/83411 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/8346 ,  H01L2224/8385 ,  H01L2224/92225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1659 ,  H01L2924/167 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/041 ,  H05K2201/068 ,  H05K2201/10378 ,  H05K2201/10734 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package and methods of manufacturing the same are disclosed. In particular, a chip package comprising a ball grid array is disclosed in which the chip package includes a package substrate supporting the ball grid array and in which the chip package further includes a warpage control frame that helps to minimize or mitigate warpage of the chip package.

Abstract translation: 公开了一种芯片封装及其制造方法。 特别地，公开了一种包括球栅阵列的芯片封装，其中芯片封装包括支撑球栅阵列的封装衬底，其中芯片封装还包括翘曲控制框架，其帮助最小化或减轻芯片封装的翘曲 。

公开(公告)号：US09332644B2

公开(公告)日：2016-05-03

申请号：US14305127

申请日：2014-06-16

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Noboru Kato ,  Masahiro Ozawa

IPC: H01P3/08 ,  H05K1/14 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K7/14

CPC classification number: H05K1/144 ,  H01P3/08 ,  H01P3/085 ,  H05K1/0225 ,  H05K1/0298 ,  H05K1/0393 ,  H05K1/11 ,  H05K7/1427 ,  H05K2201/0195 ,  H05K2201/041

Abstract: A high-frequency transmission line includes a laminate including dielectric layers, a first signal line provided in the laminate, a second signal line provided in the laminate and positioned on a first side in a direction of lamination relative to the first signal line, so as to cross the first signal line when viewed in a plan view in the direction of lamination, a first ground conductor positioned on a second side in the direction of lamination relative to the first signal line, a second ground conductor positioned on the first side in the direction of lamination relative to the second signal line, and an intermediate ground conductor provided between the first and second signal lines in the direction of lamination, so as to overlap with crossing portions of the first and second lines when viewed in a plan view in the direction of lamination. An area of overlap of the first ground conductor with the first signal line is smaller than an area of overlap of the second ground conductor with the first signal line. An area of overlap of the second ground conductor with the second signal line is smaller than an area of overlap of the first ground conductor with the second signal line.

Abstract translation: 高频传输线包括层压体，其包括电介质层，设置在层压体中的第一信号线，设置在层压体中的第二信号线，并且相对于第一信号线位于层叠方向的第一侧上，从而 当在层叠方向的平面图中观察时跨越第一信号线，相对于第一信号线位于层叠方向上的第二侧上的第一接地导体，位于第一信号线的第一侧的第二接地导体 相对于第二信号线的层压方向，以及设置在层叠方向上的第一和第二信号线之间的中间接地导体，以便在第一和第二信号线的俯视方向上与第一和第二线的交叉部分重叠 层压方向。 第一接地导体与第一信号线的重叠区域小于第二接地导体与第一信号线的重叠面积。 第二接地导体与第二信号线的重叠区域小于第一接地导体与第二信号线的重叠面积。

公开(公告)号：US09332295B2

公开(公告)日：2016-05-03

申请号：US14753640

申请日：2015-06-29

Applicant: Nai-Chien Chang

Inventor： Nai-Chien Chang

IPC: H04N5/225 ,  H04N21/4143 ,  H04N21/4223 ,  H04N21/422 ,  H04N21/437 ,  H04N21/426 ,  H01L23/00 ,  H05K1/14 ,  H05K3/34

CPC classification number: H04N21/4143 ,  H01L24/00 ,  H01L2924/00 ,  H04N5/2251 ,  H04N21/42203 ,  H04N21/4223 ,  H04N21/426 ,  H04N21/437 ,  H05K1/141 ,  H05K3/3447 ,  H05K2201/041

Abstract: A wireless transmission and video integrated apparatus includes a video module and a wireless module. The video module includes a hub unit, an image processing unit, an image acquisition unit, a microphone unit, an expansion interface and a transmission interface. The wireless module includes a connection interface, a wireless communication unit and an antenna unit. The wireless module is electrically connected to the expansion interface of the video module through the connection interface. The video module and the wireless module are integrated as a whole, and then are electrically connected to an external electronic apparatus through the transmission interface of the video module, so that assembling the wireless transmission and video integrated apparatus into the electronic apparatus is quick.

Abstract translation: 无线传输和视频集成设备包括视频模块​​和无线模块。 视频模块包括集线器单元，图像处理单元，图像获取单元，麦克风单元，扩展接口和传输接口。 无线模块包括连接接口，无线通信单元和天线单元。 无线模块通过连接接口电连接到视频模块的扩展接口。 视频模块和无线模块整体集成，然后通过视频模块的传输接口电连接到外部电子设备，使得将无线传输和视频集成设备组装到电子设备中是快速的。

公开(公告)号：US20160044779A1

公开(公告)日：2016-02-11

申请号：US14886606

申请日：2015-10-19

Applicant: BEYOND BLADES LTD.

Inventor： AVIV SOFFER

IPC: H05K1/02 ,  H05K1/18

CPC classification number: G06F1/18 ,  F28D15/0266 ,  F28D15/0275 ,  G06F1/20 ,  G06F2200/1635 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/19105 ,  H05K1/0284 ,  H05K1/185 ,  H05K7/205 ,  H05K2201/041 ,  H01L2924/00

Abstract: A stackable layer is provided for 3-Dimensional multi-layered modular computers. The stackable layer comprises at least one encapsulated chip die. Sets of electrical contacts are provided on each one of the large surfaces of the layer. The encapsulated chip die and the two large opposite surfaces of the layer are substantially parallel.

公开(公告)号：US20150373847A1

公开(公告)日：2015-12-24

申请号：US14496876

申请日：2014-09-25

Applicant: Intel Corporation

Inventor： Kevin E. Wells ,  Richard C. Stamey

IPC: H05K1/11 ,  H05K3/42 ,  G06F1/16 ,  H05K3/36 ,  H05K1/02 ,  H05K7/02

CPC classification number: G06F1/16 ,  H01L2924/0002 ,  H05K1/115 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/421 ,  H05K3/4694 ,  H05K2201/041 ,  H05K2201/09972 ,  H05K2201/10159 ,  H05K2201/10719 ,  Y02P70/613 ,  Y10T29/49128 ,  H01L2924/00

Abstract: Described are apparatuses for modular printed circuit boards (PCB) and methods for producing modular PCBs. An apparatus may include a first PCB module with a first pattern of routing structures on one or more layers of the first PCB module. The apparatus may further include a second PCB module with a second pattern of routing structures on one or more layers of the second PCB module. The second pattern of routing structures may be aligned with and electrically coupled to the first pattern of routing structures without connectors. Other embodiments may be described and/or claimed.

Abstract translation: 描述了用于模块化印刷电路板（PCB）的装置和用于制造模块化PCB的方法。 装置可以包括具有在第一PCB模块的一个或多个层上的路由结构的第一图案的第一PCB模块。 该装置还可以包括具有在第二PCB模块的一个或多个层上的路由结构的第二图案的第二PCB模块。 路由结构的第二模式可以与没有连接器的路由结构的第一模式对准并电耦合。 可以描述和/或要求保护其他实施例。