公开(公告)号：US5798567A

公开(公告)日：1998-08-25

申请号：US915969

申请日：1997-08-21

Applicant: Michael G. Kelly ,  Pirooz Emad

Inventor： Michael G. Kelly ,  Pirooz Emad

IPC: H01L23/13 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H01L23/34

CPC classification number: H01L23/50 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H05K1/0231 ,  H05K3/3436 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19106 ,  H05K2201/10477 ,  H05K2201/1053 ,  H05K2201/10734 ,  Y02P70/613

Abstract: A ball grid array to integrated circuit interconnection. The interconnection includes a ball grid array substrate having a first surface and a second surface. The first surface comprising a plurality of substrate interconnection conductive pads. A power supply via connects a power supply conductive pad of the first surface to a first conductive area on the second surface. A ground via connects a ground conductive pad of the first surface to a second conductive area on the second surface. A decoupling capacitor connected between the first conductive area and the second conductive area. The interconnection further comprises an integrated circuit comprising a plurality of integrated circuit conductive pads. A plurality of smaller solder balls interconnect at least one of the integrated circuit conductive pads to at least one of the substrate interconnection conductive pads. A circuit board substrate is electrically interconnected by larger solder balls to the ball grid array substrate.

Abstract translation: 一个球栅阵列到集成电路互连。 互连包括具有第一表面和第二表面的球栅阵列基板。 所述第一表面包括多个衬底互连导电焊盘。 电源通孔将第一表面的电源导电焊盘连接到第二表面上的第一导电区域。 接地通孔将第一表面的接地导电焊盘连接到第二表面上的第二导电区域。 连接在第一导电区域和第二导电区域之间的去耦电容器。 互连还包括包括多个集成电路导电焊盘的集成电路。 多个较小的焊球将至少一个集成电路导电焊盘连接到至少一个衬底互连导电焊盘。 电路板基板通过较大的焊球与球栅阵列基板电连接。

公开(公告)号：US5675183A

公开(公告)日：1997-10-07

申请号：US501331

申请日：1995-07-12

Applicant: Deepak Swamy ,  David Lunsford

Inventor： Deepak Swamy ,  David Lunsford

IPC: H01L25/065 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H01L23/64 ,  H01L23/053 ,  H01L23/48

CPC classification number: H05K3/3436 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/144 ,  H05K2201/10477 ,  H05K2201/10992 ,  H05K2203/0415 ,  H05K3/368 ,  Y02P70/613

Abstract: A hybrid multichip module and method for fabricating same provides a cost-effective interconnection of semiconductor chips combining the advantages of modern MCM-D technology with modern MCM-L technology. In a preferred embodiment, the hybrid multichip module has semiconductor chips mounted to an MCM-D structure and interconnected by an MCM-L structure via solder columns.

Abstract translation: 混合多芯片模块及其制造方法提供了将现代MCM-D技术与现代MCM-L技术相结合的半导体芯片的成本有效的互连。 在优选实施例中，混合多芯片模块具有安装到MCM-D结构的半导体芯片，并且通过MCM-L结构经由焊料柱互连。

公开(公告)号：US5570274A

公开(公告)日：1996-10-29

申请号：US350122

申请日：1994-11-29

Applicant: Masaru Saito ,  Manabu Bonkohara

Inventor： Masaru Saito ,  Manabu Bonkohara

IPC: H01L25/00 ,  H01L23/053 ,  H01L23/10 ,  H01L23/24 ,  H01L25/065 ,  H05K1/00 ,  H05K1/14 ,  H05K1/18 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K1/11

CPC classification number: H01L25/105 ,  H01L23/053 ,  H01L23/10 ,  H01L23/24 ,  H01L25/0652 ,  H05K1/141 ,  H05K3/3436 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/1627 ,  H01L2924/181 ,  H05K1/0284 ,  H05K1/144 ,  H05K1/182 ,  H05K1/183 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2201/10477 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K3/284 ,  H05K3/3426 ,  H05K3/3442 ,  H05K3/368 ,  Y02P70/613

Abstract: A multichip module packaging structure provided over a mother board. A multichip module substrate is mounted over the mother board through a frame member. The frame member is provided to extend successively on a peripheral region of a bottom surface of the substrate and further extend downward from the bottom surface of the substrate. The frame member also has a top portion bonded with the bottom surface of the substrate and a bottom portion bonded with the top surface of the mother substrate so as to form a three dimensional space surrounded by the frame member, the substrate and the mother board. A plurality of semiconductor integrated circuit chips are provided on the bottom surface of the substrate so that the chips are accommodated within the three dimensional space.

Abstract translation: 在母板上提供的多芯片模块封装结构。 多芯片模块基板通过框架构件安装在母板上。 框架构件被设置成在衬底的底表面的周边区域上连续地延伸，并且进一步从衬底的底表面向下延伸。 框架构件还具有与基板的底面接合的顶部部分和与母体基板的顶表面接合的底部，以便形成被框架构件，基板和母板包围的三维空间。 在基板的底面上设置多个半导体集成电路芯片，使得芯片容纳在三维空间内。

公开(公告)号：US5535526A

公开(公告)日：1996-07-16

申请号：US450845

申请日：1995-05-25

Applicant: Lawrence H. White

Inventor： Lawrence H. White

IPC: H01L21/56 ,  H01L21/60 ,  H05K3/28 ,  H05K3/34 ,  F26B21/06

CPC classification number: H01L24/81 ,  H01L21/563 ,  H05K3/3436 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16195 ,  H05K2201/10477 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/0415 ,  H05K3/284 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49204 ,  Y10T29/53174

Abstract: A process for handling and storing surface-mount, encapsulated flip-chip carrier modules to prevent the formation of amoeba-like solder bridges between the flip-chip C4 connections along the boundary between the encapsulant and the chip surface and/or between the encapsulant and the chip carrier substrate surface. The concentration of free moisture in the encapsulant is maintained below a predetermined safe limit during reflow heating used to mount the modules on a circuit board.

Abstract translation: 一种用于处理和存储表面贴装封装的倒装芯片载体模块的过程，以防止在封装剂和芯片表面之间的边界之间和/或封装剂和密封剂之间的边界处的倒装芯片C4连接之间形成类似变形虫的焊料桥 芯片载体衬底表面。 在用于将模块安装在电路板上的回流加热期间，密封剂中的游离水分的浓度保持在预定的安全极限以下。

公开(公告)号：US5469131A

公开(公告)日：1995-11-21

申请号：US114329

申请日：1993-08-30

Applicant: Ryoichi Takahashi ,  Katsumi Okawa ,  Yusuke Igarashi

Inventor： Ryoichi Takahashi ,  Katsumi Okawa ,  Yusuke Igarashi

IPC: H01C7/00 ,  H01L23/64 ,  H01L25/16 ,  H05K1/02 ,  H05K1/05 ,  H05K3/32 ,  H01C1/012

CPC classification number: H05K1/0234 ,  H01C7/00 ,  H01L23/647 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/12035 ,  H01L2924/14 ,  H01L2924/30107 ,  H05K1/056 ,  H05K2201/10477 ,  H05K2203/049 ,  H05K3/328

Abstract: A resistive body of a hybrid integrated circuit has a resistance pattern on a resin film. Bonding pads permit connection of current through the resistance pattern. The resistance pattern may form part of a detecting bridge for overcurrent detection. One embodiment of the invention uses a rectangular resistance pattern with an opening in the center to force current to flow on a perimeter path for minimizing maximum temperature. Another embodiment uses a serpentine resistance pattern. A face-down resistance patter reduces interference. A direct-connection bonding pad reduces the voltage generated in a parasitic capacitance to improve the resistance of the resin film to voltage breakdown.

Abstract translation: 混合集成电路的电阻体在树脂膜上具有电阻图形。 接合焊盘允许通过电阻模式连接电流。 电阻图案可以形成用于过电流检测的检测桥的一部分。 本发明的一个实施例使用在中心具有开口的矩形电阻图案，以迫使电流在周边路径上流动以最小化最大温度。 另一实施例使用蛇形电阻图案。 面向下的电阻图案减少干扰。 直接连接焊盘减小寄生电容产生的电压，以提高树脂膜对电压击穿的电阻。

公开(公告)号：US5461202A

公开(公告)日：1995-10-24

申请号：US132036

申请日：1993-10-05

Applicant: Naoki Sera ,  Toshiharu Fukui ,  Kouji Tanabe ,  Futoshi Matsui

Inventor： Naoki Sera ,  Toshiharu Fukui ,  Kouji Tanabe ,  Futoshi Matsui

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/24 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/363 ,  H05K1/189 ,  H05K3/0064 ,  H05K3/245 ,  H05K3/28 ,  H05K1/0218 ,  H05K1/0393 ,  H05K1/095 ,  H05K1/118 ,  H05K1/181 ,  H05K2201/035 ,  H05K2201/048 ,  H05K2201/055 ,  H05K2201/056 ,  H05K2201/0715 ,  H05K2201/09781 ,  H05K2201/10477 ,  H05K2201/10636 ,  H05K2201/2009 ,  H05K2203/166 ,  H05K3/3447 ,  H05K3/366 ,  H05K3/386 ,  H05K3/428 ,  H05K3/4685 ,  Y02P70/611

Abstract: A flexible wiring board includes a printed conductive circuit layer formed on an insulating film, a metallic layer formed on thed printed conductive circuit layer, and an insulating layer formed on the metallic layer. A method of making a flexible wiring board includes the steps of forming a conductive circuit layer by screen printing a wiring pattern using a conductive paste, baking the printed wiring pattern, and forming a metallic layer on the printed conductive circuit layer by a plating method.

Abstract translation: 柔性布线板包括形成在绝缘膜上的印刷导电电路层，形成在印刷导电电路层上的金属层和形成在金属层上的绝缘层。 制造柔性布线板的方法包括以下步骤：通过使用导电浆丝网印刷布线图案来形成导电电路层，烘烤印刷布线图案，以及通过电镀方法在印刷导电电路层上形成金属层。

公开(公告)号：US5438749A

公开(公告)日：1995-08-08

申请号：US114861

申请日：1993-09-02

Applicant: Ronnie J. Runyon

Inventor： Ronnie J. Runyon

IPC: H05K1/11 ,  H05K3/28 ,  H05K3/36 ,  H05K3/40 ,  H01R43/00

CPC classification number: H01R12/62 ,  H05K3/363 ,  H05K1/111 ,  H05K2201/0397 ,  H05K2201/10477 ,  H05K2201/10977 ,  H05K2203/0195 ,  H05K2203/162 ,  H05K3/284 ,  H05K3/4092 ,  Y10T29/49004 ,  Y10T29/49117

Abstract: An interconnect device and method is provided for establishing communications between an electronic circuit board and a microprocessor emulator, so as to permit the evaluation or testing of an electronic circuit or system without a microprocessor flip chip or an integrated circuit socket being present on the circuit board. The flexible interconnect device serves to electrically connect the emulator to the individual conductors which compose a microprocessor flip chip conductor pattern formed on the electronic circuit board. The method involves a reflow soldering technique which bonds the flexible interconnect device to the microprocessor flip chip conductor pattern on the electronic circuit board, so as to form a reliable electrical connection between the flexible interconnect device and the circuit board.

Abstract translation: 提供了一种用于建立电子电路板和微处理器仿真器之间的通信的互连装置和方法，以允许电子电路或系统的评估或测试，而不需要在电路板上存在微处理器倒装芯片或集成电路插座 。 柔性互连装置用于将仿真器电连接到构成在电子电路板上形成的微处理器倒装芯片导体图案的各个导体。 该方法涉及一种回流焊接技术，其将柔性互连装置连接到电子电路板上的微处理器倒装芯片导体图案，以便在柔性互连装置和电路板之间形成可靠的电连接。

公开(公告)号：US5214570A

公开(公告)日：1993-05-25

申请号：US862828

申请日：1992-04-03

Applicant: Bhupendra C. Shah ,  Charles F. Peterson ,  Mark E. Buckley

Inventor： Bhupendra C. Shah ,  Charles F. Peterson ,  Mark E. Buckley

IPC: G11C5/00 ,  H05K1/14 ,  H05K3/36 ,  H05K5/02

CPC classification number: H05K5/026 ,  G11C5/00 ,  H05K1/141 ,  H05K2201/10159 ,  H05K2201/10189 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K3/368

Abstract: A memory module includes a mother board with an edge connector mounted adjacent one of its edges. Memory chips are mounted on the same side of the mother board as the edge connector. A daughter board, having memory chips mounted on its surface facing the mother board, is connected to the mother board so that its maximum height above the mother board is substantially no greater than that of the edge connector. Preferably the memory chips are mounted in thin TSOP packages and the daughter board is connected to the mother board by two rows of mating electrical pins and sockets, one located near the edge connector and the other near the top of the mother board, so the daughter board is mounted over virtually all of the width of the mother board except that covered by the edge connector, and so that the rows of mating connectors and the facing surfaces of the mother and daughter boards form an air channel through which air can flow to cool the memory chips mounted between the mother and daughter boards. In the preferred embodiment, each of the chip bearing surfaces of the mother and daughter boards has an equal number of chips, and has separate lines from the module's driver circuits, causing the electrical characteristics of each chip bearing surface to be similar. In the preferred embodiment, pairs of memory circuit packages having mirrored input connectors are mounted next to each other on a common surface and have adjacent corresponding mirrored input and/or output connectors electrically connected to common pads on their printed circuit board.

Abstract translation: 存储器模块包括母板，其边缘连接器安装在其一个边缘附近。 存储芯片安装在母板与边缘连接器相同的一侧。 具有安装在其面向母板的表面上的存储芯片的子板连接到母板，使得其在母板上方的最大高度基本上不大于边缘连接器的高度。 优选地，存储器芯片安装在薄TSOP封装中，并且子板通过两排配合的电引脚和插座连接到母板，一排位于边缘连接器附近，另一个位于母板顶部附近，因此女儿 板被安装在母板的几乎所有宽度上，除了由边缘连接器覆盖，并且使得配对连接器的行和母板和母板的相对表面形成空气通道，空气可以通过空气通道冷却 存储芯片安装在母板和母板之间。 在优选实施例中，母板和母板的每个芯片承载表面具有相等数量的芯片，并且具有与模块的驱动电路分离的线，导致每个芯片支承表面的电特性相似。 在优选实施例中，具有镜像输入连接器的成对存储器电路封装件彼此相邻地安装在公共表面上，并且具有与其印刷电路板上的公共焊盘电连接的相邻对应的镜像输入和/或输出连接器。

公开(公告)号：US5186634A

公开(公告)日：1993-02-16

申请号：US811709

申请日：1991-12-20

Applicant: Bradley H. Thompson

Inventor： Bradley H. Thompson

IPC: H05K3/32 ,  H05K3/34

CPC classification number: H01R12/58 ,  H05K3/325 ,  H05K2201/10295 ,  H05K2201/10477 ,  H05K2201/10878 ,  H05K3/3447

Abstract: An electrical contact having one or more spring-biased tabs for mounting to a circuit board precludes the need for additional mechanical fasteners and obviates any additional manufacturing steps, except for soldering. The tabs are formed and shaped to provide springs which, when inserted into holes in a circuit board, compress and grip the interior wall of the hole.

Abstract translation: 具有一个或多个用于安装到电路板的弹簧偏压突片的电触头排除了对额外的机械紧固件的需要，并且除了焊接之外消除了任何额外的制造步骤。 突片被形成和成形以提供弹簧，当插入到电路板中的孔中时，弹簧压缩并夹住孔的内壁。

公开(公告)号：US4835598A

公开(公告)日：1989-05-30

申请号：US52182

申请日：1987-05-14

Applicant: Tooru Higuchi ,  Tosiyuki Yamaguchi ,  Takeshi Kanou

Inventor： Tooru Higuchi ,  Tosiyuki Yamaguchi ,  Takeshi Kanou

IPC: H01L23/14 ,  H01L23/36 ,  H01L23/498 ,  H05K1/02 ,  H05K1/18 ,  H05K3/38 ,  H05K3/40 ,  H05K3/44

CPC classification number: H01L23/142 ,  H01L23/36 ,  H01L23/49827 ,  H05K1/0204 ,  H05K1/021 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/3025 ,  H05K1/182 ,  H05K2201/0355 ,  H05K2201/10287 ,  H05K2201/10416 ,  H05K2201/10477 ,  H05K2203/049 ,  H05K2203/063 ,  H05K3/386 ,  H05K3/4046 ,  H05K3/445

Abstract: A printed wiring board for carrying a semiconductor chip including a resin base substrate having at least one opening therethrough, a thermo-conductive plate for mounting the semiconductor chip thereon, the plate being inserted into the opening, an insulating adhesive layer covering at least one side of the substrate and an electric circuit formed on the layer. The wiring board of this invention eliminates those disadvantages of the existing resin substrate type and metal core type. In essence, the wiring board of this invention displays excellent heat releasing capability and magnetic shield effect as well as reliable electric insulation.

Abstract translation: 一种印刷电路板，用于承载包括具有至少一个开口的树脂基底的半导体芯片，用于将半导体芯片安装在其上的热导板，该板插入该开口中，绝缘粘合剂层覆盖至少一个侧面 和形成在该层上的电路。 本发明的布线板消除了现有的树脂基板型和金属芯型的缺点。 实质上，本发明的接线板显示出优异的散热能力和磁屏蔽效果以及可靠的电绝缘。