公开(公告)号：US20150050781A1

公开(公告)日：2015-02-19

申请号：US14529881

申请日：2014-10-31

Applicant: John S. Guzek ,  Javier Soto Gonzalez ,  Nicholas R. Watts ,  Ravi K Nalla

Inventor： John S. Guzek ,  Javier Soto Gonzalez ,  Nicholas R. Watts ,  Ravi K Nalla

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L23/315 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/26 ,  H01L24/27 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L25/03 ,  H01L25/074 ,  H01L25/105 ,  H01L25/117 ,  H01L2221/68345 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/11831 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/24227 ,  H01L2224/26 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/821 ,  H01L2224/83192 ,  H01L2224/83874 ,  H01L2224/92132 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/40252 ,  H01L2924/40407 ,  H01L2924/40501 ,  H05K1/185 ,  H05K3/4682 ,  H05K2201/10477 ,  H05K2203/0152 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Embodiments of the present invention describe a semiconductor package having an embedded die. The semiconductor package comprises a coreless substrate that contains the embedded die. The semiconductor package provides die stacking or package stacking capabilities. Furthermore, embodiments of the present invention describe a method of fabricating the semiconductor package that minimizes assembly costs.

Abstract translation: 本发明的实施例描述了具有嵌入式管芯的半导体封装。 该半导体封装包括一个包含嵌入式裸片的无芯基板。 半导体封装提供管芯堆叠或封装堆叠功能。 此外，本发明的实施例描述了一种使组装成本最小化的半导体封装的制造方法。

公开(公告)号：US20130223038A1

公开(公告)日：2013-08-29

申请号：US13863481

申请日：2013-04-16

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Issei YAMAMOTO ,  Yoshihito OTSUBO

IPC: H05K1/02 ,  H05K3/28 ,  H05K3/30

CPC classification number: H05K1/0296 ,  H01L23/49811 ,  H01L23/49861 ,  H01L23/552 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15312 ,  H01L2924/15322 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/141 ,  H05K3/0052 ,  H05K3/0097 ,  H05K3/284 ,  H05K3/30 ,  H05K2201/1034 ,  H05K2201/10477 ,  H05K2203/1316 ,  Y10T29/4913 ,  Y10T29/49146 ,  H01L2224/81 ,  H01L2924/00

Abstract: A module substrate includes a plurality of electronic components mounted on at least one surface of a base substrate and a columnar terminal connection substrate connected to the one surface of the base substrate on which a plurality of the electronic components are mounted. The terminal connection substrate includes a plurality of conductor portions, at least one corner of the columnar terminal connection substrate is chamfered with a flat surface and/or curved surface, and the terminal connection substrate is connected at a side surface thereof contacting the chamfered surface, to the one surface of the base substrate.

Abstract translation: 模块基板包括安装在基底基板的至少一个表面上的多个电子部件和连接到其上安装有多个电子部件的基底基板的一个表面的柱状端子连接基板。 端子连接基板包括多个导体部分，柱状端子连接基板的至少一个角部被平坦表面和/或曲面倒角，并且端子连接基板在与倒角表面接触的侧表面处连接， 到基底基板的一个表面。

公开(公告)号：US20130077252A1

公开(公告)日：2013-03-28

申请号：US13310101

申请日：2011-12-02

Applicant: Ted Ju ,  Chin Chi Lin

Inventor： Ted Ju ,  Chin Chi Lin

IPC: H05K7/20 ,  H05K1/14

CPC classification number: H01L23/36 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/117 ,  H05K1/141 ,  H05K3/368 ,  H05K2201/048 ,  H05K2201/049 ,  H05K2201/10477 ,  H01L2924/00

Abstract: The invention relates to an electrical connector assembly. The electrical connector assembly includes a main circuit board having a through hole, a processor, and an auxiliary circuit board. The processor includes a chip and a substrate. The chip is electrically connected to the substrate and located in the through hole. The substrate is at least partially located in the through hole. The auxiliary circuit board has a transitional connecting surface. A first conducting region and a second conducting region electrically connected to each other are disposed on the transitional connecting surface. The first conducting region is electrically connected to the substrate, and the second conducting region is electrically connected to the main circuit board.

Abstract translation: 本发明涉及电连接器组件。 电连接器组件包括具有通孔的主电路板，处理器和辅助电路板。 处理器包括芯片和基板。 芯片电连接到基板并位于通孔中。 衬底至少部分地位于通孔中。 辅助电路板具有过渡连接面。 电连接的第一导电区域和第二导电区域设置在过渡连接面上。 第一导电区域电连接到基板，并且第二导电区域电连接到主电路板。

公开(公告)号：US08217517B2

公开(公告)日：2012-07-10

申请号：US12830846

申请日：2010-07-06

Applicant: Mitsuhisa Watanabe ,  Keiyo Kusanagi

Inventor： Mitsuhisa Watanabe ,  Keiyo Kusanagi

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L24/97 ,  H01L21/6836 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2224/05554 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85001 ,  H01L2224/85007 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/85986 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/30105 ,  H05K3/0052 ,  H05K3/328 ,  H05K2201/10477 ,  H05K2203/049 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48132 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: In one embodiment, a semiconductor device includes a printed wiring board provided with a connection pad, a semiconductor chip provided with an electrode pad and a conductive wire. One end of the conductive wire is connected to the connection pad of the printed wiring board and the other end of the conductive wire is connected to the electrode pad of the semiconductor chip. The semiconductor chip is mounted on the printed wiring board so that the first surface of the semiconductor chip provided with the electrode pad is oriented opposite to the printed wiring board. A first insulating layer is formed on the first surface of the semiconductor chip oriented opposite to the printed wiring board. A thermoplastic second insulating layer is formed on the first insulating layer. Part of the conductive wire between one end and the other end is buried in the second insulating layer.

Abstract translation: 在一个实施例中，半导体器件包括设置有连接焊盘的印刷线路板，设置有电极焊盘和导线的半导体芯片。 导电线的一端连接到印刷电路板的连接焊盘，导电线的另一端连接到半导体芯片的电极焊盘。 将半导体芯片安装在印刷线路板上，使得设置有电极焊盘的半导体芯片的第一表面与印刷线路板相对。 第一绝缘层形成在与印刷线路板相对定向的半导体芯片的第一表面上。 在第一绝缘层上形成热塑性第二绝缘层。 一端和另一端之间的导线的一部分被埋在第二绝缘层中。

公开(公告)号：US20120077317A1

公开(公告)日：2012-03-29

申请号：US13312093

申请日：2011-12-06

Applicant: Sotaro ITO ,  Michimasa Takahashi ,  Yukinobu Mikado

Inventor： Sotaro ITO ,  Michimasa Takahashi ,  Yukinobu Mikado

IPC: H01L21/56

CPC classification number: H01L24/83 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/185 ,  H05K3/0035 ,  H05K3/4652 ,  H05K2201/096 ,  H05K2201/10477 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/01049 ,  H01L2924/01083 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2224/13109

Abstract: A multilayered printed circuit board or a substrate for mounting a semiconductor device includes a semiconductor device, a first resin insulating layer accommodating the semiconductor device, a second resin insulating layer provided on the first resin insulating layer, a conductor circuit provided on the second resin insulating layer, and via holes for electrically connecting the semiconductor device to the conductor circuit, wherein the semiconductor device is accommodated in a recess provided in the first resin insulating layer, and a metal layer for placing the semiconductor device is provided on the bottom face of the recess. A multilayered printed circuit board in which the installed semiconductor device establishes electrical connection through the via holes is provided.

公开(公告)号：US08074350B2

公开(公告)日：2011-12-13

申请号：US11953959

申请日：2007-12-11

Applicant: Jurgen H. Daniel ,  Ana C. Arias ,  Steven E. Ready

Inventor： Jurgen H. Daniel ,  Ana C. Arias ,  Steven E. Ready

IPC: H05K3/30

CPC classification number: H05K3/32 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/29 ,  H01L24/82 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/24011 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/76155 ,  H01L2224/82007 ,  H01L2224/82102 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/19041 ,  H05K3/0005 ,  H05K3/125 ,  H05K3/284 ,  H05K3/305 ,  H05K2201/10477 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/013 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

Abstract: A method of printing electronic circuits uses pattern recognition to detect locations of interconnects on electronic components oriented on a substrate such that the interconnects face away from the substrate, the interconnects having ramps between the interconnects and the substrate, adjusts routing paths as needed based upon a difference between an intended placement and an actual placement of the electronic components, and generates a new image file for printing with adjusted routing paths. A device has at least one electronic component having interconnects, a ramp from a surface of the substrate to the interconnects, wherein the ramp is formed of one of either a polymer or an adhesive, a printed, conductive path on the ramp providing electrical connection to at least one of the interconnects.

Abstract translation: 打印电子电路的方法使用图案识别来检测定向在基板上的电子部件上的互连的位置，使得互连面向离开基板，互连在互连和基板之间具有斜面，根据需要调整路由路径 预期位置与电子部件的实际位置之间的差异，并且生成新的图像文件以便经调整的路线路径进行打印。 装置具有至少一个具有互连的电子部件，从基板的表面到互连件的斜面，其中斜面由聚合物或粘合剂中的一种形成，斜坡上的印刷导电路径提供电连接 至少一个互连。

公开(公告)号：US08049317B2

公开(公告)日：2011-11-01

申请号：US12714130

申请日：2010-02-26

Applicant: Walter L. Moden

Inventor： Walter L. Moden

IPC: H01L23/02

CPC classification number: H01L24/81 ,  H01L21/485 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5382 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/85 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/19107 ,  H05K1/141 ,  H05K3/305 ,  H05K3/328 ,  H05K3/3436 ,  H05K3/368 ,  H05K2201/049 ,  H05K2201/10477 ,  H05K2201/10727 ,  H05K2203/0415 ,  H05K2203/049 ,  Y02P70/613 ,  H01L2224/78 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A semiconductor device assembly includes a substrate and a semiconductor die adjacent to a first surface of the substrate. The substrate also includes a second surface opposite from the first surface, an opening extending from the first surface and the second surface, contact pads on the second surface, and substrate pads on the second surface, adjacent to the opening. Bond pads of the semiconductor die are aligned with the opening through the substrate. Intermediate conductive elements, such as bond wires, extend from bond pads of the semiconductor die, through the opening, to substrate pads on the opposite, second surface of the substrate. An encapsulant, which fills the opening and covers the intermediate conductive elements, protrudes beyond a plane in which the second surface of the substrate is located. Discrete conductive elements, such as solder balls, may protrude from the contact pads of the substrate.

Abstract translation: 半导体器件组件包括与衬底的第一表面相邻的衬底和半导体管芯。 衬底还包括与第一表面相对的第二表面，从第一表面和第二表面延伸的开口，第二表面上的接触焊盘以及与开口相邻的第二表面上的衬底焊盘。 半导体管芯的焊盘与通过衬底的开口对准。 诸如接合线的中间导电元件从半导体管芯的接合焊盘延伸通过开口，延伸到衬底的相对的第二表面上的衬底焊盘。 填充开口并覆盖中间导电元件的密封剂突出超过衬底的第二表面所在的平面。 离散导电元件，例如焊球，可能从基板的接触垫突出。

公开(公告)号：US08049115B2

公开(公告)日：2011-11-01

申请号：US11960709

申请日：2007-12-20

Applicant: Jung-Kuei Chung ,  Chi-Hsiung Lee ,  Tsung-Liang Hung

Inventor： Jung-Kuei Chung ,  Chi-Hsiung Lee ,  Tsung-Liang Hung

IPC: H05K1/16

CPC classification number: H05K1/0274 ,  H05K1/111 ,  H05K1/181 ,  H05K1/182 ,  H05K2201/0108 ,  H05K2201/09072 ,  H05K2201/09954 ,  H05K2201/10121 ,  H05K2201/10477 ,  H05K2201/10727

Abstract: A printed circuit board (PCB) adapted for mounting different kinds of light sensing modules thereon includes a lighting sensing area and a plurality of pads. The pads are disposed around the lighting sensing area, for configuring one light sensing module thereon. In the present invention, the PCB is suitable for different kinds of light sensing modules without redesign, which lowers the manufacturing cost of the PCB.

Abstract translation: 适于在其上安装不同种类的光感测模块的印刷电路板（PCB）包括照明感测区域和多个焊盘。 焊盘设置在照明感测区域周围，用于在其上配置一个光感测模块。 在本发明中，PCB不需要重新设计，适用于不同种类的感光模块，降低了PCB的制造成本。

公开(公告)号：US20110242780A1

公开(公告)日：2011-10-06

申请号：US13158037

申请日：2011-06-10

Applicant: Shinji WATANABE ,  Nobuhiro MIKAMI ,  Junya SATO ,  Kenichiro FUJII ,  Katsumi ABE ,  Atsumasa SAWADA

Inventor： Shinji WATANABE ,  Nobuhiro MIKAMI ,  Junya SATO ,  Kenichiro FUJII ,  Katsumi ABE ,  Atsumasa SAWADA

IPC: H05K7/14 ,  H05K7/00

CPC classification number: H05K1/18 ,  H01L24/18 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1515 ,  H01L2924/15151 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/023 ,  H05K1/0271 ,  H05K1/0284 ,  H05K1/185 ,  H05K1/189 ,  H05K3/0014 ,  H05K3/32 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/09436 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10734 ,  H05K2203/1469 ,  H05K2203/302 ,  Y02P70/611 ,  H01L2924/00

Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.

Abstract translation: 本发明的目的在于，当将半导体封装安装在弯曲的基板上时，可以抑制对半导体封装件施加的应力。 在安装基板1中，将半导体封装20安装在其至少一部分上包括弯曲表面的弯曲板10上。 弯曲板10包括设置在半导体封装20安装的弯曲表面部分的区域上并具有平坦的上表面的基座部分13a和设置在基座部分的平坦表面上的多个焊盘部分15a 13a。 基座部分13a由绝缘材料形成。 半导体封装20安装在焊盘部分15a上。

公开(公告)号：US07944712B2

公开(公告)日：2011-05-17

申请号：US12063795

申请日：2006-08-08

Applicant: Katsuhisa Kitada ,  Jumpei Hashiguchi ,  Nobuyuki Matsui ,  Etsuo Tsujimoto

Inventor： Katsuhisa Kitada ,  Jumpei Hashiguchi ,  Nobuyuki Matsui ,  Etsuo Tsujimoto

IPC: H05K7/02 ,  H05K7/04

CPC classification number: H05K1/141 ,  H05K1/148 ,  H05K3/0061 ,  H05K7/20972 ,  H05K2201/10477

Abstract: A PDP (plasma display panel) is attached to an electrically conductive board with a heat dissipation sheet sandwiched therebetween. A first driving circuit board is fixed on the electrically conductive board by a plurality of electrically conductive supports. On one surface, which faces the electrically conductive board, of the first driving circuit board, one or a plurality of electronic components are mounted, while a second driving circuit board is fixed. A plurality of support terminals of the second driving circuit board are connected to the first driving circuit board, and the first driving circuit board is attached to the electrically conductive board by the electrically conductive supports. Thus, one surface of the second driving circuit board is in contact with the electrically conductive board. One or a plurality of surface mount components are mounted on the other surface of the second driving circuit board that faces the first driving circuit board.

Abstract translation: PDP（等离子体显示面板）安装在导电板上，散热片夹在其间。 第一驱动电路板通过多个导电支撑件固定在导电板上。 在第一驱动电路板的面对导电板的一个表面上，安装有一个或多个电子部件，同时固定第二驱动电路板。 第二驱动电路板的多个支撑端子连接到第一驱动电路板，并且第一驱动电路板通过导电支撑件附接到导电板。 因此，第二驱动电路板的一个表面与导电板接触。 一个或多个表面安装部件安装在第二驱动电路板的面对第一驱动电路板的另一表面上。