公开(公告)号：US20010002162A1

公开(公告)日：2001-05-31

申请号：US09769243

申请日：2001-01-26

Applicant: Hitachi, Ltd.

Inventor： Satoshi Imasu ,  Ikuo Yoshida ,  Tetsuya Hayashida ,  Akira Yamagiwa ,  Shinobu Takeura

IPC: H05K007/06

CPC classification number: H05K1/111 ,  H01L21/563 ,  H01L23/13 ,  H01L23/24 ,  H01L23/49811 ,  H01L23/5383 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2225/1023 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K1/0271 ,  H05K1/114 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/091 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/10674 ,  H05K2203/1581 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/00

Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

Abstract translation: 一种电子设备，包括通过粘合剂固定到布线板的安装面的半导体芯片，其中外部端子通过凸块电极与布线板的电极焊盘电连接。 在电极焊盘上形成凹部，在凹部中连接有电极焊盘和凸块电极。 电极焊盘形成在软层的表面上，并且通过电极焊盘和软层的弹性变形形成凹部。

公开(公告)号：US20010001084A1

公开(公告)日：2001-05-10

申请号：US09740751

申请日：2000-12-19

Applicant: Micron Technology, Inc.

Inventor： Tongbi Jiang ,  Zhiqiang Wu

IPC: H01R013/62

CPC classification number: H01R12/82 ,  H01R12/58 ,  H05K1/0271 ,  H05K1/112 ,  H05K3/28 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09472 ,  Y10S439/932

Abstract: A socket device for receiving a connection pin is disclosed, the socket device including a substrate having an upper surface. The socket device includes a connection pad disposed on the upper surface and a first layer disposed on the upper surface and on the connection pad. The first layer includes material having an overall positive coefficient of thermal expansion. The socket device includes a second layer disposed on the first layer. The second layer includes material having an overall negative coefficient of thermal expansion. The socket device also includes a contact hole formed in the first and second layers exposing a portion of the connection pad.

Abstract translation: 公开了一种用于接收连接销的插座装置，插座装置包括具有上表面的基板。 插座装置包括设置在上表面上的连接垫和设置在上表面上和连接垫上的第一层。 第一层包括具有总体正的热膨胀系数的材料。 插座装置包括设置在第一层上的第二层。 第二层包括具有总体负的热膨胀系数的材料。 插座装置还包括形成在第一和第二层中的接触孔，露出连接垫的一部分。

公开(公告)号：US06201707B1

公开(公告)日：2001-03-13

申请号：US09318796

申请日：1999-05-26

Applicant: Yoshiki Sota

Inventor： Yoshiki Sota

IPC: H05K118

CPC classification number: H05K1/112 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/4038 ,  H05K3/4092 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10734 ,  H05K2203/1178 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A wiring substrate used for a resin-sealing type semiconductor device is provided with an insulating substrate in which a through hole used for connecting an external terminal is formed, a wiring pattern formed on a semiconductor-chip packaging surface side of the insulating substrate, a land section that is formed at an end of the wiring pattern in a manner so as to cover the through hole from the semiconductor-chip packaging surface side, and that is used for connecting the external connecting terminal to the wiring pattern from the surface side opposite to the above-mentioned semiconductor-chip packaging surface side of the insulating substrate, and a through-hole opening section that allows the through hole to be partially open on the semiconductor-chip packaging surface side. This arrangement makes it possible to prevent problems of separation and swelling of resin caused by bubbles and moisture expanded by heat, which reside in the interface between the wiring substrate used for the resin-sealing type semiconductor device and the semiconductor chip packaged on the wiring substrate used for the resin-sealing type semiconductor device.

Abstract translation: 用于树脂密封型半导体器件的布线基板设置有绝缘基板，其中形成用于连接外部端子的通孔，形成在绝缘基板的半导体芯片封装表面侧上的布线图案， 形成在布线图案的端部以从半导体芯片封装表面侧覆盖通孔的方式形成的，用于从外部连接端子与布线图案相对的表面侧相对的连接端子 到绝缘基板的上述半导体芯片封装表面侧，以及允许通孔在半导体芯片封装表面侧部分地打开的通孔开口部。 这种布置使得可以防止由于用于树脂密封型半导体器件的布线基板与封装在布线基板上的半导体芯片之间的界面中的由气泡和热膨胀而引起的树脂分离和膨胀的问题 用于树脂密封型半导体器件。

公开(公告)号：US06193143B1

公开(公告)日：2001-02-27

申请号：US09366194

申请日：1999-08-04

Applicant: Takatoshi Ishikawa

Inventor： Takatoshi Ishikawa

IPC: B23K3102

CPC classification number: H05K3/3478 ,  H01L21/4846 ,  H01L2224/81 ,  H05K3/3484 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/035 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10992 ,  H05K2203/0195 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/082

Abstract: To present a method and apparatus for forming favorable solder bumps on a substrate of electronic component or the like, in which metal paste is applied on the lower surface of solder balls attracted by a suction tool, and the solder balls are positioned to contact with recesses having the electrode in the bottom, so that the metal paste adhered to the solder balls is adhered to the top of the recesses. Next, the solder balls are moved reciprocally in the vertical direction or horizontal direction. As a result, the metal paste adhered to the top of the recesses is collected to fill up the recesses. Then, the solder balls are put on the top of the recesses, and heated and fused, and solder bumps are formed.

Abstract translation: 为了提出在电子部件等的基板上形成有利的焊料凸块的方法和装置，其中金属浆料被施加在由吸入工具吸引的焊球的下表面上，并且焊球定位成与凹部接触 在底部具有电极，使得粘附到焊球上的金属糊粘附到凹部的顶部。 接下来，焊球在垂直方向或水平方向上往复移动。 结果，收集粘附到凹部顶部的金属糊料以填充凹部。 然后，将焊球放在凹部的顶部，加热熔化，形成焊锡凸块。

公开(公告)号：US6164993A

公开(公告)日：2000-12-26

申请号：US248932

申请日：1999-02-12

Applicant: Tongbi Jiang ,  Zhigiang Wu

Inventor： Tongbi Jiang ,  Zhigiang Wu

IPC: H01R12/82 ,  H05K1/02 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H01R13/20

CPC classification number: H01R12/82 ,  H01R12/58 ,  H05K1/0271 ,  H05K1/112 ,  H05K3/28 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09472 ,  Y10S439/932

Abstract: A socket device for receiving a connection pin is disclosed, the socket device including a substrate having an upper surface. The socket device includes a connection pad disposed on the upper surface and a first layer disposed on the upper surface and on the connection pad. The first layer includes material having an overall positive coefficient of thermal expansion. The socket device includes a second layer disposed on the first layer. The second layer includes material having an overall negative coefficient of thermal expansion. The socket device also includes a contact hole formed in the first and second layers exposing a portion of the connection pad.

Abstract translation: 公开了一种用于接收连接销的插座装置，插座装置包括具有上表面的基板。 插座装置包括设置在上表面上的连接垫和设置在上表面上和连接垫上的第一层。 第一层包括具有总体正的热膨胀系数的材料。 插座装置包括设置在第一层上的第二层。 第二层包括具有总体负的热膨胀系数的材料。 插座装置还包括形成在第一和第二层中的接触孔，露出连接垫的一部分。

公开(公告)号：US06080596A

公开(公告)日：2000-06-27

申请号：US920273

申请日：1997-08-22

Applicant: Alfons Vindasius ,  Kenneth M. Sautter

Inventor： Alfons Vindasius ,  Kenneth M. Sautter

IPC: H01L25/00 ,  H01L21/60 ,  H01L21/98 ,  H01L23/373 ,  H01L23/482 ,  H01L23/485 ,  H01L23/52 ,  H01L23/525 ,  H01L23/532 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L29/06 ,  H01R4/04 ,  H01R29/00 ,  H05K3/30 ,  H05K3/32 ,  H05K7/02 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/82

CPC classification number: H01L23/3737 ,  H01L23/4824 ,  H01L23/5256 ,  H01L23/5328 ,  H01L23/5382 ,  H01L23/5385 ,  H01L24/10 ,  H01L24/13 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01R29/00 ,  H01R4/04 ,  H05K3/305 ,  H05K3/321 ,  H05K7/023 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/24145 ,  H01L2224/2919 ,  H01L2224/29399 ,  H01L2224/32145 ,  H01L2224/75 ,  H01L2224/753 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L29/0657 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K2201/09472 ,  H05K2201/10477 ,  H05K2201/10674 ,  H05K2201/10719 ,  H05K2201/10727 ,  Y02P70/613

Abstract: A method for vertically interconnecting stacks of silicon segments. Each segment includes a plurality of adjacent die on a semiconductor wafer. The plurality of die on a segment are interconnected on the segment using one or more layers of metal interconnects which extend to all four sides of the segment to provide edge bonding pads for external electrical connection points. After the die are interconnected, each segment is cut from the backside of the wafer using a bevel cut to provide four inwardly sloping edge walls on each of the segments. After the segments are cut from the wafer, the segments are placed on top of one another to form a stack. Vertically adjacent segments in the stack are electrically interconnected by applying electrically conductive epoxy to one or more sides of the stack. The inwardly sloping edge walls of each of the segments in the stack provide a recess which allows the electrically conductive epoxy to access the edge bonding pads and lateral circuits on each of the segments once the segments are stacked. A dielectric coating is applied to the die to provide a conformal coating to protect and insulate the die and a laser is used to ablate the area over the bond pads to remove the dielectric coating in order to provide for electrical connections to the bond pads.

Abstract translation: 一种用于垂直互连硅片段的方法。 每个段在半导体晶片上包括多个相邻的管芯。 使用一个或多个金属互连层在片段上互连多个管芯，该金属互连件延伸到段的全部四个侧面，以提供用于外部电连接点的边缘焊盘。 在芯片互连后，使用斜切切割从晶片的背面切割每个片段，以在每个片段上提供四个向内倾斜的边缘壁。 在从晶片切割片段之后，将片段放置在彼此的顶部以形成叠片。 堆叠中的垂直相邻段通过将导电环氧树脂施加到堆叠的一个或多个侧面而电互连。 堆叠中的每个段的向内倾斜的边缘壁提供凹部，其允许导电环氧树脂在片段堆叠之后接近每个片段上的边缘接合焊盘和侧向电路。 将电介质涂层施加到管芯上以提供保形涂层以保护和绝缘管芯，并且使用激光器来消除接合焊盘上的区域以移除电介质涂层，以便提供与接合焊盘的电连接。

公开(公告)号：US6027791A

公开(公告)日：2000-02-22

申请号：US939563

申请日：1997-09-29

Applicant: Masahiko Higashi ,  Kouichi Yamaguchi ,  Masanari Kokubu ,  Hitoshi Kumatabara ,  Noriaki Hamada ,  Kenichi Nagae ,  Michio Shinozaki ,  Yasuhide Tami

Inventor： Masahiko Higashi ,  Kouichi Yamaguchi ,  Masanari Kokubu ,  Hitoshi Kumatabara ,  Noriaki Hamada ,  Kenichi Nagae ,  Michio Shinozaki ,  Yasuhide Tami

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/34 ,  B32B9/00

CPC classification number: H05K3/3436 ,  H01L2224/48227 ,  H05K1/0271 ,  H05K1/0306 ,  H05K2201/068 ,  H05K2201/09472 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/613 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: A structure for mounting a wiring board in which the wiring board including a ceramics insulating board, metallized wiring layers arranged on said insulating board, and a plurality of connection terminals mounted on said insulating board and electrically connected to said metallized wiring layer, is placed on a mother board having wiring conductors formed on the surface of an insulator which contains an organic resin, and the connection terminals of said wiring board are connected by brazing to the wiring conductors of said mother board, wherein a value F1 defined by the following formula (1):F1=L.times..DELTA..alpha./H.sup.2 (1)wherein L is a distance (mm) between the two connection terminals which are most separated away from each other among a plurality of connection terminals mounted on said insulating board, .DELTA..alpha. is a difference in the coefficient of thermal expansion (ppm/.degree. C.) between the insulating board of said wiring board and said mother board at 40 to 400.degree. C., and H is a height (mm) of brazing between said wiring board and said mother board.is not larger than 2000. This structure effectively loosens a difference in the thermal expansion between the wiring board and the mother board, and maintains favorable electric connection between the two for extended periods of time.

Abstract translation: 一种用于安装布线板的结构，其中布置有包括陶瓷绝缘板的布线板，布置在所述绝缘板上的金属化布线层和安装在所述绝缘板上并电连接到所述金属化布线层的多个连接端子放置在 具有形成在包含有机树脂的绝缘体的表面上的布线导体的母板，并且所述布线板的连接端子通过钎焊连接到所述母板的布线导体，其中由下式（ 1）：F1 = Lx DELTAα/ H2（1）其中L是在安装在所述绝缘板上的多个连接端子中彼此分离的两个连接端子之间的距离（mm），DELTAα是 所述布线板的绝缘板与所述母板的绝缘板的热膨胀系数（ppm /℃）在40〜400℃的差异，H为H 所述布线板与所述母板之间的钎焊的角度（mm）。 不大于2000.该结构有效地松开了布线板和母板之间的热膨胀差异，并且在两个长时间之间保持良好的电连接。

公开(公告)号：US6002172A

公开(公告)日：1999-12-14

申请号：US815238

申请日：1997-03-12

Applicant: Kishor V. Desai ,  Amit K. Sarkhel

Inventor： Kishor V. Desai ,  Amit K. Sarkhel

IPC: H01L21/60 ,  H01L23/485 ,  H05K1/11 ,  H05K3/34 ,  H01L21/66 ,  H01L29/34

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H05K1/111 ,  H05K3/3436 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/112 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

Abstract: An adhesion pad for adhering a semiconductor chip or a ball grid array module to a supporting substrate includes a stepped or tapered structure. The structure is composed of at least one solder wettable metal or alloy layer having solder deposited thereon. The stepped or tapered structure prevents a fatigue crack from propagating in the X-Y plane above the adhesion pad.

Abstract translation: 用于将半导体芯片或球栅阵列模块粘附到支撑基板上的粘合垫包括阶梯形或锥形结构。 该结构由至少一个焊料可湿性金属或其上沉积有焊料的合金层组成。 台阶或锥形结构防止疲劳裂纹在粘合垫上方的X-Y平面中传播。

公开(公告)号：US5994648A

公开(公告)日：1999-11-30

申请号：US826461

申请日：1997-03-27

Applicant: Andrew Z. Glovatsky ,  Michael G. Todd ,  Cuong Van Pham

Inventor： Andrew Z. Glovatsky ,  Michael G. Todd ,  Cuong Van Pham

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/28 ,  H05K3/32

CPC classification number: H05K3/326 ,  H05K1/119 ,  H05K1/183 ,  H05K1/184 ,  H05K1/0284 ,  H05K2201/09118 ,  H05K2201/09181 ,  H05K2201/09472 ,  H05K2201/09845 ,  H05K2201/1059 ,  H05K2201/10636 ,  H05K2201/10651 ,  H05K2201/10689 ,  H05K3/284 ,  Y02P70/611

Abstract: An electrical circuit assembly which requires no solder processing, including an electronic component having terminations arranged on at least one of its surfaces, and a molded curviplanar substrate having circuit traces thereon and a cavity formed therein, wherein the cavity substantially conforms in shape with the electronic component. Proximate the cavity is a plurality of electrical contacts, arranged in matched relation with the respective terminations of the electronic component, with at least one of the electrical contacts being connected to at least one of the circuit traces on the substrate. The cavity and electrical contacts are dimensioned such that an interference fit is provided between the component's terminations and the electrical contacts, such that the component is held within the cavity when the component is placed therein. The component is disposed in the cavity such that its terminations are in physical and electrical connection with their respective electrical contacts.

Abstract translation: 不需要焊接处理的电路组件，包括具有布置在其表面中的至少一个上的终端的电子部件，以及在其上形成有电路迹线的模制曲面平面基板和形成在其中的空腔，其中，空腔基本上符合电子形状 零件。 近似空腔是与电子部件的各个端子匹配的多个电触点，其中至少一个电触点连接到基板上的至少一个电路迹线。 空腔和电触头的尺寸使得在部件的端子和电触点之间提供过盈配合，使得当部件放置在其中时，部件保持在腔内。 组件设置在空腔中，使得其端子与其相应的电触点物理和电连接。

公开(公告)号：US5968589A

公开(公告)日：1999-10-19

申请号：US790366

申请日：1997-01-28

Applicant: Tomoo Murakami

Inventor： Tomoo Murakami

IPC: H05K3/18 ,  H05K3/34 ,  B05D5/12

CPC classification number: H05K3/184 ,  H05K3/3452 ,  H05K3/3478 ,  H05K2201/09472 ,  H05K2203/033 ,  H05K2203/0405 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0571 ,  H05K2203/0574 ,  H05K2203/0588 ,  H05K3/3457

Abstract: A wiring pattern is selectively formed on a base member by permanent resist. Furthermore, the thickness of a non-electrolytic copper plating layer is made thinner than that of a permanent resist layer on the base member, so that a concave shape is formed in combination with the permanent resist layer. A solder resist layer is formed on the non-electrolytic copper plating layer and the permanent resist layer except for a pad portion formed by the non-electrolytic copper plating layer, and a peripheral portion of the pad portion is surrounded by a wall formed by the permanent resist layer and the solder resist layer. Solder is supplied onto the pad portion surrounded by the wall by way of either the MICROPRESS method or the MICROBALL method.

Abstract translation: 通过永久性抗蚀剂在基底构件上选择性地形成布线图案。 此外，使非电解镀铜层的厚度比基材上的永久抗蚀剂层的厚度薄，从而与永久抗蚀剂层组合形成凹形。 在非电解镀铜层和除了由非电解镀铜层形成的焊盘部分之外的永久抗蚀剂层上形成阻焊层，并且焊盘部分的周边部分被由 永久抗蚀剂层和阻焊层。 通过MICROPRESS方法或MICROBALL方式将焊料供应到由壁围绕的焊盘部分上。