公开(公告)号：US20030034854A1

公开(公告)日：2003-02-20

申请号：US10205882

申请日：2002-07-26

Inventor： Liang D. Tzeng

IPC: H01P003/04

CPC classification number: H01P3/003 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09336

Abstract: In one aspect, the invention relates to a waveguide structure for differential transmission lines. The waveguide structure includes a first ground structure, a first signal line, a second ground structure, a second signal line, a third ground structure. The first signal line is typically positioned adjacent and substantially parallel to the first ground structure. The second ground structure has a first separation distance from the first ground structure and is typically positioned adjacent and substantially parallel to the first signal line. The first signal line is typically positioned between both the first and second ground structures. The second signal line typically has a second separation distance from the first signal line and is positioned adjacent and substantially parallel to the second ground structure. The second ground structure is typically positioned between both the first and second signal lines. The third ground structure typically has a third separation distance from the second ground structure and is positioned adjacent and substantially parallel to the second signal line. The second signal line is typically positioned between both the second and third ground structures.

Abstract translation: 一方面，本发明涉及用于差动传输线的波导结构。 波导结构包括第一接地结构，第一信号线，第二接地结构，第二信号线，第三接地结构。 第一信号线通常位于与第一接地结构相邻且基本平行的位置。 第二接地结构具有与第一接地结构的第一分隔距离，并且通常位于与第一信号线相邻并基本平行的位置。 第一信号线通常位于第一和第二接地结构之间。 第二信号线通常具有与第一信号线的第二间隔距离，并且与第二接地结构相邻并基本平行。 第二接地结构通常位于第一和第二信号线之间。 第三接地结构通常与第二接地结构具有第三分隔距离，并且与第二信号线相邻并基本平行。 第二信号线通常位于第二和第三接地结构之间。

公开(公告)号：US20030030516A1

公开(公告)日：2003-02-13

申请号：US10105448

申请日：2002-03-26

Inventor： Yoshio Tsukiyama ,  Masato Shiobara

IPC: H01P001/00

CPC classification number: H01P1/047 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6616 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/15313 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K1/0243 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09618 ,  H05K2201/10727 ,  H05K2201/10969 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention was developed in order to provide a connected construction of a high-frequency package and a wiring board having an excellent high-frequency transmission characteristic, without degradation of the transmission characteristic of even high-frequency signals in a wide band ranging from 20 GHz to 80 GHz in the case of connecting a high-frequency package to a wiring board, wherein a distance between conductive vias and conductive vias to connect grounds formed on both main surfaces of a high-frequency transmission line substrate constituting the high-frequency package, and a distance between conductive vias and conductive vias to connect grounds formed on both main surfaces of the wiring board on which the high-frequency package is mounted, are set in consideration of the dielectric constant of the high-frequency transmission line substrate and the dielectric constant of the wiring board in order to improve the high-frequency transmission characteristic between the high-frequency transmission line substrate and the wiring board.

Abstract translation: 开发本发明是为了提供具有优异的高频传输特性的高频封装和布线板的连接结构，而不会在20频段的宽带内甚至高频信号的传输特性降低 在将高频封装连接到布线板的情况下，其中，导电通孔和导电通孔之间的距离，以连接形成在构成高频封装的高频传输线基板的两个主表面上的接地 并且考虑到高频传输线基板的介电常数和与高频传输线基板的介电常数相对应地设置用于连接形成在其上安装有高频封装的布线板的两个主表面上的接地的导电通孔和导电通孔之间的距离 介电常数的布线板为了提高高频传输特性的优点 高频传输线基板和接线板。

公开(公告)号：US06356451B1

公开(公告)日：2002-03-12

申请号：US09231764

申请日：1999-01-15

Applicant: Yasutada Nakagawa ,  Nobuko Nakamura ,  Yasuo Fujii

Inventor： Yasutada Nakagawa ,  Nobuko Nakamura ,  Yasuo Fujii

IPC: H05K702

CPC classification number: H05K1/0271 ,  H05K1/0298 ,  H05K2201/0352 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/0969 ,  H05K2201/09781 ,  Y10S428/901 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/24942 ,  Y10T428/2495

Abstract: Conductive layers have at least a portion of a conductive member arranged in a nonlinear or polygonal configuration and having a greater layout area and an insulating layer is alternately stacked relative to the conductive layer, wherein a variation in amount of the conductive member at the conductive layer with a middle of a board thickness direction as a reference is set in a range in which a warp is less likely to be produced and in a range near to zero.

Abstract translation: 导电层具有布置成非线性或多边形构造的导电构件的至少一部分，并且具有更大的布局面积，并且绝缘层相对于导电层交替堆叠，其中导电层的导电构件的量的变化 将作为基准的板厚方向的中间设定在不太可能产生翘曲的范围内且接近零的范围内。

公开(公告)号：US06181571B2

公开(公告)日：2001-01-30

申请号：US09262928

申请日：1999-03-05

Applicant: Satoshi Sugimoto

Inventor： Satoshi Sugimoto

IPC: H05K714

CPC classification number: H05K1/165 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0234 ,  H05K1/14 ,  H05K1/142 ,  H05K1/148 ,  H05K1/167 ,  H05K3/3447 ,  H05K9/0039 ,  H05K2201/09263 ,  H05K2201/09336 ,  H05K2201/10022 ,  H05K2201/10371 ,  H05K2201/10409

Abstract: A printed-wiring board is incorporated into an electronic device housing constructed of a conductive member, and has a ground pattern. A metal plate having a size equal to or larger than the printed-wiring board is disposed in a position facing to the printed-wiring board. The metal plate has a characteristic impedance corresponding to an electric characteristic and a relative position to the printed-wiring board. A connecting member electrically connects the ground pattern of the printed-wiring board to the metal plate, and includes an impedance element having a value substantially equal to the characteristic impedance between the printed-wiring board and the metal plate. An occurrence of radiant noises caused by standing-waves etc. is thereby prevented. A conductive layer having the ground pattern of the printed-wiring board may be connected to another conductive layer provided instead of the metal plate and including a conductive member of which an area is substantially equal to the former conductive layer, with an impedance element interposed between these conductive layers.

Abstract translation: 印刷电路板被并入由导电构件构成的电子器件壳体中，并具有接地图案。 具有等于​​或大于印刷电路板的尺寸的金属板设置在与印刷电路板相对的位置。 金属板具有对应于电特性的特性阻抗和与印刷电路板的相对位置。 连接构件将印刷电路板的接地图案与金属板电连接，并且包括具有与印刷电路板和金属板之间的特性阻抗基本相等的值的阻抗元件。 由此防止由驻波等引起的辐射噪声的发生。 具有印刷电路板的接地图案的导电层可以连接到代替金属板而设置的另一个导电层，并且包括导电构件，其导电构件的面积基本上等于前一导电层，阻抗元件介于 这些导电层。

公开(公告)号：US6023211A

公开(公告)日：2000-02-08

申请号：US986306

申请日：1997-12-05

Applicant: Junichi Somei

Inventor： Junichi Somei

IPC: H01P3/08 ,  H01P5/02 ,  H01P5/08 ,  H05K1/02 ,  H05K3/42 ,  H05K1/11

CPC classification number: H01P3/081 ,  H05K1/0251 ,  H02M2007/53876 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09627 ,  H05K2201/09845 ,  H05K3/429

Abstract: There is provided a transmission circuit using a strip line which can be formed in three dimensions with simple construction and low cost and which has high reliability. A first microstrip line is formed by sandwiching a dielectric substrate 1 between a first strip conductor 2 provided on a top surface of the dielectric substrate 1 and a first grounding conductor 3 provided on a bottom surface of the dielectric substrate 1. A second microstrip line is formed by sandwiching the dielectric substrate 1 between a second strip conductor 4 provided on the bottom surface of the dielectric substrate 1 and a second grounding conductor 5 provided on the top surface of the dielectric substrate 1. The first strip conductor 2 and the second strip conductor 4 are electrically connected to each other by a connecting through hole 11 provided in the dielectric substrate 1.

Abstract translation: 提供了一种使用带状线的传输电路，其可以以简单的结构和低成本三维形成，并且具有高可靠性。 通过将电介质基板1夹持在设置在电介质基板1的上表面上的第一带状导体2和设置在电介质基板1的底面上的第一接地导体3之间来形成第一微带线。第二微带线是 通过将电介质基板1夹持在设置在电介质基板1的底面上的第二带状导体4和设置在电介质基板1的上表面的第二接地导体5之间而形成。第一带状导体2和第二带状导体 4通过设置在电介质基板1中的连接通孔11彼此电连接。

公开(公告)号：US5777277A

公开(公告)日：1998-07-07

申请号：US714442

申请日：1996-09-16

Applicant: Hideho Inagawa

Inventor： Hideho Inagawa

IPC: H01F17/00 ,  H01R12/00 ,  H05K1/02 ,  H05K1/16 ,  H05K3/22 ,  H05K3/46 ,  H01R9/09

CPC classification number: H01F17/0006 ,  H05K1/0233 ,  H05K1/165 ,  H01F2017/0046 ,  H05K1/0231 ,  H05K2201/09336 ,  H05K2201/09618 ,  H05K2201/09772 ,  H05K2201/10287 ,  H05K2201/10636 ,  H05K3/222 ,  H05K3/4685 ,  Y02P70/611

Abstract: A ground connecting pattern of the printed circuit board is separated by forming a spiral circuit pattern element onto a printed circuit board. The separated ground connecting patterns are electrically connected by an electric part, thereby suppressing radiation noises of the printed circuit board.

Abstract translation: 通过在印刷电路板上形成螺旋形电路图形元件来分离印刷电路板的接地连接图案。 分离的接地连接图案通过电气部件电连接，从而抑制印刷电路板的辐射噪声。

公开(公告)号：US5714718A

公开(公告)日：1998-02-03

申请号：US660890

申请日：1996-06-10

Applicant: Shinji Tanaka

Inventor： Shinji Tanaka

IPC: H05K1/00 ,  H05K1/02 ,  H05K3/46 ,  H05K1/03

CPC classification number: H05K1/0256 ,  H05K1/0216 ,  H05K1/0262 ,  H05K1/0289 ,  H05K1/0298 ,  H05K2201/09336 ,  H05K2201/09972

Abstract: In a data processing apparatus, communication apparatus or similar electronic apparatus, a laminate wiring board has a signal layer having a ground area and interposed between a signal layer and a power supply layer. Therefore, there is no need to provide a ground layer between the signal layer and the power supply layer. The wiring board can therefore be implemented with a small number of layers and is free from faults ascribable to extra layers.

Abstract translation: 在数据处理装置，通信装置或类似的电子设备中，层叠布线板具有接地区域的信号层，并且介于信号层和电源层之间。 因此，不需要在信号层和电源层之间提供接地层。 因此，布线板可以实现少量的层，并且不会产生归因于额外层的故障。

公开(公告)号：US5357050A

公开(公告)日：1994-10-18

申请号：US979590

申请日：1992-11-20

Applicant: Jozef B. Baran ,  Edward D. Suski

Inventor： Jozef B. Baran ,  Edward D. Suski

IPC: H05K1/02 ,  H05K9/00 ,  H01B11/00

CPC classification number: H05K1/0228 ,  H05K9/0039 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/09672

Abstract: A method for defining traces on a multi-layer circuit board suppresses electro-magnetic emissions radiated from the traces. The defined traces carry a differential signal. Layers of signal and return trace pairs are formed. Each succeeding layer of traces is spaced above and follows the traces below, with the succeeding signal trace positioned above the preceding return trace and the succeeding return trace positioned above the preceding signal trace. All of the signal traces are conductively connected and all of the return traces are conductively connected. The symmetry of the arrangement causes the electro-magnetic fields generated by the conductors (traces) to cancel at any appreciable distance. Additionally, varying combinations of layers and/or varying parameters such as dimension, spacing and dielectric material, results in a desired impedance for matching to external cabling and the like.

Abstract translation: 用于在多层电路板上定义迹线的方法抑制从迹线辐射的电磁辐射。 定义的走线携带差分信号。 形成信号和返回迹线对的层。 每个后续层的迹线在上面跟踪并跟随下面的迹线，其后的信号迹线位于上一个返回迹线之上，并且后续的返回迹线位于先前的信号迹线之上。 所有的信号迹线都是导电连接的，所有的返回走线都是导电连接的。 该布置的对称性导致由导体（迹线）产生的电磁场以任何可观的距离消除。 另外，层的变化的组合和/或诸如尺寸，间距和介电材料的变化的参数导致用于匹配外部电缆等的期望的阻抗。

公开(公告)号：US4675627A

公开(公告)日：1987-06-23

申请号：US761007

申请日：1985-07-31

Applicant: Joseph E. Johnston

Inventor： Joseph E. Johnston

IPC: H01P9/00 ,  H05K1/00 ,  H05K1/02

CPC classification number: H05K1/0248 ,  H01P9/00 ,  H05K1/0393 ,  H05K2201/051 ,  H05K2201/0715 ,  H05K2201/09263 ,  H05K2201/09336

Abstract: A time delay device for adjusting the arrival time of an electronic signal at a specific area in a circuit pattern is presented. The time delay device is comprised of a coplanar flexible circuit having a conductive pattern consisting of a signal line in a ground shield. The signal line is preferably serpentine and makes one or more passes back and forth on the dielectric surface of the flexible circuit. The ground plane covers substantially the entire surface of the laminate except for a small gap on either side of the signal line. This circuit laminate is then tightly rolled up and permanently packaged in a suitable sheath or by encapsulation. The delay of the delay line is substantially increased (without increasing the line length of the circuit) by utilizing a dielectric and/or adhesive having high permeability. The use of a high permeability dielectric and/or adhesive will minimize the size, cost and resistive losses of the time delay device.

Abstract translation: 提出了一种用于在电路图案中的特定区域调整电子信号的到达时间的延时装置。 时间延迟器件由具有由接地屏蔽中的信号线组成的导电图案的共面柔性电路构成。 信号线优选是蛇形的，并使得一个或多个在柔性电路的电介质表面上前后传播。 接地平面覆盖了层叠体的整个表面，除了信号线两边的小间隙之外。 然后将该电路层压板紧密卷起并且永久包装在合适的护套中或通过封装。 通过利用具有高磁导率的电介质和/或粘合剂，延迟线的延迟显着增加（不增加电路的线路长度）。 使用高磁导率电介质和/或粘合剂将使时延装置的尺寸，成本和电阻损耗最小化。

公开(公告)号：US4268956A

公开(公告)日：1981-05-26

申请号：US20714

申请日：1979-03-15

Applicant: Howard L. Parks ,  John M. Kuronen

Inventor： Howard L. Parks ,  John M. Kuronen

IPC: H05K1/00 ,  H05K3/28 ,  H05K3/36 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H01R43/00

CPC classification number: H01R12/62 ,  H05K3/365 ,  H05K3/4007 ,  H05K1/0393 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09336 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/1572 ,  H05K3/281 ,  H05K3/423 ,  H05K3/4647 ,  Y10T29/49123 ,  Y10T29/49155 ,  Y10T29/49195 ,  Y10T29/49201

Abstract: A flexible connector cable for providing high density and reliable electrical interconnections between printed circuit boards or any other surfaces having conductive paths that need connection to conductive paths on adjacent surfaces. The connector cable comprises a flat flexible laminar structure including an electrically-insulative layer and an electrically-conductive layer. The insulative layer is typically formed on a bonded plastic such as Polyimide and the conductive layer is typically formed of copper. Openings are formed in the insulative layer to expose the conductive layer and raised contacts or buttons are deposited on the conductive layer on both surfaces of the cable. The raised contacts are formed of ductile conductive material which exhibits plastic deformation under pressure to form good electrical connections.

Abstract translation: 一种柔性连接器电缆，用于在印刷电路板或具有需要连接到相邻表面上的导电路径的导电路径的任何其它表面之间提供高密度和可靠的电互连。 连接器电缆包括包括电绝缘层和导电层的扁平柔性层状结构。 绝缘层通常形成在诸如聚酰亚胺的粘结塑料上，并且导电层通常由铜形成。 在绝缘层中形成开口以暴露导电层，并且将凸起的触点或按钮沉积在电缆的两个表面上的导电层上。 凸起的触点由韧性导电材料形成，其在压力下表现出塑性变形以形成良好的电连接。