公开(公告)号：US20050098348A1

公开(公告)日：2005-05-12

申请号：US10603256

申请日：2003-06-25

Applicant: Takehiro Okumichi ,  Hiroyuki Tanaka ,  Yuji Kishida

Inventor： Takehiro Okumichi ,  Hiroyuki Tanaka ,  Yuji Kishida

IPC: H01L23/498 ,  H01L23/552 ,  H01L23/66 ,  H01P1/04 ,  H01R12/04 ,  H05K1/02 ,  H05K1/11 ,  H05K7/06

CPC classification number: H01L23/552 ,  H01L23/49827 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6616 ,  H01L2224/32188 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/16195 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01P1/047 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/09809 ,  H05K2201/09845 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Signal wiring conductors are provided at opposing positions on the upper surface of the uppermost dielectric layer and on the lower surface of the bottommost dielectric layer, and grounding conductors surrounding grounding-conductor non-forming areas are provided on the upper surfaces of intermediate dielectric layers and the bottommost dielectric layer. These grounding conductors form an electromagnetically shielded space by being connected by grounding-conductor via conductors vertically penetrating the respective dielectric layers around the grounding-conductor non-forming areas, and signal via conductors are so provided in the respective dielectric layers as to penetrate this electromagnetically shielded space. A signal via conductor of the uppermost dielectric layer is connected with the signal wiring conductor on the upper surface thereof via a signal-wiring connecting conductor, and a signal via conductor of the bottommost dielectric layer is connected with the signal wiring conductor on the lower surface thereof via a signal-wiring connecting conductor.

Abstract translation: 信号布线导体设置在最上层电介质层的上表面和最下面的电介质层的下表面的相对位置处，并且在中间电介质层的上表面上设置有围绕接地导体非形成区域的接地导体， 最底层的介电层。 这些接地导体通过接地导体形成电磁屏蔽空间，该导体通过垂直地穿过接地导体非形成区域周围的各个介电层的导体连接，并且信号通孔导体设置在相应的电介质层中，以贯穿该电磁 屏蔽空间。 最上面的电介质层的信号通孔导体经由信号布线连接导体与其上表面的信号布线导体连接，最下面的电介质层的信号通孔导体与下表面的信号布线导体连接 通过信号线连接导体。

公开(公告)号：US20050056458A1

公开(公告)日：2005-03-17

申请号：US10881753

申请日：2004-06-30

Applicant: Tsuyoshi Sugiura

Inventor： Tsuyoshi Sugiura

IPC: H03B5/36 ,  H05K1/03 ,  H05K1/11 ,  H05K3/24 ,  H05K3/32 ,  H05K3/34 ,  H05K1/18

CPC classification number: H03B5/36 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0306 ,  H05K1/111 ,  H05K3/245 ,  H05K3/3442 ,  H05K2201/0338 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2201/10636 ,  H05K2203/049 ,  Y02P70/611 ,  H01L2924/00014

Abstract: A mounting pad provided on an insulating substrate and comprising an electrically conductive pattern electrically joined with an electronic component and/or a bonding wire connected to an electronic component. The electrically conductive pattern comprises a plurality of metalized layers stacked on one another. By this structure, an electrically conductive adhesive for joining electronic components with mounting pads can be prevented from flowing out from the joining section therebetween to prevent a short-circuit of the mounting pads, or to prevent an interference with the wire-bonding by covering the bonding area.

Abstract translation: 一种设置在绝缘基板上并包括与电子部件电连接的导电图案和/或连接到电子部件的接合线的安装焊盘。 导电图案包括彼此堆叠的多个金属化层。 通过这种结构，可以防止用于将电子部件与安装焊盘接合的导电粘合剂从其间的接合部分流出，以防止安装焊盘的短路，或者通过覆盖安装焊盘来防止引线接合的干扰 粘合区域。

公开(公告)号：US06852932B2

公开(公告)日：2005-02-08

申请号：US10650309

申请日：2003-08-28

Applicant: Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/11 ,  H01R12/04

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1056

Abstract: A multi-layer circuit board having apertures that are selectively and electrically isolated from electrically grounded member and further having selectively formed air bridges and/or crossover members which are structurally supported by a polymeric material. Each of the apertures selectively receives an electrically conductive material.

Abstract translation: 一种多层电路板，其具有与电接地构件选择性地和电隔离的孔，并且还具有由聚合物材料在结构上支撑的选择性地形成的空气桥和/或交叉构件。 每个孔选择性地接收导电材料。

公开(公告)号：US06847276B2

公开(公告)日：2005-01-25

申请号：US10460264

申请日：2003-06-13

Applicant: Naoya Tamaki ,  Norio Masuda

Inventor： Naoya Tamaki ,  Norio Masuda

IPC: H01P5/08 ,  H05K1/02 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01P5/085 ,  H01L2924/0002 ,  H01L2924/19107 ,  H05K1/0219 ,  H05K1/183 ,  H05K3/3405 ,  H05K3/341 ,  H05K3/3421 ,  H05K2201/09809 ,  H05K2201/09845 ,  H05K2201/10356 ,  H01L2924/00

Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.

Abstract translation: 本发明的目的是提供一种不受电磁影响而不易受电连接劣化的射频集成电路模块。 包括安装在具有电介质层的多层电路基板上的电路元件的本发明的射频电路模块的特征在于，通过去除电介质的一部分来提供暴露的连接部分，以及连接到所述电路元件的带状线 以及用于从所述带状线发射射频信号的同轴线在所述暴露的连接部分的底部连接在一起，以便以三维方式成直线。

公开(公告)号：US06818477B2

公开(公告)日：2004-11-16

申请号：US10217726

申请日：2002-08-13

Applicant: William K. Veitschegger ,  Scott Sauer

Inventor： William K. Veitschegger ,  Scott Sauer

IPC: H01L2158

CPC classification number: H05K1/0204 ,  H05K1/021 ,  H05K1/182 ,  H05K3/0061 ,  H05K3/341 ,  H05K3/427 ,  H05K3/429 ,  H05K2201/09845 ,  H05K2201/09981 ,  H05K2201/10416 ,  H05K2203/0242 ,  H05K2203/0415 ,  H05K2203/1476 ,  Y10T29/4913 ,  Y10T29/49156

Abstract: A printed circuit board (PCB) assembly comprising a PCB having a top circuitry layer and a bottom layer with a hole through the PCB, a component, and a pallet. The printed circuit board manufactured by a method including forming a hole through the top circuitry layer and the bottom layer, attaching the bottom layer to a pallet, placing the component in the hole, and soldering the component to the top circuitry layer and to the pallet.

Abstract translation: 一种印刷电路板（PCB）组件，包括具有顶部电路层的PCB​​，以及具有通过PCB的孔的底层，部件和托盘。 通过包括通过顶部电路层和底层形成孔的方法制造的印刷电路板，将底层附接到托盘，将部件放置在孔中，以及将部件焊接到顶部电路层和托盘 。

公开(公告)号：US20040166617A1

公开(公告)日：2004-08-26

申请号：US10784740

申请日：2004-02-24

Applicant: FUJITSU LIMITED

Inventor： Kiyokazu Moriizumi ,  Manabu Watanabe

IPC: H01L021/8234

CPC classification number: H05K3/243 ,  H01L23/49811 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/16152 ,  H05K1/113 ,  H05K3/062 ,  H05K3/108 ,  H05K3/28 ,  H05K3/388 ,  H05K3/389 ,  H05K3/467 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/025 ,  H01L2224/0401

Abstract: A mounted circuit substrate has at least one conductive layer. The side faces of a component mounting pad is formed on a surface of the substrate, and includes at least a columnar pattern made of a metal highly resistant to erosion by solder. The side faces of the component mounting pad are completely covered with an organic insulating layer. Therefore, the component mounting pad can withstand molten solder stresses accompanying component replacement even when component replacement is done many times.

Abstract translation: 安装的电路基板具有至少一个导电层。 元件安装垫的侧面形成在基板的表面上，并且至少包括由金属制成的柱状图案，该金属具有高度耐受焊料侵蚀的金属。 元件安装垫的侧面完全被有机绝缘层覆盖。 因此，即使部件更换多次，组件安装垫也可以承受伴随部件更换的熔融焊料应力。

公开(公告)号：US20040144562A1

公开(公告)日：2004-07-29

申请号：US10740459

申请日：2003-12-22

Applicant: Fujitsu Limited

Inventor： Kiyoshi Ishikawa

IPC: H05K007/06

CPC classification number: H05K1/025 ,  H05K1/0237 ,  H05K1/0253 ,  H05K1/0298 ,  H05K1/117 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/094 ,  H05K2201/0969 ,  H05K2201/09845

Abstract: To provide a printed wiring board where the impedance between pads through which differential signals pass has been set to a predetermined standard value. The printed wiring board includes a first conductor layer extending over an area excluding a hole formed for each pad group and filled with a dielectric, and a second conductor layer extending over an area containing areas facing the hole. The hole encompasses a plurality of areas facing predetermined respective pads which are adjacent to each other and which form the pad group from among the plurality of pads.

Abstract translation: 为了提供印刷电路板，其中差分信号通过的焊盘之间的阻抗已经被设置为预定的标准值。 印刷布线板包括在除了为每个焊盘组形成并填充有电介质的孔之外的区域上延伸的第一导体层，以及在包含面向孔的区域的区域上延伸的第二导体层。 该孔包围面对预定相应焊盘的多个区域，这些区域彼此相邻并且从多个焊盘中形成焊盘组。

公开(公告)号：US06767616B2

公开(公告)日：2004-07-27

申请号：US10436143

申请日：2003-05-13

Applicant: Kazuhiko Ooi ,  Masaru Yamazaki ,  Yukiji Watanabe ,  Takaaki Yazawa

Inventor： Kazuhiko Ooi ,  Masaru Yamazaki ,  Yukiji Watanabe ,  Takaaki Yazawa

IPC: B32B300

CPC classification number: H05K3/44 ,  H05K3/429 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/09518 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09718 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09845 ,  Y10S428/901 ,  Y10T428/24917

Abstract: A metal core substrate comprises a core layer (10) consisting of first and second metal plates (11, 12) layered with a third insulating layer (13) interposed therebetween; first and second insulating layers (20, 21) formed on the first and metal plates, respectively; first and second wiring patterns (45, 46) formed on the first and second insulating layers, respectively. A conductive layer (40) formed in a through-hole (22) penetrates the first insulating layer, the first metal plate, the third insulating layer, the second metal plate and the second insulating layer for electrically connecting the first wiring pattern with the second wiring pattern. The first metal plate (11) is electrically connected with the first wiring pattern (45) and the second wiring pattern (46), respectively, by means of a via (44) and by means a via (43). The second metal plate (12) is electrically connected with the second wiring pattern (46) and the first wiring pattern (45), respectively, by means of a via (42) and by means a via (41), respectively.

Abstract translation: 金属芯基板包括由第一和第二金属板（11,12）组成的芯层（10），第一和第二金属板与第三绝缘层（13）分开; 分别形成在第一和金属板上的第一和第二绝缘层（20,21）; 分别形成在第一和第二绝缘层上的第一和第二布线图案（45,46）。 形成在通孔（22）中的导电层（40）穿过第一绝缘层，第一金属板，第三绝缘层，第二金属板和第二绝缘层，用于将第一布线图案与第二绝缘层 接线图案。 第一金属板（11）通过通孔（44）和通孔（43）分别与第一布线图案（45）和第二布线图案（46）电连接。 第二金属板（12）分别通过通孔（42）和通孔（41）与第二布线图案（46）和第一布线图案（45）电连接。

公开(公告)号：US20040108131A1

公开(公告)日：2004-06-10

申请号：US10650309

申请日：2003-08-28

Inventor： Achyuta Achari ,  Andrew Zachary Glovatsky ,  Robert Edward Belke ,  Brenda Joyce Nation ,  Delin Li ,  Lakhi N. Goenka ,  Mohan R. Paruchuri ,  Robert Joseph Gordon ,  Thomas Bernd Krautheim

IPC: H05K001/00 ,  H05K003/36 ,  H05K003/20

CPC classification number: H05K3/4038 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T156/1056

Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.

Abstract translation: 一种用于制造具有孔96,98的多层电路板116的方法，其可以与电接地构件46选择性地和电隔离，并且还具有在结构上由材料112支撑的选择性地形成的空气桥和/或交叉构件104.每个 孔96,98选择性地接收导电材料114。

公开(公告)号：US06739041B2

公开(公告)日：2004-05-25

申请号：US09815234

申请日：2001-03-22

Applicant: Bharat Z. Patel ,  Jay D. Baker ,  Mohan R. Paruchuri

Inventor： Bharat Z. Patel ,  Jay D. Baker ,  Mohan R. Paruchuri

IPC: H05K320

CPC classification number: H05K3/462 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method 10, 90 for making a multi-layer electronic circuit board 82, 168 including the steps of forming at least one protuberance 15, 100 upon an electrically conductive member 12, 92 and adding additional electrically conductive layers of material 34, 56, 58, 104, 114, 138, 140 to the member 12, 92 while selectively extending the protuberance 15, 100 within the layers 82, 168, thereby forming a circuit board 82, 168. A portion of the formed circuit board may be etched in order to selectively create air-bridges 86 or interconnection portions 164.

Abstract translation: 一种用于制造多层电子电路板82,168的方法10,90，包括在导电构件12,92上形成至少一个突起15,100的步骤，并且添加另外的材料34,56,58的导电层 ，104,114,138,140连接到构件12,92，同时在层82,168内选择性地延伸突起15,100，从而形成电路板82,168。形成的电路板的一部分可以按顺序蚀刻 以选择性地产生空气桥86或互连部分164。