公开(公告)号：US07387945B2

公开(公告)日：2008-06-17

申请号：US11116046

申请日：2005-04-27

Applicant: Kazumi Hara

Inventor： Kazumi Hara

IPC: H01L21/30

CPC classification number: H01L23/562 ,  H01L23/3171 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K2201/0166 ,  H05K2201/0352 ,  H05K2201/068 ,  H05K2201/09136 ,  H05K2201/09736 ,  H05K2201/09909 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A semiconductor chip is provided that is highly packageable and particularly well suited for mounting on a circuit board having a curved surface. The semiconductor chip comprises a warpage control film that controls the warpage of a substrate.

Abstract translation: 提供了一种高度可封装的半导体芯片，特别适用于安装在具有曲面的电路板上。 半导体芯片包括控制基板翘曲的翘曲控制膜。

公开(公告)号：US20080022523A1

公开(公告)日：2008-01-31

申请号：US11868148

申请日：2007-10-05

Applicant: Alan Wang ,  Kevin Olson

Inventor： Alan Wang ,  Kevin Olson

IPC: H05K3/00 ,  H01K3/10

CPC classification number: H05K3/445 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/426 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0129 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/1105 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.

Abstract translation: 电路板包括具有围绕导电片的绝缘涂层的导电片，绝缘涂层的表面围绕导电片的边缘具有弓形或圆形形状。 至少一个电导体被共形沉积在导电片的边缘周围的至少圆形绝缘涂层上，并通过光刻和金属化技术限定。 导电片边缘周围的绝缘涂层上的每个电导体符合绝缘涂层的弧形或圆形形状，因此具有弓形或圆形形状。

公开(公告)号：US07295445B2

公开(公告)日：2007-11-13

申请号：US10954463

申请日：2004-09-30

Applicant: Jang My

Inventor： Jang My

IPC: H05K7/02 ,  H01L23/12

CPC classification number: H05K3/3442 ,  H05K3/303 ,  H05K2201/0166 ,  H05K2201/09472 ,  H05K2201/10393 ,  H05K2201/10636 ,  H05K2201/2018 ,  H05K2203/0169 ,  H05K2203/0594 ,  H05K2203/0769 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171

Abstract: Methods and apparatus to couple a device, such as, for example, a surface mount device, with a substrate, such as, for example, a printed circuit, are disclosed. An apparatus, according to one aspect, may include a substrate, a plurality of terminals coupled with the substrate, a conductive bonding material coupled with the plurality of terminals, an electronic device coupled with the conductive bonding material, and a holder that is coupled with the substrate to hold the electronic device. A method, according to one aspect, may include coupling a holder with a substrate such that terminals of the substrate are included in an opening of the holder, mounting an electronic device over the terminals with a conductive bonding material disposed therebetween, heating the conductive bonding material to its melting point, and cooling the conductive bonding material.

Abstract translation: 公开了将诸如例如表面贴装装置的装置与衬底（例如印刷电路）耦合的方法和装置。 根据一个方面的装置可以包括衬底，与衬底耦合的多个端子，与多个端子耦合的导电接合材料，与导电接合材料耦合的电子器件，以及与 保持电子设备的基板。 根据一个方面的一种方法可以包括将保持器与衬底连接，使得衬底的端子包括在保持器的开口中，将电子器件安装在端子之间，其间设置有导电接合材料，加热导电接合 材料到其熔点，并冷却导电接合材料。

公开(公告)号：US20070169958A1

公开(公告)日：2007-07-26

申请号：US11728382

申请日：2007-03-26

Applicant: Yutaka Kaneda

Inventor： Yutaka Kaneda

IPC: H05K1/00

CPC classification number: H05K3/0002 ,  H05K1/0393 ,  H05K3/002 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/4007 ,  H05K3/423 ,  H05K3/4614 ,  H05K3/4635 ,  H05K2201/0166 ,  H05K2201/0367 ,  H05K2203/056 ,  H05K2203/0733 ,  H05K2203/1545 ,  Y10S428/901 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: In one embodiment, the present invention provides a process for manufacturing a multilayer flexible wiring board, which allows individual layers of wiring boards to be precisely positioned and to be readily stacked. A mask for exposure is prepared in which a plurality of pattern holes corresponding to individual layers of wiring boards of a multilayer flexible wiring board are arranged in the direction perpendicular to the transporting direction P of substrate. This mask for exposure is used to form a plurality of wiring patterns corresponding to individual layers of wiring boards of a multilayer flexible wiring board on the same sheet-like substrate.

Abstract translation: 在一个实施例中，本发明提供一种制造多层挠性布线板的方法，其允许各层布线板精确定位并容易堆叠。 制备用于曝光的掩模，其中与垂直于基板的传送方向P的方向布置与多层柔性布线板的布线板的各层相对应的多个图案孔。 该曝光用掩模用于形成与同一片状基板上的多层柔性布线基板的各层布线基板对应的多个布线图案。

公开(公告)号：US07159308B2

公开(公告)日：2007-01-09

申请号：US11224197

申请日：2005-09-12

Applicant: Alan E. Wang ,  Kevin C. Olson ,  Thomas H. Di Stefano

Inventor： Alan E. Wang ,  Kevin C. Olson ,  Thomas H. Di Stefano

IPC: H05K3/36

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

Abstract translation: 提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分 到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 和（d）以一种方式将第一电路板与一次性部分分离，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。 还提供了通过该方法形成的电路板。

公开(公告)号：US20060005995A1

公开(公告)日：2006-01-12

申请号：US11224197

申请日：2005-09-12

Applicant: Alan Wang ,  Kevin Olson ,  Thomas Di Stefano

Inventor： Alan Wang ,  Kevin Olson ,  Thomas Di Stefano

IPC: H05K1/03

CPC classification number: H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

Abstract translation: 提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分 到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 以及（d）以一种方式将第一电路板与一次性部分分开，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。 还提供了通过该方法形成的电路板。

公开(公告)号：US20050025967A1

公开(公告)日：2005-02-03

申请号：US10775174

申请日：2004-02-11

Applicant: Ernest Lawton ,  Robert Rau ,  Garry Puckett

Inventor： Ernest Lawton ,  Robert Rau ,  Garry Puckett

IPC: C03C25/00 ,  C03C25/10 ,  C03C25/26 ,  C03C25/32 ,  C03C25/36 ,  C03C25/48 ,  C08J5/08 ,  H05K1/03 ,  D02G3/00

CPC classification number: D02G3/00 ,  C03C25/00 ,  C03C25/10 ,  C03C25/26 ,  C03C25/323 ,  C03C25/36 ,  C03C25/47 ,  C03C25/48 ,  C08J5/08 ,  H05K1/0366 ,  H05K2201/0166 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0245 ,  H05K2203/127 ,  Y10T428/2927 ,  Y10T428/2933 ,  Y10T428/2938 ,  Y10T428/2962 ,  Y10T428/2964

Abstract: The present invention provides a glass fiber product having particles adhered to at least one fiber of the product, where the size and amount of particles is effective to reduce the tackiness of the glass fiber product and optionally effective to reduce interfilament bonding, and composition, and method for forming the same.

Abstract translation: 本发明提供了一种玻璃纤维产品，其具有附着到产品的至少一种纤维上的颗粒，其中颗粒的尺寸和数量有效地降低玻璃纤维产品的粘性，并且可选地有效地减少纤维间粘合，以及组合物，和 其形成方法。

公开(公告)号：US06718631B2

公开(公告)日：2004-04-13

申请号：US09912492

申请日：2001-07-26

Applicant: Masanori Takeuchi

Inventor： Masanori Takeuchi

IPC: H01K310

CPC classification number: H05K3/4617 ,  H01L2924/0002 ,  H05K1/0265 ,  H05K3/002 ,  H05K3/06 ,  H05K3/202 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0166 ,  H05K2201/0195 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2203/0369 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Process for producing a flexible wiring board by etching a metal foil halfway to form a thick film part and a thin film part, etching the thin film part in order to form a first wiring film having the thick film part and a second wiring film having the thin film part with the first wiring film having a larger thickness than the second wiring film. The sectional area and electrical resistance of the first wiring film can be enlarged, even in cases where the first wiring film and the second wiring film have almost the same width, because of the larger film thickness of the first wiring film.

Abstract translation: 通过一半蚀刻金属箔以形成厚膜部分和薄膜部分来生产柔性布线板的方法，蚀刻薄膜部分以形成具有厚膜部分的第一布线膜和具有厚膜部分的第二布线膜， 所述第一布线膜的厚度比所述第二布线膜厚。 即使在第一布线膜和第二布线膜的宽度几乎相同的情况下，由于第一布线膜的膜厚越大，所以能够扩大第一布线膜的截面积和电阻。

公开(公告)号：US20020061653A1

公开(公告)日：2002-05-23

申请号：US09990070

申请日：2001-11-21

Inventor： Stefan Pinter ,  Holger Hoefer

IPC: H01L021/76 ,  H01L021/302 ,  H01L021/461 ,  H01L021/311

CPC classification number: H05K3/4697 ,  H01L21/3043 ,  H01L21/3046 ,  H01L21/31105 ,  H01L21/4807 ,  H01L23/13 ,  H01L23/642 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15787 ,  H01L2924/19041 ,  H05K1/0306 ,  H05K3/0044 ,  H05K2201/0166 ,  H05K2201/0209 ,  H05K2203/025 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

Abstract: A method for processing substrates, in which a photoresist layer is applied and structured on their surface. By blasting the substrate with particles, recesses are put into the surface of the substrate in those areas not covered by photoresist.

Abstract translation: 一种处理基板的方法，其中在其表面上施加和结构化光致抗蚀剂层。 通过用颗粒喷射基材，在未被光致抗蚀剂覆盖的区域中将凹槽放入基材的表面。

公开(公告)号：US20020058449A1

公开(公告)日：2002-05-16

申请号：US09793911

申请日：2001-02-28

Inventor： Vedagiri Velpari ,  Kami Lammon-Hilinski ,  Ernest L. Lawton ,  Bruce E. Novich ,  William B. Rice ,  Walter J. Robertson ,  Xiang Wu

IPC: B32B005/02 ,  B32B027/04 ,  B32B027/12

CPC classification number: H05K1/0366 ,  B32B27/12 ,  C03C25/47 ,  H05K2201/0166 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/029 ,  H05K2203/127 ,  Y10T442/20 ,  Y10T442/2311 ,  Y10T442/2402 ,  Y10T442/30

Abstract: At least partially clad laminates comprising: (a) a cladding material; (b) a matrix material; and (c) at least one non-degreased fabric comprising at least one strand comprising a plurality of fibers, wherein at least a portion of the at least one non-degreased fabric comprises a coating which is compatible with the matrix material, and wherein at least a portion of the at least partially clad laminate has a roughness factor less than 8 microns using a one ounce clad, measured in either the warp direction or the fill direction of the at least one non-degreased. Electronic supports and electronic circuit boards comprising at least one at least partially clad laminate.

Abstract translation: 至少部分包覆的层压板，包括：（a）包层材料; （b）基质材料; 和（c）至少一种非脱脂织物，其包含至少一条包含多根纤维的链，其中所述至少一种非脱脂织物的至少一部分包含与所述基质材料相容的涂层，并且其中在 所述至少部分覆盖的层压板的至少一部分具有小于8微米的粗糙度因子，使用在至少一种未脱脂的经向或填充方向上测量的一盎司包层。 包括至少一个至少部分覆盖的层压板的电子支架和电子电路板。