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公开(公告)号：US20180042102A1
公开(公告)日：2018-02-08
申请号：US15461618
申请日：2017-03-17
Applicant: JAHWA electronics Co., Ltd.
Inventor： Chun CHOI , Soon Koo SHIM , Young Bin CHONG , Nam Jin CHOI , Won Gook LEE , Min Goo LEE , Kyung Hoon JO
CPC classification number: H05K1/0216 , B06B1/0207 , B06B1/045 , H02K11/02 , H02K33/16 , H02K2211/03 , H05K1/09 , H05K1/112 , H05K1/165 , H05K2201/09263 , H05K2201/09481 , H05K2201/09672
Abstract: A printed circuit board includes a pad to receive an electric signal from a controller, a plurality of signal lines connected to the pad to transmit the electric signal received at the pad, and a signal transmission unit connected to the signal lines to transmit the electric signal to a coil. The plurality of signal lines are configured to face each other in at least a partial region and/or disposed in a zigzag form in at least a partial region. If the printed circuit board and a vibration actuator including the printed circuit board are used, it is possible to change a high frequency interference region according to a pattern by changing a pattern of the printed circuit board, and to improve receiving efficiency of an antenna by reducing high frequency noise.
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公开(公告)号：US20170347445A1
公开(公告)日：2017-11-30
申请号：US15603554
申请日：2017-05-24
Applicant: Hitachi, Ltd.
Inventor： Rohan BAROT , K. Ramachandra SEKHAR
IPC: H05K1/02
CPC classification number: H05K1/0228 , H05K1/0245 , H05K1/162 , H05K1/165 , H05K2201/09218 , H05K2201/09672
Abstract: The present disclosure relates to a PCB and a method in the PCB for reducing common-mode current. The PCB comprises two differential lines and each of the differential lines is on one or more planes of the PCB. The two differential lines carry a differential mode current and the common mode current. The differential mode current and the common mode current may be at least one of a forward current and a backward current. Further, a predefined configuration is formed using each of the two differential lines to generate impedance at the predefined configuration. Here, the predefined configuration is placed close to each other to generate a dielectric capacitance. The flow of the forward current and the backward current in adjacent tracks of each of the two differential lines in the predefined configuration are in opposite direction.
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公开(公告)号：US09704644B2
公开(公告)日：2017-07-11
申请号：US14531079
申请日：2014-11-03
Applicant: James Jen-Ho Wang
Inventor： James Jen-Ho Wang
IPC: H05B37/00 , H05B39/00 , H05B41/00 , H01F41/02 , H05B33/08 , H05K1/16 , H05K3/46 , H05K1/02 , H05K1/18 , H05K3/00 , H05K3/28 , H05K3/42
CPC classification number: H01F41/0206 , H01F17/0013 , H01F41/046 , H01F2017/006 , H01F2017/0066 , H05B33/0803 , H05B33/0821 , H05B33/0845 , H05K1/0209 , H05K1/021 , H05K1/0271 , H05K1/028 , H05K1/0283 , H05K1/165 , H05K1/183 , H05K1/189 , H05K3/0005 , H05K3/0035 , H05K3/0061 , H05K3/0097 , H05K3/281 , H05K3/427 , H05K3/4697 , H05K2201/056 , H05K2201/086 , H05K2201/0919 , H05K2201/09672 , H05K2201/09709 , H05K2201/09845 , H05K2203/0126 , H05K2203/0384 , H05K2203/0571 , H05K2203/063 , H05K2203/1545
Abstract: An embedded device 105 is assembled within a flexible circuit assembly 30 with the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central plane 115 to minimize stress effects on the embedded device. The opening 18, for the embedded device, is enlarged in an intermediate layer 10 to enhance flexibility of the flexible circuit assembly.
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公开(公告)号：US20170196079A1
公开(公告)日：2017-07-06
申请号：US14983829
申请日：2015-12-30
Applicant: TYCO ELECTRONICS CORPORATION , TYCO ELECTRONICS JAPAN G.K.
Inventor： Chad William Morgan , Masayuki Aizawa , Arash Behziz , Brian Patrick Costello , Nathan Lincoln Tracy , Michael David Herring
IPC: H05K1/02
CPC classification number: H05K1/0245 , H05K1/0222 , H05K1/024 , H05K1/0248 , H05K1/115 , H05K2201/044 , H05K2201/09063 , H05K2201/09227 , H05K2201/09672 , H05K2201/10189
Abstract: Printed circuit includes a planar substrate having opposite sides and a thickness extending therebetween. The sides extend parallel to a lateral plane. The printed circuit also includes a plurality of conductive vias extending through the planar substrate in a direction that is perpendicular to the lateral plane. The conductive vias include ground vias and signal vias. The signal vias form a plurality of quad groups in which each quad group includes a two-by-two array of the signal vias. Optionally, the printed circuit also includes signal traces that electrically couple to the signal vias. The signal traces may form a plurality of quad lines in which each quad line includes four of the signal traces. The four signal traces of each quad line may extend parallel to one another and be in a two-by-two formation.
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公开(公告)号：US09699905B2
公开(公告)日：2017-07-04
申请号：US14236038
申请日：2013-07-12
Applicant: NGK SPARK PLUG CO., LTD.
Inventor： Tomohiro Nishida , Makoto Wakazono , Seiji Mori
CPC classification number: H05K1/181 , H01L23/498 , H01L23/49822 , H01L2924/0002 , H05K1/113 , H05K3/28 , H05K3/3436 , H05K3/4007 , H05K3/4602 , H05K2201/09672 , H05K2201/098 , H05K2201/2072 , H05K2203/0597 , H01L2924/00
Abstract: To provide a wiring board ensuring adhesion strength of a connecting terminal to reduce the connecting terminal from being fallen over or peeled off under fabrication process. The wiring board according to the present invention includes a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body and a filling member filled up between the plurality of connecting terminals. The filling member is filled up to a position lower than a height of the plurality of connecting terminals. The connecting terminals has a cross section with a trapezoidal shape where a width of a first principal surface on a side contacting the laminated body is wider than a width of a second principal surface facing the first principal surface.
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Patent Agency Ranking
公开(公告)号：US09615459B2
公开(公告)日：2017-04-04
申请号：US14416671
申请日：2014-12-31
Inventor： Jianyong Fu , Dongsheng Guo
CPC classification number: H05K1/165 , H05K3/46 , H05K2201/09627 , H05K2201/09672
Abstract: An inductor, a circuit board and a method for forming an inductor are provided. The inductor comprises: a first pad arranged on a first metal wiring layer of a circuit board; a second pad arranged on a second metal wiring layer of the circuit board; and a first hole with conducting medium filled therein, one end of the first hole being located in the first pad and the other end thereof being located in the second pad. The inductor can effectively reduce the area of the circuit occupied by the inductor.
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公开(公告)号：US20170085134A1
公开(公告)日：2017-03-23
申请号：US15155585
申请日：2016-05-16
Applicant: QUALCOMM Incorporated
Inventor： Seong Heon Jeong
CPC classification number: H02J50/12 , H01F27/36 , H01F27/362 , H01F27/365 , H01F38/14 , H02J7/025 , H02J50/10 , H02J50/60 , H02J50/70 , H02J50/80 , H04B15/02 , H05K1/0227 , H05K1/0239 , H05K1/165 , H05K9/0081 , H05K2201/09672
Abstract: Methods and apparatus are disclosed for wirelessly transmitting power. In one aspect, an apparatus for wireless transmitting power is provided. The apparatus comprises a first metal sheet having a shape that defines a plurality of slots, the plurality of slots inwardly extending from a periphery of the first metal sheet. The apparatus further comprises a coil configured to generate a magnetic field sufficient to charge or power a load, wherein the first metal sheet extends over a width and a length of the coil, and wherein the plurality of slots are configured to at least partially cancel eddy currents generated in the first metal sheet via the magnetic field.
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公开(公告)号：US20160381794A1
公开(公告)日：2016-12-29
申请号：US15196857
申请日：2016-06-29
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Seok-Hwan AHN , Mi-Sun HWANG , Young-Gwan KO , Jong-Seok BAE , Myung-Sam KANG
CPC classification number: H05K1/0298 , H05K1/0271 , H05K1/09 , H05K1/115 , H05K1/165 , H05K3/007 , H05K3/0076 , H05K3/12 , H05K3/4007 , H05K3/4617 , H05K3/4623 , H05K2201/09136 , H05K2201/09509 , H05K2201/09563 , H05K2201/09672 , H05K2203/043
Abstract: A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.
Abstract translation: 多层基板包括在其厚度方向上层叠的单位基板，并且单位基板包括光敏绝缘层，设置在感光绝缘层中的导电图案，以及突出到光敏绝缘层中的凸块，并提供到 导电图案。
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公开(公告)号：US09516790B2
公开(公告)日：2016-12-06
申请号：US14247870
申请日：2014-04-08
Applicant: Harman Becker Automotive Systems GmbH
Inventor： Valod Noshadi
CPC classification number: H05K7/205 , H01L35/32 , H05K1/0201 , H05K1/0206 , H05K1/0209 , H05K1/16 , H05K2201/09672 , H05K2201/10219
Abstract: A circuit board is provided that includes at least one Peltier heat pump device with at least one pair of semiconductor members arranged thermally in parallel and electrically in series. The at least one pair of semiconductor members is at least partially embedded in the circuit board.
Abstract translation: 提供了一种电路板，其包括至少一个珀尔帖热泵装置，其具有并联热电并串联电连接的至少一对半导体部件。 至少一对半导体构件至少部分地嵌入电路板中。
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公开(公告)号：US09491860B2
公开(公告)日：2016-11-08
申请号：US14299229
申请日：2014-06-09
Applicant: FUJITSU LIMITED
Inventor： Tomoyuki Akahoshi
CPC classification number: H05K1/116 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311 , H01P5/185 , H05K1/0239 , H05K1/162 , H05K1/181 , H05K3/30 , H05K2201/09672 , Y10T29/4913
Abstract: A wiring board includes a first insulating layer; a first wire that is provided at a first surface of the first insulating layer and transmits a first signal; and a second wire that is provided at a second surface of the first insulating layer that is opposite to the first surface, includes a first portion that is parallel to at least a portion of the first wire, and transmits a first component of the first signal that is transmitted through the first wire.
Abstract translation: 布线基板包括第一绝缘层; 第一导线，其设置在所述第一绝缘层的第一表面并且发送第一信号; 以及设置在与第一表面相对的第一绝缘层的第二表面处的第二导线，包括平行于第一线的至少一部分的第一部分，并且将第一信号的第一分量 其通过第一线传输。
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