公开(公告)号：US20240105639A1

公开(公告)日：2024-03-28

申请号：US17951978

申请日：2022-09-23

Applicant: Apple Inc.

Inventor： Helia Rahmani ,  Stephane J. Marcadet ,  Scott J. Campbell ,  Zhiyong C. Xia ,  Stephen V. Jayanathan ,  Vineet Negi ,  Christian Kettenbeil

IPC: H01L23/00 ,  H01L23/053 ,  H05K1/18 ,  H05K5/00

CPC classification number: H01L23/562 ,  H01L23/053 ,  H05K1/181 ,  H05K5/0004 ,  H05K5/0091 ,  H05K2201/10378 ,  H05K2201/10393 ,  H05K2201/10409 ,  H05K2201/10598 ,  H05K2201/10734

Abstract: Structures, methods, and apparatus for protecting interconnections between components and boards in an electronic device from damage resulting from a physical shock. This damage can occur due to differential tensile forces being applied between the component and the board during a drop or other shock event. An example can reduce or prevent damage by providing differential compression forces between the component and board that can cancel differential tensile forces between the component and board during the shock event. Another example can reduce or prevent damage by reducing differential tensile forces between a component and board. Another example can secure a component to the board to directly reduce the differential force in order to prevent damage.

公开(公告)号：US11882659B2

公开(公告)日：2024-01-23

申请号：US17505730

申请日：2021-10-20

Applicant: Raytheon Company

Inventor： Thomas Sprafke ,  Stephen Marinsek

IPC: H05K1/18 ,  H05K3/32 ,  H05K1/03 ,  H05K1/09

CPC classification number: H05K1/18 ,  H05K3/32 ,  H05K1/0306 ,  H05K1/09 ,  H05K2201/09036 ,  H05K2201/10151 ,  H05K2201/10189 ,  H05K2201/10287 ,  H05K2201/10378

Abstract: A chip substrate includes a base substrate having a plurality of base circuit traces mounted thereon for supporting a chip assembly and an intermediate substrate mounted on the base substrate adjacent the plurality of base circuit traces. The intermediate substrate has a plurality of intermediate circuit traces mounted thereon. Each of the plurality of intermediate circuit traces are wirebonded to a respective one of the plurality of base circuit traces and the plurality of intermediate circuit traces are configured to be electrically coupled to an external device. For example, each of the plurality of intermediate circuit traces may be wirebonded to a respective one of a plurality of feedthrough circuit traces mounted on a feedthrough device.

公开(公告)号：US20230413440A1

公开(公告)日：2023-12-21

申请号：US18462212

申请日：2023-09-06

Applicant: Google LLC

Inventor： Jiali Lai ,  Naiyong Chen ,  ChanWei Chiu ,  Joseph L. Allore ,  Michael J. Lombardi

IPC: H05K1/14 ,  H05K1/18

CPC classification number: H05K1/141 ,  H05K1/181 ,  H05K2201/10378 ,  H05K2201/10734

Abstract: Disclosed is a cavity-stacked printed circuit board (PCB) assembly that includes a first PCB formed of glass-reinforced epoxy material and has a first and a second side. The first side includes an open cavity with a cavity floor and at least one side wall that extends between the floor and the first side. The open cavity defines a cavity perimeter, which includes a base defined around the perimeter. The second PCB has a top side opposite a bottom side. The top side has an electrical component around which an interposer region is defined. Solder is disposed between the interposer region of the second PCB and the base of the first PCB to couple the first PCB to the second PCB with the electrical component received in the cavity to form the cavity-stacked PCB assembly.

公开(公告)号：US11825639B2

公开(公告)日：2023-11-21

申请号：US17694529

申请日：2022-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyelim Yun ,  Bongkyu Min ,  Dohoon Kim ,  Taewoo Kim ,  Jinyong Park ,  Jungje Bang ,  Hyeongju Lee

IPC: H05K9/00 ,  H05K1/18 ,  H05K1/11 ,  H05K7/14 ,  H05K1/14

CPC classification number: H05K9/0032 ,  H05K1/115 ,  H05K1/144 ,  H05K1/181 ,  H05K7/1427 ,  H05K2201/10371 ,  H05K2201/10378

Abstract: An example electronic device includes a printed circuit board on which one or more circuit components are disposed, and an interposer surrounding at least some circuit components of the one or more circuit components and including an inner surface adjacent to the at least some circuit components and an outer surface facing away from the inner surface and having a plurality of through holes. The interposer is disposed on the printed circuit board such that one or more through holes of the plurality of through holes are electrically connected with a ground of the printed circuit board. The outer surface of the interposer includes a first conductive region electrically connected with at least one first through hole of the one or more through holes, and a non-conductive region, the inner surface of the interposer includes a second conductive region electrically connected with at least one second through hole of the one or more through holes, and the second conductive region includes a region facing the non-conductive region.

公开(公告)号：US20230354511A1

公开(公告)日：2023-11-02

申请号：US18348622

申请日：2023-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsun LEE ,  Kideok KIM ,  Byeongkeol KIM ,  Jongbum LEE ,  Jongmin JEON ,  Jeongbeom CHO

IPC: H05K1/02 ,  H05K1/14 ,  H05K3/28

CPC classification number: H05K1/0281 ,  H05K1/147 ,  H05K3/28 ,  H05K2201/10378

Abstract: An electronic device is provided. The electronic device includes a housing, a main circuit board arranged inside the housing, and at least one flexible circuit board electrically connected to the main circuit board, wherein the flexible circuit board includes a flexible circuit part, and a joining part arranged on one end of the flexible circuit part and connected to the main circuit board. A first joining part includes a first layer oriented a first direction and having at least one first connection hole, a second layer oriented in a second direction opposite to the first direction and has at least one second connection hole, and a reinforcement member which is arranged between the first and the second layer and is connected to the flexible circuit part while being arranged such that at least a portion thereof overlaps with the one end part of the flexible circuit part.

公开(公告)号：US11792917B2

公开(公告)日：2023-10-17

申请号：US17694070

申请日：2022-03-14

Applicant: CANON KABUSHIKI KAISHA

Inventor： Takuya Kondo ,  Takashi Numagi ,  Nobuaki Yamashita

IPC: H05K1/02 ,  H01L25/16 ,  H05K1/14

CPC classification number: H05K1/0231 ,  H01L25/162 ,  H05K1/0225 ,  H05K1/148 ,  H05K2201/09227 ,  H05K2201/1003 ,  H05K2201/1006 ,  H05K2201/10015 ,  H05K2201/10378 ,  H05K2201/10545

Abstract: An electronic module includes a first semiconductor device disposed on a first main surface of an insulating board of a printed wiring board, a first capacitor disposed on a second main surface of the insulating board at a position that overlaps with the first semiconductor device when viewed in a direction perpendicular to the first main surface, and a second capacitor disposed on the second main surface of the insulating board at a position that overlaps with the first semiconductor device when viewed in the direction perpendicular to the first main surface. A second electrode of the first capacitor is electrically connected to a ground pattern via a first ground via of the printed wiring board. A fourth electrode of the second capacitor is electrically connected to the ground pattern via a second ground via of the printed wiring board.

公开(公告)号：US20230319989A1

公开(公告)日：2023-10-05

申请号：US18124414

申请日：2023-03-21

Applicant: AT & S Austria Technologie & Systemtechnik AG

Inventor： Marco Gavagnin

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/11 ,  H05K1/182 ,  H05K2201/09227 ,  H05K2201/10287 ,  H05K2201/10378

Abstract: Described herein are a component carrier, wherein the component carrier comprises: a stack comprising a plurality of electrically conductive layer structures and at least one electrically insulating layer structure, wherein at least two of said electrically conductive layer structures are connected through a plurality of (electrical) conductive nanowires.

公开(公告)号：US20230317705A1

公开(公告)日：2023-10-05

申请号：US17707366

申请日：2022-03-29

Applicant: Intel Corporation

Inventor： Carlton Hanna ,  Bernd Waidhas ,  Georg Seidemann ,  Stephan Stoeckl ,  Pouya Talebbeydokhti ,  Stefan Reif ,  Eduardo De Mesa ,  Abdallah Bacha ,  Mohan Prashanth Javare Gowda ,  Lizabeth Keser

IPC: H01L25/18 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H05K1/18

CPC classification number: H01L25/18 ,  H01L23/5384 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H05K1/181 ,  H01L2225/06572 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2225/1035 ,  H01L2225/1094 ,  H05K2201/09072 ,  H05K2201/10378 ,  H05K2201/10734

Abstract: An electronic system has a printed circuit board and a substrate. The substrate has two sides, a top and bottom. At least one memory unit is connected to the bottom side of the substrate and at least one processor is connected to the top side of the substrate. The memory is connected to the processor with interconnects that pass through the substrate.

公开(公告)号：US20230309233A1

公开(公告)日：2023-09-28

申请号：US17842709

申请日：2022-06-16

Applicant: Kioxia Corporation

Inventor： Satoru FUKUCHI

IPC: H05K1/18 ,  H01L23/498 ,  H01L25/16 ,  H05K1/11

CPC classification number: H05K1/181 ,  H01L23/49827 ,  H01L25/16 ,  H01L25/162 ,  H01L23/49838 ,  H05K1/113 ,  H05K2201/10378 ,  H05K2201/10174 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/09518 ,  H05K2201/09481 ,  H05K2201/10734

Abstract: An electronic device according to an embodiment includes first and second substrates, first and second conductors, and an electronic component. The first substrate includes a first connector portion, first pad portions, and a first transmission line. The first pad portions include a second pad portion, the first transmission line coupling the second pad portion and the first connector portion. The second substrate includes third pad portions. The third pad portions include a fourth pad portion and a fifth pad portion. The first conductor is coupled to the fourth pad portion and to the second pad portion. The second conductor is coupled to the fifth pad portion. The first electronic component has one end coupled to the first conductor and other end coupled to the second conductor.

公开(公告)号：US20230197622A1

公开(公告)日：2023-06-22

申请号：US17559431

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Karumbu Meyyappan ,  Jeffory L, Smalley ,  Gregorio Murtagian ,  Srikant Nekkanty ,  Pooya Tadayon ,  Eric J.M. Moret ,  Bijoyraj Sahu

IPC: H01L23/538 ,  H01L23/498 ,  H01R12/52 ,  H01L25/00 ,  H01L25/18 ,  H01L25/065 ,  H01R12/58 ,  H05K3/32 ,  H05K1/18

CPC classification number: H01L23/5384 ,  H01L23/49827 ,  H01L23/5385 ,  H01R12/52 ,  H01L25/50 ,  H01L25/18 ,  H01L25/0655 ,  H01R12/58 ,  H05K3/32 ,  H05K1/181 ,  H05K2201/10189 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/1053

Abstract: An electronic system and associated methods are disclosed. In one example, the electronic system includes an interposer including electrically conductive interposer interconnect, a first interposer surface, and a second interposer surface; a processor package including at least one processor integrated circuit (IC), the processor package attached to the first interposer surface and electrically connected to the interposer interconnect; a first liquid metal well array including multiple liquid metal wells attached to a second interposer surface and the interposer interconnect; a second liquid metal well array including a first array surface attached to the first interposer surface and the interposer interconnect; and a packaged companion IC to the processor IC attached to a second array surface of the second liquid metal well array.