公开(公告)号：US08465297B2

公开(公告)日：2013-06-18

申请号：US12890646

申请日：2010-09-25

Applicant: Bin Zou ,  Yan Guo ,  Robert L. Sankman ,  Jiangqi He

Inventor： Bin Zou ,  Yan Guo ,  Robert L. Sankman ,  Jiangqi He

IPC: H01R12/00

CPC classification number: H01R43/16 ,  H01L23/49811 ,  H01L2924/0002 ,  H01R12/57 ,  H01R2103/00 ,  H05K1/0219 ,  H05K1/0231 ,  H05K1/0242 ,  H05K1/0251 ,  H05K1/113 ,  H05K2201/09336 ,  H05K2201/09663 ,  H05K2201/1031 ,  Y02P70/611 ,  Y10T29/49204 ,  H01L2924/00

Abstract: Methods and apparatus relating to self-referencing pins are described. In one embodiment, a pin electrically couples a first agent to a second agent. The pin includes two or more portions that are at least partially separated by an insulator, e.g., to improve crosstalk performance. Other embodiments are also disclosed and claimed.

Abstract translation: 描述与自引用引脚相关的方法和装置。 在一个实施例中，引脚将第一试剂电耦合到第二试剂。 该销包括至少部分地被绝缘体隔开的两个或多个部分，例如，以提高串扰性能。 还公开并要求保护其他实施例。

公开(公告)号：US08456603B2

公开(公告)日：2013-06-04

申请号：US11984255

申请日：2007-11-15

Applicant: Yuuichi Takenaka

Inventor： Yuuichi Takenaka

IPC: G02F1/1345

CPC classification number: H05K1/028 ,  G02F1/13452 ,  H01L2924/0002 ,  H05K3/361 ,  H05K2201/09254 ,  H05K2201/09663 ,  H05K2201/09781 ,  H01L2924/00

Abstract: The present invention prevents, when a COF which is connected with an external circuit is bent in a flat display device, the disconnection of lines on the COF. At a position where a line of the COF is connected to terminal portions of a TFT, and the line having a large width is branched into lines having a small width T1 to T3 or T4 to T6. By displacing line branching positions from each other as indicated by an arrow A and an arrow B, when the COF is bent or deformed, stress applied to the line branching positions can be dispersed thus preventing the disconnection of lines.

Abstract translation: 本发明防止了在平面显示装置中与外部电路连接的COF弯曲时，COF上的线路断开。 在COF的一行连接到TFT的端子部分的位置处，并且具有大宽度的线被分支成具有小宽度T1至T3或T4至T6的线。 通过如箭头A和箭头B所示相互移位线路分支位置，当COF弯曲或变形时，可以分散施加到线路分支位置的应力，从而防止线路断开。

公开(公告)号：US20130128647A1

公开(公告)日：2013-05-23

申请号：US13748167

申请日：2013-01-23

Applicant: Renesas Technology Corporation

Inventor： Takafumi BETSUI ,  Naoto TAOKA ,  Motoo SUWA ,  Shigezumi MATSUI ,  Norihiko SUGITA ,  Yoshiharu FUKUSHIMA

IPC: G11C5/06

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C5/06 ,  G11C5/063 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/49175 ,  H01L2924/1432 ,  H01L2924/14361 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/181 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

公开(公告)号：US20130077275A1

公开(公告)日：2013-03-28

申请号：US13590470

申请日：2012-08-21

Applicant: Shuuichi KARIYAZAKI

Inventor： Shuuichi KARIYAZAKI

IPC: H05K1/16 ,  H05K1/02 ,  B23K31/02 ,  H05K7/06

CPC classification number: H05K1/111 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17104 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/82385 ,  H01L2924/15311 ,  H05K1/0268 ,  H05K2201/09663 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/611 ,  H01L2924/00

Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate.The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.

Abstract translation: 即使在使用焊料电极电连接的电子装置中，电子部件的电极所连接的部分也可以通过除了电子部件的电路或配线基板的改变电路之外的方法进行切换。 电子设备包括：在其一个表面上具有两个或更多个第一电极的布线基板; 以及电子部件，在其一个表面上分别具有对应于两个或更多个第一电极排列的两个或更多个第二电极。 第一电极中的至少一个是分为两个或更多个分割部分的特定电极，并且分割部分分别耦合到不同的布线。 此外，分割部分中的至少一个通过焊料耦合到对应的第二电极。

公开(公告)号：US08386992B2

公开(公告)日：2013-02-26

申请号：US13310217

申请日：2011-12-02

Applicant: Takafumi Betsui ,  Naoto Taoka ,  Motoo Suwa ,  Shigezumi Matsui ,  Norihiko Sugita ,  Yoshiharu Fukushima

Inventor： Takafumi Betsui ,  Naoto Taoka ,  Motoo Suwa ,  Shigezumi Matsui ,  Norihiko Sugita ,  Yoshiharu Fukushima

IPC: G06F17/50

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C5/06 ,  G11C5/063 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/49175 ,  H01L2924/1432 ,  H01L2924/14361 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/181 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

Abstract translation: 设置在矩形半导体板上的微型计算机具有存储器接口电路。 存储器接口电路分别设置在从作为基准位置的一个角部沿着半导体板的两侧的周边延伸的位置。 在这种情况下，与仅在一侧具有存储器接口电路的半导体板相比，可以减小对半导体板的尺寸减小的限制。 每个分离的存储器接口电路上的各个部分电路具有与数据和数据选通信号相关联的相等的数据单元。 因此，微型计算机在主板和模块板上简化了线路设计。

公开(公告)号：US20130003333A1

公开(公告)日：2013-01-03

申请号：US13583884

申请日：2011-02-18

Applicant: Hiroshi Toyao ,  Manabu Kusumoto ,  Naoki Kobayashi ,  Noriaki Ando

Inventor： Hiroshi Toyao ,  Manabu Kusumoto ,  Naoki Kobayashi ,  Noriaki Ando

IPC: H05K7/06

CPC classification number: H05K1/0236 ,  H05K1/0218 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/116 ,  H05K1/162 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09618 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/0979 ,  H05K2201/10371 ,  H05K2201/10674

Abstract: A wiring board includes a metal cap pad that is arranged so as to surround a mounting position of an electronic component and is connected to an end portion of a metal cap, a power source plane that is connected to the electronic component through a connection member and has a gap, a ground plane that is connected to the electronic component through a connection member, and a plurality of conductive body elements that are repeatedly arranged so as to surround the connection members and the gap. The power source plane and the ground plane extend so as to include at least a part of an area that is surrounded by the plurality of conductive body elements and at least a part of an area facing the plurality of conductive body elements.

Abstract translation: 布线基板包括金属盖焊盘，其被设置为围绕电子部件的安装位置并且连接到金属盖的端部，电源平面，其通过连接构件连接到电子部件， 具有间隙，通过连接构件连接到电子部件的接地平面，以及重复地布置成围绕连接构件和间隙的多个导电体元件。 电源平面和接地平面延伸成包括由多个导电体元件围绕的区域的至少一部分和面向多个导电体元件的区域的至少一部分。

公开(公告)号：US20120325537A1

公开(公告)日：2012-12-27

申请号：US13583461

申请日：2011-02-18

Applicant: Hiroshi Toyao ,  Manabu Kusumoto ,  Naoki Kobayashi ,  Noriaki Ando

Inventor： Hiroshi Toyao ,  Manabu Kusumoto ,  Naoki Kobayashi ,  Noriaki Ando

IPC: H05K1/16

CPC classification number: H05K1/0236 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/16152 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/116 ,  H05K1/162 ,  H05K1/165 ,  H05K2201/09618 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/0979 ,  H05K2201/10371 ,  H05K2201/10674

Abstract: A circuit board (100) includes power supply planes (141, 143) arranged with gaps (147) in a D layer (140), connection members (182, 183, 184) electrically connecting at least one of the power supply planes (141, 143) to an electronic device (181), plural conductor elements (121) repeatedly arranged to surround at least some of the gaps (147) and the connection members (182, 183, 184), and ground planes (111, 171) being located in an A layer (110) or a G layer (170) and extending in a second region or a third region including a region opposing the first region and a region opposing the conductor elements (121).

Abstract translation: 电路板（100）包括在D层（140）中布置有间隙（147）的电源平面（141,143），电连接至少一个电源平面（141）的连接构件（182,183,184） ，143）连接到电子设备（181），多个重复布置成围绕所述间隙（147）和所述连接构件（182,183,184）中的至少一些的导体元件（121）和接地平面（111,171） 位于A层（110）或G层（170）中并且在包括与第一区域相对的区域和与导体元件（121）相对的区域的第二区域或第三区域中延伸。

公开(公告)号：US08330050B2

公开(公告)日：2012-12-11

申请号：US12582224

申请日：2009-10-20

Applicant: Hideaki Sakaguchi ,  Kei Murayama

Inventor： Hideaki Sakaguchi ,  Kei Murayama

IPC: H05K1/03 ,  H05K1/16

CPC classification number: H05K1/0201 ,  H01L21/486 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/10329 ,  H01L2924/15311 ,  H05K1/053 ,  H05K2201/062 ,  H05K2201/09663 ,  H05K2201/10522 ,  H05K2201/10674 ,  Y10T156/1056 ,  Y10T156/1064 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A wiring board comprises a first pad which is provided on a first surface side of a substrate and on which a first electronic component is to be mounted, and a second pad which is provided on the first surface side of the substrate and on which a second electronic component having a larger amount of heat generation in an operation than that of the first electronic component is to be mounted, a first through electrode which penetrates the substrate and has one of ends connected electrically to the first pad, a second through electrode which penetrates the substrate and has one of ends connected electrically to the second pad, a through trench penetrating the substrate in a portion positioned between a first mounting region for the first electronic component and a second mounting region for the second electronic component, and a heat intercepting member provided in the through trench.

Abstract translation: 布线板包括：第一垫，其设置在基板的第一表面侧上并且第一电子部件将被安装在该第一焊盘上;第二焊盘，设置在所述基板的第一表面侧上， 要安装比第一电子部件更大量的发热量的电子部件，穿过基板并具有与第一焊盘电连接的一端的第一贯通电极，穿过第一贯通电极的第二贯通电极 所述基板具有电连接到所述第二焊盘的端部之一，穿过所述基板的通孔，位于所述第一电子部件的第一安装区域和所述第二电子部件的第二安装区域之间的部分中， 设置在通沟中。

公开(公告)号：US20120295454A1

公开(公告)日：2012-11-22

申请号：US13564483

申请日：2012-08-01

Applicant: Zhiwei Jiang ,  Xiaochen Chen ,  Zhipeng Guo

Inventor： Zhiwei Jiang ,  Xiaochen Chen ,  Zhipeng Guo

IPC: H01R12/51

CPC classification number: H05K1/111 ,  H05K1/112 ,  H05K1/141 ,  H05K3/225 ,  H05K2201/09072 ,  H05K2201/09381 ,  H05K2201/0939 ,  H05K2201/09663 ,  H05K2203/042 ,  Y02P70/611

Abstract: A printed circuit board assembly (PCBA) chip package component includes: a module board and an interface board. A first soldering pad is set on the bottom of the module board, a second soldering pad is set on top of the interface board, and the second soldering pad is of a castle-type structure. The first soldering pad includes a first soldering area, a second soldering area, and a connection bridge that connects the first soldering area and the second soldering area. The first soldering area corresponds to a top surface of the second soldering pad, and when the first soldering area is soldered to second soldering pad, the second soldering area is located outside the second soldering pad.

Abstract translation: 印刷电路板组件（PCBA）芯片封装组件包括：模块板和接口板。 第一个焊盘设置在模块板的底部，第二个焊盘设置在接口板的顶部，第二个焊盘为城堡式结构。 第一焊盘包括第一焊接区域，第二焊接区域和连接第一焊接区域和第二焊接区域的连接桥。 第一焊接区域对应于第二焊盘的顶表面，并且当第一焊接区域焊接到第二焊盘时，第二焊接区域位于第二焊盘的外部。

公开(公告)号：US20120229993A1

公开(公告)日：2012-09-13

申请号：US13108997

申请日：2011-05-17

Applicant: WEI-CHIEH CHOU ,  YING-TSO LAI ,  YUNG-CHIEH CHEN

Inventor： WEI-CHIEH CHOU ,  YING-TSO LAI ,  YUNG-CHIEH CHEN

IPC: H05K7/14 ,  H05K1/02 ,  H05F3/00

CPC classification number: H05K9/0067 ,  H05K1/0215 ,  H05K1/0259 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/10189

Abstract: An exemplary antistatic circuit board includes a first outer layer, a second outer layer, a first ground layer, and a second ground layer. The first ground layer and the second ground layer are positioned between the first outer layer and the second outer layer. The first ground layer is adjacent to the first outer layer and the second ground layer is adjacent to the second outer layer. The antistatic circuit board defines two position holes each penetrating through the first ground layer and the second ground layer. Two circuit grounds are wired on the first ground layer and the second ground layer, respectively. The second ground layer further includes a chassis ground. Each of the position holes also penetrates through the chassis ground.

Abstract translation: 示例性的抗静电电路板包括第一外层，第二外层，第一接地层和第二接地层。 第一接地层和第二接地层位于第一外层和第二外层之间。 第一接地层与第一外层相邻，第二接地层与第二外层相邻。 抗静电电路板限定了穿过第一接地层和第二接地层的两个位置孔。 两个电路接地分别布置在第一接地层和第二接地层上。 第二接地层还包括底盘接地。 每个位置孔也穿过底盘地面。