公开(公告)号：US07981758B2

公开(公告)日：2011-07-19

申请号：US12908317

申请日：2010-10-20

Applicant: Huankiat Seh ,  Yongki Min ,  Islam A. Salama

Inventor： Huankiat Seh ,  Yongki Min ,  Islam A. Salama

IPC: H01L21/02

CPC classification number: H05K1/185 ,  H01L23/50 ,  H01L23/642 ,  H01L24/97 ,  H01L25/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H05K1/023 ,  H05K1/183 ,  H05K3/0032 ,  H05K3/0052 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49146

Abstract: A method may include depositing a dielectric layer onto a substrate, removing portions of the dielectric layer to create a plurality of separated non-removed portions of the dielectric layer, depositing one or more passive electronic components into each of the plurality of separated non-removed portions, and curing the separated non-removed portions of the dielectric layer.

Abstract translation: 一种方法可以包括将电介质层沉积到衬底上，去除电介质层的部分以产生电介质层的多个分离的未除去部分，将一个或多个无源电子元件沉积到多个分离的未除去的每一个中 部分，并且固化电介质层的分离的未除去部分。

公开(公告)号：US07733626B2

公开(公告)日：2010-06-08

申请号：US11891443

申请日：2007-08-10

Applicant: Cengiz A. Palanduz ,  Yongki Min

Inventor： Cengiz A. Palanduz ,  Yongki Min

IPC: H01G4/008 ,  H01G4/06

CPC classification number: H01G4/12 ,  H01L2224/16225 ,  H05K1/0313 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/017 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2203/1131 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49155

Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.

Abstract translation: 一种包括在第一导电材料的片材上直接形成陶瓷材料的方法; 在所述陶瓷材料上形成第二导电材料; 并烧结陶瓷材料。 一种包括在第一导电材料的片材上直接形成陶瓷材料的方法; 在所述陶瓷材料上形成第二导电材料，使得所述陶瓷材料设置在所述第一导电材料和所述第二导电材料之间; 在足以烧结陶瓷材料并形成第二导电材料的膜的温度下进行热处理; 以及用不同的导电材料涂覆第一导电材料和第二导电材料中的至少一个的暴露表面。 一种包括第一和第二电极的装置; 以及在第一电极和第二电极之间的陶瓷材料，其中陶瓷材料直接烧结在第一和第二电极之一上。

公开(公告)号：US07687366B2

公开(公告)日：2010-03-30

申请号：US11601101

申请日：2006-11-17

Applicant: Yongki Min

Inventor： Yongki Min

IPC: H01L21/20 ,  H01G9/00

CPC classification number: H01L23/49822 ,  H01G4/228 ,  H01G4/33 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12044 ,  H01L2924/15311 ,  H05K1/162 ,  H05K3/048 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2201/09763 ,  Y10T29/417 ,  H01L2924/00

Abstract: An embedded passive structure, its method of formation, and its integration onto a substrate during fabrication are disclosed. In one embodiment, the embedded passive structure is a thin film capacitor (TFC) formed using a thin film laminate that has been mounted onto a substrate. The TFC's capacitor dielectric and/or lower electrode layers are patterned in such a way as to reduce damage and improve cycle time. In one embodiment, the capacitor dielectric has a high dielectric constant and the substrate is an organic packaging substrate.

Abstract translation: 公开了嵌入式被动结构，其形成方法及其在制造过程中与衬底的集成。 在一个实施例中，嵌入式无源结构是使用已经安装在基板上的薄膜层叠体形成的薄膜电容器（TFC）。 TFC的电容器电介质和/或下电极层被图案化以减少损坏并改善循环时间。 在一个实施例中，电容器电介质具有高介电常数，并且衬底是有机封装衬底。

公开(公告)号：US07435675B2

公开(公告)日：2008-10-14

申请号：US11479400

申请日：2006-06-30

Applicant: Huankiat Seh ,  Yongki Min

Inventor： Huankiat Seh ,  Yongki Min

IPC: H01L21/4763

CPC classification number: H05K1/162 ,  H05K1/112 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09763 ,  H05K2203/0113 ,  H05K2203/0353 ,  H05K2203/061

Abstract: A method of forming a pre-patterned high-k dielectric film onto a support layer. The method includes: providing a support layer; providing a template defining template openings therein exhibiting a pattern that is a mirror image of a pattern of the pre-patterned high-k dielectric film; disposing the template onto the support layer; providing a high-k precursor material inside the template openings; curing the high-k precursor material inside the template openings to yield a cured film; and removing the template from the support layer after curing to leave the cured film on the conductive film.

Abstract translation: 将预图案化的高k电介质膜形成在支撑层上的方法。 该方法包括：提供支撑层; 提供其中示出模板开口的模板，其中显示作为预图案化高k电介质膜的图案的镜像的图案; 将模板设置在支撑层上; 在模板开口内提供高k前体材料; 固化模板开口内的高k前体材料以产生固化膜; 并且在固化之后从支撑层去除模板以将固化膜留在导电膜上。

公开(公告)号：US07290315B2

公开(公告)日：2007-11-06

申请号：US10971829

申请日：2004-10-21

Applicant: Cengiz A. Palanduz ,  Yongki Min

Inventor： Cengiz A. Palanduz ,  Yongki Min

IPC: H01G7/00

CPC classification number: H01G4/12 ,  H01L2224/16225 ,  H05K1/0313 ,  H05K1/092 ,  H05K1/162 ,  H05K2201/017 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2203/1131 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49155

Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.

Abstract translation: 一种包括在第一导电材料的片材上直接形成陶瓷材料的方法; 在所述陶瓷材料上形成第二导电材料; 并烧结陶瓷材料。 一种包括在第一导电材料的片材上直接形成陶瓷材料的方法; 在所述陶瓷材料上形成第二导电材料，使得所述陶瓷材料设置在所述第一导电材料和所述第二导电材料之间; 在足以烧结陶瓷材料并形成第二导电材料的膜的温度下进行热处理; 以及用不同的导电材料涂覆第一导电材料和第二导电材料中的至少一个的暴露表面。 一种包括第一和第二电极的装置; 以及在第一电极和第二电极之间的陶瓷材料，其中陶瓷材料直接烧结在第一和第二电极之一上。

公开(公告)号：US20070235500A1

公开(公告)日：2007-10-11

申请号：US11278365

申请日：2006-03-31

Applicant: Daewoong Suh ,  Yongki Min

Inventor： Daewoong Suh ,  Yongki Min

IPC: A47J36/02

CPC classification number: B23K1/0006 ,  B23K20/165

Abstract: Apparatus comprising a multilayered reactive foil preform including alternating layers of first and second materials deposited on foils. The layers also include piezoelectric ceramic particles to provide an electrical stimulus when pressure is applied to activate an exothermic reaction between the first and second materials.

Abstract translation: 包括多层反应箔预制件的装置，其包括沉积在箔上的第一和第二材料的交替层。 这些层还包括压电陶瓷颗粒，以在施加压力以激活第一和第二材料之间的放热反应时提供电刺激。

公开(公告)号：US20070202655A1

公开(公告)日：2007-08-30

申请号：US11297854

申请日：2005-12-08

Applicant: Yongki Min

Inventor： Yongki Min

IPC: H01L21/20

CPC classification number: H01G4/33 ,  H01G4/1227 ,  H01G4/228 ,  H01L21/486 ,  H01L28/55 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/15311

Abstract: An embedded passive structure, its method of formation, and its integration onto a substrate during fabrication are disclosed. A method comprises providing a thin film capacitor laminate that comprises: a high-k ceramic dielectric film; a conductive film disposed on one side of the high-k ceramic dielectric film; and a first electrode layer including first conductive portions disposed on another side of the high-k ceramic dielectric film. The method further comprises providing through via openings in the high-k ceramic dielectric film using powder blasting; and patterning the conductive film to yield a intermediate second electrode layer including intermediate second conductive portions disposed on the one side of the high-k ceramic dielectric film.

Abstract translation: 公开了嵌入式被动结构，其形成方法及其在制造过程中与衬底的集成。 一种方法包括提供薄膜电容器层压体，其包括：高k陶瓷介电膜; 设置在高k陶瓷电介质膜一侧的导电膜; 以及第一电极层，包括设置在高k陶瓷电介质膜另一侧的第一导电部分。 该方法还包括使用粉末喷射提供穿过高k陶瓷介质膜的通孔; 以及图案化导电膜以产生包括设置在高k陶瓷电介质膜的一侧上的中间第二导电部分的中间第二电极层。

公开(公告)号：US20060243958A1

公开(公告)日：2006-11-02

申请号：US11116537

申请日：2005-04-28

Applicant: Daewoong Suh ,  Amram Eitan ,  Yongki Min

Inventor： Daewoong Suh ,  Amram Eitan ,  Yongki Min

IPC: H01L29/06 ,  H01L29/12 ,  H01L21/00

CPC classification number: H01L23/49827 ,  B82Y10/00 ,  C09J7/22 ,  C09J9/02 ,  C09J2201/128 ,  C09J2201/602 ,  C09J2203/326 ,  H01L23/49877 ,  H01L23/5384 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05676 ,  H01L2224/0568 ,  H01L2224/11452 ,  H01L2224/1182 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13193 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13611 ,  H01L2224/13666 ,  H01L2224/16145 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/29 ,  H01L2224/29076 ,  H01L2224/29078 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83203 ,  H01L2225/06527 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H05K3/323 ,  H05K2201/026 ,  Y10S977/848 ,  Y10S977/932 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01015 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect includes a plurality of Carbon Nanotubes (CNTs), which provide a conducting path between the first component and the second component. The interconnect further includes a passivation layer to fill the gaps between adjacent CNTs. A method of producing Anisotropic Conductive Film (ACF) and an ACF is provided. The ACF includes a plurality of CNTs, which provide a conducting path between a first side of the ACF and a second side of the ACF. The sides of the ACF can also include a conductive curable adhesive layer. In an embodiment, the conductive curable adhesive layer can incorporate a B-stage cross-linkable polymer and silver particles.

公开(公告)号：US20060220167A1

公开(公告)日：2006-10-05

申请号：US11095690

申请日：2005-03-31

Applicant: Yongki Min ,  Islam Salama

Inventor： Yongki Min ,  Islam Salama

IPC: B32B37/00 ,  H01L21/00

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H05K1/112 ,  H05K1/162 ,  H05K3/16 ,  H05K3/382 ,  H05K3/4602 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10674 ,  Y10T156/10 ,  H01L2224/0401

Abstract: A method of fabricating an integrated circuit package, comprising prefabricating a film capacitor including forming a first conductive layer, depositing a dielectric layer on the first conductive layer, and depositing a second conductive layer on the dielectric layer; forming a substrate; and laminating the prefabricated film capacitor to the substrate.

Abstract translation: 一种制造集成电路封装的方法，包括预制包括形成第一导电层的薄膜电容器，在所述第一导电层上沉积电介质层，以及在所述电介质层上沉积第二导电层; 形成基板; 并将预制的薄膜电容器层压到基板上。

公开(公告)号：US07727814B2

公开(公告)日：2010-06-01

申请号：US12218161

申请日：2008-07-10

Applicant: Daewoong Suh ,  Amram Eitan ,  Yongki Min

Inventor： Daewoong Suh ,  Amram Eitan ,  Yongki Min

IPC: H01L21/00 ,  H01L21/44

CPC classification number: H01L23/49827 ,  B82Y10/00 ,  C09J7/22 ,  C09J9/02 ,  C09J2201/128 ,  C09J2201/602 ,  C09J2203/326 ,  H01L23/49877 ,  H01L23/5384 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05676 ,  H01L2224/0568 ,  H01L2224/11452 ,  H01L2224/1182 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13193 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13611 ,  H01L2224/13666 ,  H01L2224/16145 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/29 ,  H01L2224/29076 ,  H01L2224/29078 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83203 ,  H01L2225/06527 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H05K3/323 ,  H05K2201/026 ,  Y10S977/848 ,  Y10S977/932 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01015 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect includes a plurality of Carbon Nanotubes (CNTs), which provide a conducting path between the first component and the second component. The interconnect further includes a passivation layer to fill the gaps between adjacent CNTs. A method of producing Anisotropic Conductive Film (ACF) and an ACF is provided. The ACF includes a plurality of CNTs, which provide a conducting path between a first side of the ACF and a second side of the ACF. The sides of the ACF can also include a conductive curable adhesive layer. In an embodiment, the conductive curable adhesive layer can incorporate a B-stage cross-linkable polymer and silver particles.

Abstract translation: 提供互连和互连的方法来连接集成电路的第一部件和第二部件。 互连包括多个碳纳米管（CNT），其在第一部件和第二部件之间提供导电路径。 互连还包括钝化层以填充相邻CNT之间的间隙。 提供制造各向异性导电膜（ACF）和ACF的方法。 ACF包括多个CNT，其在ACF的第一侧和ACF的第二侧之间提供导电路径。 ACF的侧面还可以包括导电的可固化粘合剂层。 在一个实施方案中，导电可固化粘合剂层可以并入B级可交联聚合物和银颗粒。