公开(公告)号：US09060428B2

公开(公告)日：2015-06-16

申请号：US13612459

申请日：2012-09-12

Applicant: Kevin Bills ,  Mahesh Bohra ,  Jinwoo Choi ,  Tae Tong Kim ,  Rohan Mandrekar

Inventor： Kevin Bills ,  Mahesh Bohra ,  Jinwoo Choi ,  Tae Tong Kim ,  Rohan Mandrekar

IPC: H05K1/16 ,  H05K1/02 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/024 ,  H05K1/0251 ,  H05K1/113 ,  H05K1/144 ,  H05K2201/0187 ,  H05K2201/041 ,  H05K2201/09481 ,  H05K2201/09718 ,  H05K2201/10734 ,  Y10T29/49124 ,  Y10T29/49151 ,  H01L2924/00

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract translation: 多层互连衬底具有至少两个间隔开的金属层，每个金属层上具有导电焊盘。 在金属层之间放置两种不同类型的绝缘层。 这种放置使得两种不同类型的绝缘层中的一种被放置在导电焊盘之间，另一种类型的绝缘层被放置在两个间隔开的金属层之间。

公开(公告)号：US08837141B2

公开(公告)日：2014-09-16

申请号：US13573968

申请日：2012-10-17

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K7/20 ,  H05K3/10 ,  G06F1/20

CPC classification number: H05K1/147 ,  G06F1/20 ,  H01R12/62 ,  H01R12/737 ,  H05K1/118 ,  H05K3/366 ,  H05K2201/046 ,  H05K2201/09481 ,  H05K2201/10159 ,  H05K2201/10189 ,  H05K2201/10409 ,  H05K2201/10545 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155

Abstract: An electronic module comprises: a multilayer circuit board having a bifurcated area along one edge and a plurality of electronic components mounted on at least one surface; a plurality of electrode pads functionally connected to the electronic components and positioned on the inner surfaces of the bifurcated area so that when the two legs of the bifurcated area are spread apart by about 180° the electrode pads align with respective contacts on a motherboard, and are connectable thereto, so that a secure connection may be created between the circuit board and the motherboard; and, two metal, heat spreading covers lockably enclosing the circuit board, one on either side, the covers further providing mating surfaces upon which a mechanical clamping device can engage and secure the module to a motherboard.

Abstract translation: 电子模块包括：具有沿着一个边缘的分叉区域和安装在至少一个表面上的多个电子部件的多层电路板; 多个电极焊盘功能地连接到电子部件并且定位在分叉区域的内表面上，使得当分叉区域的两条腿分开约180°时，电极焊盘与主板上的相应触点对准，并且 可连接到其上，从而可以在电路板和母板之间产生安全连接; 以及两个金属的散热盖，其可锁定地围绕电路板，一个在任一侧，所述盖还提供配合表面，机械夹紧装置可以在该配合表面上接合并将模块固定到主板。

公开(公告)号：US08772648B2

公开(公告)日：2014-07-08

申请号：US13442921

申请日：2012-04-10

Applicant: Toshiki Furutani ,  Takeshi Furusawa

Inventor： Toshiki Furutani ,  Takeshi Furusawa

IPC: H05K1/11

CPC classification number: H05K1/113 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/107 ,  H05K3/205 ,  H05K3/421 ,  H05K3/423 ,  H05K3/428 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/0542 ,  H05K2203/166 ,  H05K2203/167 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for manufacturing a printed wiring board, in which filled vias with a reduction in faulty connections are formed, and providing such a printed wiring board. After an electroless plated film is formed on an inner wall of a via opening, electrolytic plating is performed on insulative resin base material; the via opening is filled with plating metal and a filled via is formed. Therefore, during electrolytic plating, a plating metal is deposited from electroless plated film on the side wall of the via opening as well as from the bottom of the via opening. As a result, the via opening may be completely filled through electrolytic plating, forming a filled via with a reduction in faulty connections.

Abstract translation: 一种制造印刷线路板的方法，其中形成了具有减少连接故障的填充过孔，并且提供了这种印刷线路板。 在通孔开口的内壁上形成无电镀膜后，对绝缘性树脂基材进行电解电镀; 通孔开口填充有电镀金属，并形成填充的通孔。 因此，在电解电镀期间，电化学金属由通孔开口的侧壁以及通孔开口的底部的无电镀膜沉积。 结果，通孔开口可以通过电解电镀完全填充，形成填充的通孔，同时减少连接错误。

公开(公告)号：US08704105B2

公开(公告)日：2014-04-22

申请号：US12981196

申请日：2010-12-29

Applicant: Kumaran Manikantan Nair ,  Scott E Gordon ,  Mark Frederick McCombs

Inventor： Kumaran Manikantan Nair ,  Scott E Gordon ,  Mark Frederick McCombs

IPC: H05K1/09 ,  H05K1/11

CPC classification number: H05K3/0094 ,  H01B1/22 ,  H05K1/09 ,  H05K1/092 ,  H05K1/095 ,  H05K1/115 ,  H05K3/4061 ,  H05K2201/032 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/1126

Abstract: A composition for forming transition vias and transition line conductors is disclosed for minimizing interface effects at electrical connections between dissimilar metal compositions. The composition has (a) inorganic components selected from the group consisting of (i) 20-45 wt % gold and 80-55 wt % silver and (ii) 100 wt % silver-gold solid solution alloys, and (b) an organic medium. The composition may also contain (c) 1-5 wt %, based upon the weight of the composition, of oxides or mixed oxides of metals selected from the group consisting of Cu, Co, Mg and Al and/or high viscosity glasses mainly containing refractory oxides. The composition may be used as a multi-layer composition in a via fill. Multi-layer circuits such as LTCC circuits and devices may also be formed using the composition for forming transition vias and transition line conductors.

Abstract translation: 公开了一种用于形成过渡通孔和过渡管线导体的组合物，用于最小化异种金属组合物之间电连接处的界面效应。 该组合物具有（a）选自（i）20-45wt％金和80-55wt％银和（ii）100wt％银 - 金固溶体合金的无机成分，和（b）有机 中。 该组合物还可以含有（c）基于组合物重量的1-5重量％的选自Cu，Co，Mg和Al的金属的氧化物或混合氧化物和/或主要含有 难熔氧化物。 组合物可以用作通孔填充物中的多层组合物。 也可以使用用于形成过渡通孔和过渡管线导体的组合物来形成诸如LTCC电路和器件的多层电路。

公开(公告)号：US08671565B1

公开(公告)日：2014-03-18

申请号：US12800757

申请日：2010-05-21

Applicant: Bob Shih-Wei Kuo

Inventor： Bob Shih-Wei Kuo

IPC: H01R43/00 ,  H05K13/00

CPC classification number: H05K1/116 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/045 ,  H05K3/107 ,  H05K3/4038 ,  H05K3/429 ,  H05K2201/09263 ,  H05K2201/09454 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/2072 ,  Y10T29/49128 ,  Y10T29/49165 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49176 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A capture pad structure includes a lower dielectric layer, a capture pad embedded within the lower dielectric layer, the capture pad comprising a plurality of linear segments. To form the capture pad, a focused laser beam is moved linearly to form linear channels in the dielectric layer. These channels are filled with an electrically conductive material to form the capture pad.

Abstract translation: 捕获垫结构包括下介电层，嵌入在下介电层内的捕获垫，捕获垫包括多个线性段。 为了形成捕获垫，聚焦的激光束线性地移动以在介电层中形成线性通道。 这些通道填充有导电材料以形成捕获垫。

公开(公告)号：US20140054075A1

公开(公告)日：2014-02-27

申请号：US13864232

申请日：2013-04-16

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： WEN-HUNG HU

IPC: H05K3/34 ,  H05K3/40

CPC classification number: H05K3/3452 ,  H05K3/244 ,  H05K3/4007 ,  H05K3/4046 ,  H05K3/428 ,  H05K2201/09481 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/099 ,  H05K2203/0571 ,  H05K2203/0577 ,  H05K2203/1383 ,  Y10T29/49167

Abstract: A printed circuit board includes a base, a circuit pattern, a solder mask, an activated metal layer, a plurality of metal seed layers, and a plurality of metal bumps. The conductive circuit pattern is formed on the base, to include a plurality of conductive pads. The solder mask is formed on a surface of the conductive circuit pattern and portions of the base are exposed from the circuit pattern. The solder mask includes blind vias corresponding to the pads, and laser-activated catalyst. The activated metal layer is obtained by laser irradiation at the wall of the blind via. The activated metal layer is in contact with the solder mask. The metal seed layer is formed on the activated metal layer and the pads. Each metal bump is formed on the metal seed layer, and each metal bump protrudes from the solder mask.

Abstract translation: 印刷电路板包括基底，电路图案，焊接掩模，活化金属层，多个金属种子层和多个金属凸块。 导电电路图案形成在基底上，以包括多个导电焊盘。 焊接掩模形成在导电电路图案的表面上，并且基底的部分从电路图案露出。 焊接掩模包括对应于焊盘的盲孔和激光活化催化剂。 激活的金属层通过激光照射在盲孔的壁处获得。 活化的金属层与焊料掩模接触。 在活化的金属层和焊盘上形成金属种子层。 每个金属凸块形成在金属种子层上，并且每个金属凸块从焊接掩模突出。

公开(公告)号：US08604348B2

公开(公告)日：2013-12-10

申请号：US13155825

申请日：2011-06-08

Applicant: Yoichi Kubota ,  Teck-Gyu Kang ,  Jae M. Park ,  Belgacem Haba

Inventor： Yoichi Kubota ,  Teck-Gyu Kang ,  Jae M. Park ,  Belgacem Haba

IPC: H05K1/00 ,  H05K1/16

CPC classification number: H05K1/0366 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K3/06 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A packaged microelectronic element includes connection component incorporating a dielectric layer (22) carrying traces (58) remote from an outer surface (26), posts (48) extending from the traces and projecting beyond the outer surface of the dielectric, and pads (30) exposed at the outer surface of the dielectric layer, the pads being connected to the posts by the traces. The dielectric element overlies the front surface of a microelectronic element, and contacts (74) exposed on the front surface of the microelectronic element are connected to the pads by elongated leads (76) such as wire bonds. Methods of making the connection component are also disclosed.

Abstract translation: 封装的微电子元件包括连接部件，其包括承载远离外表面（26）的迹线（58）的介电层（22），从该迹线延伸并突出超过电介质外表面的柱（48） ）暴露在介电层的外表面处，焊盘通过迹线连接到柱。 电介质元件覆盖在微电子元件的前表面上，暴露在微电子元件的前表面上的触点（74）通过诸如引线键的细长引线（76）连接到焊盘。 还公开了制造连接部件的方法。

公开(公告)号：US20130313004A1

公开(公告)日：2013-11-28

申请号：US13954442

申请日：2013-07-30

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jin-Yong AN ,  Chang-Sup Ryu ,  Jong-Kuk Hong

IPC: H05K1/02

CPC classification number: H05K1/02 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/0097 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/0726 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T428/24851 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A package substrate includes a solder resist layer having a level surface, a circuit pattern buried in the solder resist layer, and a bump protruding from the solder resist layer.

Abstract translation: 封装衬底包括具有水平表面的阻焊层，埋在阻焊层中的电路图案和从阻焊层突出的凸块。

公开(公告)号：US08592690B2

公开(公告)日：2013-11-26

申请号：US13241300

申请日：2011-09-23

Applicant: John Chow ,  Yueh-Shan Shih ,  Yong-Chun Xu ,  Jian-She Hu

Inventor： John Chow ,  Yueh-Shan Shih ,  Yong-Chun Xu ,  Jian-She Hu

IPC: H05K1/11

CPC classification number: H05K1/0218 ,  H05K3/4614 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09481 ,  H05K2201/09981

Abstract: A circuit board (100) includes a first shielding layer (20) extending horizontally, an accessorial shielding layer, a signal circuit layer (3) positioned between the first shielding layer and the accessorial shielding layer, and a circumferential shielding layer (6) surrounding the circuit board and electrically connecting with the first shielding layer and the accessorial shielding layer to improve shielding effect.

Abstract translation: 电路板（100）包括水平延伸的第一屏蔽层（20），辅助屏蔽层，位于第一屏蔽层和辅助屏蔽层之间的信号电路层（3）和周围屏蔽层（6） 电路板并与第一屏蔽层和辅助屏蔽层电连接以改善屏蔽效果。

公开(公告)号：US20130235543A1

公开(公告)日：2013-09-12

申请号：US13873504

申请日：2013-04-30

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Junichi Nakamura ,  Yuji Kobayashi

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/116 ,  H05K3/205 ,  H05K3/28 ,  H05K3/3473 ,  H05K3/4007 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4644 ,  H05K2201/0376 ,  H05K2201/09481 ,  H05K2201/0949 ,  H05K2201/09509 ,  H05K2203/0338 ,  H05K2203/0361 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of fabricating a wiring board includes forming a resist layer, such as a solder or plating resist layer, defining an opening portion on a support board such that a portion of the support board is exposed. An electrode is formed directly on the support board within the opening portion, and the plating resist layer, when used, is removed. An insulating layer is formed on the electrode, as well as the support board or solder resist layer, and a wiring portion connected to the electrode at the insulating layer is also formed. A solder resist layer having an opening portion is then formed on the wiring portion, and the support board is removed to expose a surface of the electrode or a surface of the electrode and insulating layer. Another solder resist layer having an opening portion may then be formed on the exposed surface of the insulating layer.

Abstract translation: 制造布线板的方法包括在支撑板上形成限定开口部分的焊料或电镀抗蚀剂层的抗蚀剂层，使得支撑板的一部分露出。 电极直接形成在开口部内的支撑板上，当使用时，电镀抗蚀剂层被去除。 在电极以及支撑板或阻焊层上形成绝缘层，并且还形成连接到绝缘层处的电极的布线部分。 然后在布线部分上形成具有开口部分的阻焊层，并且去除支撑板以暴露电极的表面或电极和绝缘层的表面。 然后可以在绝缘层的暴露表面上形成具有开口部分的另一阻焊层。