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公开(公告)号:US10039199B2
公开(公告)日:2018-07-31
申请号:US15296813
申请日:2016-10-18
Applicant: Amphenol Corporation
Inventor: Donald A. Girard, Jr. , Robert Auger , Mark W. Gailus
CPC classification number: H05K5/0247 , H01R13/6466 , H01R13/6473 , H01R13/6625 , H05K1/0231 , H05K1/181 , H05K3/301 , H05K5/0021 , H05K5/0217 , H05K5/065 , H05K13/00 , H05K2201/10015 , H05K2201/10515
Abstract: An adapter has two conductors each with a U-shaped bend forming upper longer legs and lower shorter legs. The conductors face each other with the longer legs linearly aligned with each other and the shorter legs aligned with each other, thereby forming a first gap between the longer legs and a second gap between the shorter legs. The first gap is substantially smaller than the second gap, so that an electrical package can be placed across the first gap to contact the two upper longer legs, while the two shorter legs are spaced further apart to span a larger gap between conductors of a connector. Thus, the adapter enables the electrical package to be connected to conductors having a gap that is larger than the electrical package.
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公开(公告)号:US10008474B2
公开(公告)日:2018-06-26
申请号:US15206729
申请日:2016-07-11
Applicant: International Business Machines Corporation
Inventor: Thomas J. Brunschwiler , Andreas Christian Doering , Ronald Peter Luijten , Stefano Sergio Oggioni , Patricia Maria Sagmeister , Martin Leo Schmatz
IPC: H01L29/40 , H01L25/065 , H01L23/498 , H01L23/31 , H01L23/00 , H01L23/367
CPC classification number: H01L25/0655 , H01L23/13 , H01L23/3114 , H01L23/36 , H01L23/367 , H01L23/49805 , H01L23/49838 , H01L24/48 , H01L25/105 , H01L2224/48091 , H01L2224/48225 , H01L2924/00014 , H01L2924/153 , H05K1/145 , H05K3/3442 , H05K3/366 , H05K3/403 , H05K2201/10515 , H05K2201/1053 , H05K2201/10727 , H05K2201/10984 , H05K2203/0228 , H05K2203/143 , H01L2224/45099
Abstract: Embodiments of the invention are directed to an integrated circuit (IC) package assembly, including: one or more printed circuit boards (PCBs); and a set of chip packages, each including: an overmold; and an IC chip, overmolded in the overmold, and wherein: the chip packages are stacked transversely to an average plane of each of the chip packages, thereby forming a stack wherein a main surface of one of the chip packages faces a main surface of another one of the chip packages; and each of the chip packages is laterally soldered to one or more of said one or more PCBs and arranged transversally to each of said one or more PCBs, whereby an average plane of each of said one or more PCBs extends transversely to the average plane of each of the chip packages of the stack. Further embodiments are directed to related devices and fabrication methods.
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公开(公告)号:US20180168038A1
公开(公告)日:2018-06-14
申请号:US15892740
申请日:2018-02-09
Applicant: International Business Machines Corporation
Inventor: Ai Kiar Ang , Michael Lauri
IPC: H05K1/11 , H05K3/34 , H05K1/18 , H01L23/495 , H05K1/03 , H01L25/00 , H01L25/10 , H05K3/32 , H05K1/14 , H01L21/48
CPC classification number: H05K1/11 , H01L21/4839 , H01L23/49537 , H01L23/49555 , H01L23/49565 , H01L23/49575 , H01L25/105 , H01L25/50 , H01L2225/1029 , H01L2924/181 , H05K1/0313 , H05K1/144 , H05K1/18 , H05K1/181 , H05K3/328 , H05K3/341 , H05K3/3421 , H05K3/3426 , H05K2201/10015 , H05K2201/10227 , H05K2201/10515 , H05K2201/1053 , H05K2201/10962 , Y02P70/613 , H01L2924/00012
Abstract: A method includes forming a multi-stacked electronic device having two or more electronic components, each of the electronic components includes a leadframe, the leadframes of each electronic component are physically joined together using a non-solder metal joining process to form a joint, and the joint is located outside a solder connection region.
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公开(公告)号:US20180153035A1
公开(公告)日:2018-05-31
申请号:US15880155
申请日:2018-01-25
Applicant: International Business Machines Corporation
Inventor: Ai Kiar Ang , Michael Lauri
IPC: H05K1/11 , H05K3/32 , H05K1/18 , H01L25/10 , H05K3/34 , H01L23/495 , H05K1/03 , H01L21/48 , H01L25/00 , H05K1/14
CPC classification number: H05K1/11 , H01L21/4839 , H01L23/49537 , H01L23/49555 , H01L23/49565 , H01L23/49575 , H01L25/105 , H01L25/50 , H01L2225/1029 , H01L2924/181 , H05K1/0313 , H05K1/144 , H05K1/18 , H05K1/181 , H05K3/328 , H05K3/341 , H05K3/3421 , H05K3/3426 , H05K2201/10015 , H05K2201/10227 , H05K2201/10515 , H05K2201/1053 , H05K2201/10962 , Y02P70/613 , H01L2924/00012
Abstract: A method includes forming a multi-stacked electronic device having two or more electronic components, each of the electronic components includes a leadframe, the leadframes of each electronic component are physically joined together using a non-solder metal joining process to form a joint, and the joint is located outside a solder connection region.
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公开(公告)号:US20180116056A1
公开(公告)日:2018-04-26
申请号:US15849624
申请日:2017-12-20
Applicant: Unimicron Technology Corp.
Inventor: Yin-Ju CHEN , Ming-Hao WU , Cheng-Po YU
IPC: H05K3/46 , H05K1/18 , H01L23/12 , H01L23/498 , H01L35/30 , H05K1/02 , H05K3/36 , G06F1/20 , H05K1/14 , H05K1/11
CPC classification number: H05K3/4647 , G06F1/206 , H01L23/12 , H01L23/13 , H01L23/4275 , H01L23/49827 , H01L35/30 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2924/15153 , H01L2924/15313 , H05K1/0203 , H05K1/0206 , H05K1/113 , H05K1/14 , H05K1/181 , H05K1/185 , H05K1/187 , H05K3/36 , H05K3/4697 , H05K2201/048 , H05K2201/10219 , H05K2201/10378 , H05K2201/10515 , H05K2201/10734
Abstract: A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.
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公开(公告)号:US20180092212A1
公开(公告)日:2018-03-29
申请号:US15702046
申请日:2017-09-12
Applicant: Apple Inc.
Inventor: Paul A. Martinez , Curtis C. Mead , Scott D. Morrison , Giancarlo F. De La Cruz , Lin Chen , Albert Wang , Brad W. Simeral
CPC classification number: H05K1/181 , H01F27/29 , H01G2/06 , H01G4/12 , H01G4/228 , H01G4/30 , H01G4/40 , H03H1/00 , H03H7/0115 , H03H7/38 , H03H2001/0085 , H05K3/3436 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/1006 , H05K2201/10515 , H05K2201/10636 , Y02P70/611 , Y02P70/613
Abstract: Methods and systems for producing circuitry using stackable passive components are discussed. More specifically, the present disclosure provides designs and fabrication methods for production of stackable devices that may be used as components in circuitry such as filters and impedance matching adaptors. Such components may be used to save space in printed circuit boards. Moreover, stackable passive components may be dual components, which may be improve the electrical performance in certain types of circuits such as matched component filters.
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公开(公告)号:US20180049311A1
公开(公告)日:2018-02-15
申请号:US15713705
申请日:2017-09-25
Applicant: Apple Inc.
Inventor: Lan H. Hoang , Takayoshi Katahira
CPC classification number: H05K1/0218 , H01L21/481 , H01L21/4817 , H01L21/4867 , H01L23/295 , H01L23/49811 , H01L23/5386 , H01L23/552 , H01L24/13 , H01L24/16 , H01L24/32 , H01L25/0652 , H01L25/105 , H01L25/112 , H01L25/16 , H01L25/162 , H01L25/165 , H01L2224/131 , H01L2224/16105 , H01L2224/16106 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/8184 , H01L2225/1023 , H01L2225/1047 , H01L2225/1058 , H01L2924/15151 , H01L2924/15311 , H01L2924/15322 , H01L2924/16251 , H01L2924/1815 , H01L2924/18161 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19106 , H05K1/0203 , H05K1/0216 , H05K1/111 , H05K1/144 , H05K1/181 , H05K3/284 , H05K3/341 , H05K3/368 , H05K3/4038 , H05K9/0024 , H05K2201/041 , H05K2201/042 , H05K2201/10015 , H05K2201/10022 , H05K2201/10287 , H05K2201/10371 , H05K2201/10515 , H05K2201/10522 , H05K2201/10545 , H05K2203/1316 , H05K2203/1327 , Y02P70/611 , H01L2924/014 , H01L2924/00014
Abstract: Vertical shielding and interconnect structures for system-in-a-package modules, where the vertical shielding and interconnect structures are readily manufactured and are space efficient.
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公开(公告)号:US09875995B2
公开(公告)日:2018-01-23
申请号:US15174465
申请日:2016-06-06
Applicant: SK hynix Inc.
Inventor: Jin Ho Baek , Il Park , Ho Kyoon Lee , Young Pyo Joo
IPC: H01L25/00 , H01L25/065
CPC classification number: H01L25/0657 , H01L25/50 , H01L2225/06517 , H01L2225/06527 , H01L2225/06562 , H05K1/181 , H05K2201/09027 , H05K2201/10515
Abstract: A stack chip package may include a plurality of stacked semiconductor chips. Each of the semiconductor chips may have a first node, a second node, a third node and a fourth node corresponding to corners of the semiconductor chip. The plurality of semiconductor chips may be sequentially stacked such that, when a semiconductor chip is disposed directly on another semiconductor chip, the first node of the semiconductor chip is positioned over a side between the first node and the second node of the another semiconductor chip.
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公开(公告)号:US09854682B2
公开(公告)日:2017-12-26
申请号:US15372440
申请日:2016-12-08
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kuniaki Yosui
CPC classification number: H05K1/188 , H05K1/0243 , H05K1/0313 , H05K1/09 , H05K1/115 , H05K1/186 , H05K1/189 , H05K3/246 , H05K3/4038 , H05K3/4069 , H05K3/4632 , H05K3/4691 , H05K2201/0129 , H05K2201/0141 , H05K2201/10515 , H05K2203/065
Abstract: A laminated body of a component incorporating substrate includes insulating base members. First and second mounting terminals of a first electronic component abut on a conductor-less surface of a first insulating base member. A first interlayer connection conductor in the first insulating base member connects the first mounting terminal to a conductor pattern. Third and fourth mounting terminals of a second electronic component abut on a conductor-less surface of a second insulating base member. A second interlayer connection conductor in the second insulating base member connects the third mounting terminal to a conductor pattern that abuts a conductor pattern of the first insulating base member which faces toward the second insulating base member, and the conductor pattern of the second insulating base member faces toward the first insulating base member in a lamination direction.
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30.
公开(公告)号:US20170311447A1
公开(公告)日:2017-10-26
申请号:US15495405
申请日:2017-04-24
Applicant: LINEAR TECHNOLOGY CORPORATION
Inventor: John David BRAZZLE , Frederick E. BEVILLE , David A. PRUITT
CPC classification number: H05K1/181 , H01L23/49811 , H01L23/50 , H05K1/0203 , H05K3/284 , H05K3/3426 , H05K2201/1003 , H05K2201/10515 , H05K2201/10522 , H05K2201/10553 , H05K2201/10757 , H05K2203/1316
Abstract: A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module.A method of making a component-on-package circuit may include attaching a component for an electrical circuit to a circuit module. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component after the attachment both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides a spring-like cushioning of force applied to the component in the direction of the circuit module. The circuit module may be encapsulated in molding material after the circuit module has been attached to the component, without encapsulation the component at the same time.
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