公开(公告)号：US09826132B2

公开(公告)日：2017-11-21

申请号：US15473607

申请日：2017-03-30

Applicant: NINGBO SUNNY OPOTECH CO., LTD.

Inventor： Mingzhu Wang ,  Bojie Zhao ,  Takehiko Tanaka ,  Nan Guo ,  Zhenyu Chen ,  Heng Jiang ,  Zhongyu Luan ,  Fengsheng Xi ,  Feifan Chen ,  Liang Ding

IPC: H04N5/225 ,  G02B7/02 ,  H05K1/02 ,  H04M1/02 ,  G02B3/00 ,  G02B7/00 ,  G02B5/20 ,  H01L27/146

CPC classification number: H04N5/2257 ,  G02B3/0075 ,  G02B5/201 ,  G02B7/006 ,  G02B7/021 ,  H01L27/14625 ,  H04M1/0264 ,  H04N5/2252 ,  H04N5/2253 ,  H04N5/2254 ,  H04N5/2258 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/183 ,  H05K1/185 ,  H05K1/189 ,  H05K2201/0141 ,  H05K2201/0158 ,  H05K2201/0175 ,  H05K2201/09036 ,  H05K2201/10121

Abstract: An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

公开(公告)号：US20170251554A1

公开(公告)日：2017-08-31

申请号：US15355559

申请日：2016-11-18

Applicant: FUJITSU LIMITED

Inventor： Mitsuaki HAYASHI ,  Osamu SAITO ,  Akira Okada ,  Junichi HAYAMA

IPC: H05K1/18 ,  H05K3/00 ,  H05K3/34

CPC classification number: H05K1/183 ,  H05K1/184 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/34 ,  H05K3/3447 ,  H05K2201/09036 ,  H05K2201/09827

Abstract: A printed board includes: a depression formed in at least one surface of a board; an open hole formed in the board so as to penetrate the board from a bottom portion of the depression; and a conductor formed over an edge of an opening portion of the open hole and an inner surface of the open hole.

公开(公告)号：US09743523B2

公开(公告)日：2017-08-22

申请号：US14512514

申请日：2014-10-13

Applicant: TRIPOD TECHNOLOGY CORPORATION

Inventor： Bo-Shiung Huang ,  Wei-Hsiung Yang ,  Han-Ching Shih ,  Cheng-Feng Lin

IPC: H05K1/03 ,  H05K1/18 ,  H01F27/28 ,  H01F41/04 ,  H05K3/46 ,  H05K1/11 ,  H05K3/42 ,  H01F17/00 ,  H01F17/06 ,  H05K1/16 ,  H05K3/00 ,  H05K1/02

CPC classification number: H05K1/181 ,  H01F17/0006 ,  H01F17/06 ,  H01F27/2804 ,  H01F41/046 ,  H05K1/0272 ,  H05K1/0366 ,  H05K1/115 ,  H05K1/165 ,  H05K3/0044 ,  H05K3/0052 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4655 ,  H05K3/4697 ,  H05K2201/0187 ,  H05K2201/0275 ,  H05K2201/086 ,  H05K2201/09036 ,  H05K2201/1003 ,  H05K2203/1178 ,  Y10T29/302 ,  Y10T29/49165

Abstract: A printed circuit board package structure includes a substrate, plural ring-shaped magnetic elements, a support layer, and first conductive layers. The substrate has two opposite first and second surfaces, first ring-shaped recesses, and first grooves. Each of the first ring-shaped recesses is communicated with another first ring-shaped recess through at least one of the first grooves, and at least two of the first ring-shaped recesses are communicated with a side surface of the substrate through the first grooves to form at least two openings. The ring-shaped magnetic elements are respectively located in the first ring-shaped recesses. The support layer is located on the first surface, and covers the first ring-shaped recesses and the first grooves. The support layer and the substrate have through holes. The first conductive layers are respectively located on surfaces of support layer and substrate facing the through holes.

公开(公告)号：US20170236797A1

公开(公告)日：2017-08-17

申请号：US15584498

申请日：2017-05-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Jie Chen

IPC: H01L23/00 ,  H05K3/34 ,  H05K1/11 ,  H01L23/544 ,  H01L23/13

CPC classification number: H01L24/17 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2224/0345 ,  H01L2224/04 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05551 ,  H01L2224/05559 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16238 ,  H01L2224/1705 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2924/014 ,  H01L2224/05552

Abstract: A package includes a first package component, a second package component over the first package component, and a solder region bonding the first package component to the second package component. At least one ball-height control stud separates the first package component and the second package component from each other, and defines a standoff distance between the first package component and the second package component.

公开(公告)号：US09736930B2

公开(公告)日：2017-08-15

申请号：US14250004

申请日：2014-04-10

Applicant: Industrial Technology Research Institute

Inventor： Ming-Huan Yang ,  Wei-Ting Chen ,  Chih-Chia Chang

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/028 ,  H05K1/181 ,  H05K2201/09036

Abstract: A flexible electronic module is provided, including a flexible substrate having a supporting portion, a body portion, and a connection portion, wherein the supporting portion is connected with the body portion via the connection portion; a first trench formed between the supporting portion and the body portion; an electronic component disposed over a portion of the supporting portion; and a conductive line disposed over the supporting portion, the connection portion, and the body portion for connecting the electronic component.

公开(公告)号：US09713261B2

公开(公告)日：2017-07-18

申请号：US14356209

申请日：2012-08-31

Applicant: Jianyuan Song ,  Weihong Peng ,  Pingping Xie ,  Dong Liu

Inventor： Jianyuan Song ,  Weihong Peng ,  Pingping Xie ,  Dong Liu

IPC: H05K3/00 ,  H05K3/12 ,  H05K3/18 ,  H05K3/42 ,  H05K3/34 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K3/00 ,  H05K1/0269 ,  H05K3/0017 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/0073 ,  H05K3/12 ,  H05K3/188 ,  H05K3/3452 ,  H05K3/42 ,  H05K3/425 ,  H05K3/428 ,  H05K3/4623 ,  H05K3/4629 ,  H05K2201/09036 ,  H05K2201/09845 ,  H05K2203/0315 ,  H05K2203/162 ,  Y10T29/49004 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49179

Abstract: A fabrication process of a stepped circuit board comprises A) cutting a circuit board substrate, printing patterns on an inner layer of the circuit board substrate, stepped groove milling of the inner layer, washer milling a washer between the inner layer and an outer layer, brownification and lamination processing on the inner layer, and then drilling holes on an outer layer of the circuit board substrate; B) electroplating the entire circuit board substrate by depositing copper on the outer layer of the circuit board substrate with drilled holes; C) performing pattern transfer by means of through-hole plating of the drilled holes on the circuit board substrate processed by the copper depositing and the electroplating; D) after pattern transferring, grinding a shape of a connecting piece (SET) on the circuit board substrate after the electroplating; E) plugging the drilled holes to form plug holes and printing a solder mask and texts in a silk-screen manner after forming the plug holes; F) depositing nickel immersion gold on the entire circuit board substrate, then printing characters in a silk-screen manner, thereby forming the stepped circuit board; and G) testing and inspecting an electric performance and appearance of the stepped circuit board to fabricate a finished product of the stepped circuit board.

公开(公告)号：US20170171975A1

公开(公告)日：2017-06-15

申请号：US15426062

申请日：2017-02-07

Applicant: Unimicron Technology Corp.

Inventor： Shu-Sheng Chiang ,  Ming-Hao Wu ,  Wei-Ming Cheng

IPC: H05K1/11 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K1/111 ,  H05K1/0266 ,  H05K1/0296 ,  H05K1/0298 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/0073 ,  H05K3/4038 ,  H05K3/4092 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/0376 ,  H05K2203/163

Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening connecting the cavity and exposing a portion of the first patterned circuit layer. A hole diameter of the opening is smaller than a hole diameter of cavity. A height difference is between an inner surface of the inner dielectric layer exposed by the cavity and a top surface of the first patterned circuit layer exposed by the opening.

公开(公告)号：US20170171973A1

公开(公告)日：2017-06-15

申请号：US15287718

申请日：2016-10-06

Applicant: Unimicron Technology Corp.

Inventor： Ming-Hao Wu ,  Shu-Sheng Chiang ,  Wei-Ming Cheng

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/09 ,  H05K3/46

CPC classification number: H05K1/111 ,  H05K1/0266 ,  H05K1/0296 ,  H05K1/0298 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/0073 ,  H05K3/4038 ,  H05K3/4092 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/09036 ,  H05K2201/094 ,  H05K2201/09563 ,  H05K2201/09781 ,  H05K2203/0376 ,  H05K2203/163

Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.

公开(公告)号：US20170164472A1

公开(公告)日：2017-06-08

申请号：US15360573

申请日：2016-11-23

Applicant: ROHM CO., LTD.

Inventor： Katsuya MATSUURA ,  Hiroshi TAMAGAWA

IPC: H05K1/11 ,  H05K3/28 ,  H05K3/00 ,  H05K1/18

CPC classification number: H05K1/111 ,  H05K1/181 ,  H05K3/0023 ,  H05K3/28 ,  H05K3/287 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/09036 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: A mounting substrate includes a substrate, a connection electrode, which is formed on a front surface of the substrate and on which an electronic component is mounted via a conductive bonding material, a resist film, formed on the front surface of the substrate so as to cover a peripheral edge portion of the connection electrode, and a receiving portion, formed in the resist film so as to expose a portion of the peripheral edge portion of the connection electrode and arranged to receive an excess portion of the conductive bonding material.

公开(公告)号：US20170164460A1

公开(公告)日：2017-06-08

申请号：US15224903

申请日：2016-08-01

Applicant: Samsung Display Co., Ltd.

Inventor： Siyoung CHOI ,  Moonshik KANG ,  Jeonghun GO ,  Yongsoon LEE

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/0203 ,  H05K1/0201 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/0373 ,  H05K1/18 ,  H05K3/46 ,  H05K2201/0116 ,  H05K2201/0187 ,  H05K2201/062 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/10128

Abstract: A circuit board includes a base layer, a circuit layer disposed on the base layer, where an air gap is defined in the circuit layer, a heat blocking part disposed in the air gap, and an electronic element disposed on the circuit layer. The heat blocking part has a thermal conductivity lower than a thermal conductivity of the circuit layer.