公开(公告)号：US08207019B2

公开(公告)日：2012-06-26

申请号：US13031222

申请日：2011-02-20

Applicant: Charles W. C. Lin ,  Chia-Chung Wang

Inventor： Charles W. C. Lin ,  Chia-Chung Wang

IPC: H01L21/00 ,  H01L23/12

CPC classification number: H01L21/486 ,  H01L23/3677 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L33/486 ,  H01L33/62 ,  H01L33/642 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32013 ,  H01L2224/32188 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85207 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12041 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/20105 ,  H01L2933/0033 ,  H01L2933/0075 ,  H05K1/0204 ,  H05K1/056 ,  H05K3/0061 ,  H05K3/445 ,  H05K2201/09054 ,  H05K2201/09181 ,  H05K2201/10106 ,  H05K2203/0369 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive and is located within a periphery of the second post, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing and solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract translation: 制造半导体芯片组件的方法包括提供第一和第二柱，第一和第二粘合剂和基底，其中第一柱从第一垂直方向上的基部延伸到第一粘合剂中的第一开口中并且位于周边 第二柱从第二垂直方向的基部延伸到第二粘合剂中的第二开口，并且基部夹在柱之间并从支柱横向延伸，然后使粘合剂流动并固化，然后提供导电迹线 其包括垫和端子，其中所述垫在所述第一垂直方向上延伸超过所述基部，并且所述端子在所述第二垂直方向上延伸超过所述基部，从而提供包括所述柱和所述基部的散热器，然后安装半导体器件 在第一柱上，将半导体器件电连接到导电迹线上并将半导体器件热连接到该导体 散热器

公开(公告)号：US08192207B2

公开(公告)日：2012-06-05

申请号：US13034066

申请日：2011-02-24

Applicant: Mituru Iida

Inventor： Mituru Iida

IPC: H01R12/00

CPC classification number: H01R12/62 ,  H01R12/52 ,  H01R12/55 ,  H05K1/141 ,  H05K3/3442 ,  H05K3/365 ,  H05K2201/0367 ,  H05K2201/0397 ,  H05K2201/09063 ,  H05K2201/091 ,  H05K2201/09181 ,  H05K2201/1059 ,  H05K2201/2009

Abstract: A female circuit board for use with a male circuit board has electrically conductive projections. The female circuit board includes a flexible insulating film. The flexible insulating film includes insertion portions into which the conductive projections of the male circuit board are allowed to be inserted. Each of the insertion portions includes a plurality of slits communicating with each other at the center of each of the insertion portions. The flexible insulating film further includes electrically conduction portions for making contact with the conductive projections to come into conduction with the male circuit board. The conduction portions are disposed around the insertion portions on the surface of the female circuit board facing the male circuit board when the female circuit board is in contact with the male circuit board. The conduction portions conform in shape to the insertion portions.

Abstract translation: 与阳电路板一起使用的母电路板具有导电突起。 阴电路板包括柔性绝缘膜。 柔性绝缘膜包括允许插入阳电路板的导电突起的插入部分。 每个插入部分包括在每个插入部分的中心处彼此连通的多个狭缝。 柔性绝缘膜还包括用于与导电突起接触以与阳电路板导通的导电部分。 当阴电路板与阳电路板接触时，导电部分设置在阴电路板的面对阳电路板的表面上的插入部分周围。 导电部分的形状与插入部分一致。

公开(公告)号：US20120111628A1

公开(公告)日：2012-05-10

申请号：US13382698

申请日：2010-06-22

Applicant: Michael Zitzlsperger ,  Stefan Groetsch

Inventor： Michael Zitzlsperger ,  Stefan Groetsch

IPC: H05K7/04

CPC classification number: H05K1/181 ,  H01L31/0203 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/16057 ,  H01L2224/16105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K3/3442 ,  H05K2201/09181 ,  H05K2201/10106 ,  H05K2201/1084 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: An electronic device includes a base body, which has a top side and also an underside lying opposite the top side. The base body has connection locations at its underside. An electronic component is arranged at the base body at the top side of the base body. The base body has at least one side area having at least one point of inspection having a first region and second region. The second region is embodied as an indentation in the first region. The first and the second region contain different materials.

Abstract translation: 电子设备包括基体，该基体具有顶侧，并且还具有与顶侧相对的下侧。 基体在其下侧具有连接位置。 在基体的顶侧设置有电子部件。 基体具有至少一个具有至少一个检查点的侧面区域，具有第一区域和第二区域。 第二个地区体现为第一个地区的缩进。 第一和第二区域包含不同的材料。

公开(公告)号：US08174116B2

公开(公告)日：2012-05-08

申请号：US12674761

申请日：2008-08-25

Applicant: Koichiro Masuda ,  Tooru Mori

Inventor： Koichiro Masuda ,  Tooru Mori

IPC: H01L23/34

CPC classification number: H01L23/49816 ,  H01G2/06 ,  H01L23/49805 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/145 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09836 ,  H05K2201/10378 ,  H05K2201/10636 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.

Abstract translation: 提供了当焊接的半导体器件和印刷电路板之间的间隙宽度恒定时，能够避免由于焊料的吸引引起的连接不良的隔离件以及间隔件的制造方法。 间隔件包括电绝缘基底构件和至少一个焊料引导端子。 基部构件具有底面，顶面和至少一个侧面，底面和顶面彼此不接触，而侧面接触底面和顶面中的一个或两个。 焊料引导端子部分或全部部分覆盖底面，部分地覆盖侧面。 作为覆盖侧面的焊料引导端子的一部分的表面的焊料引导面与底面不正交。

公开(公告)号：US08119928B2

公开(公告)日：2012-02-21

申请号：US12343844

申请日：2008-12-24

Applicant: Isao Matsui

Inventor： Isao Matsui

IPC: H05K1/16 ,  H05K1/00 ,  H05K1/03

CPC classification number: H01R12/721 ,  H05K1/0231 ,  H05K1/184 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49117

Abstract: In a multi-layered wiring substrate according to an exemplary aspect of the present invention, a conductor formed in an edge face area functions as a pad for mounting a connector.

Abstract translation: 在根据本发明的示例性方面的多层布线基板中，形成在边缘区域中的导体用作用于安装连接器的垫。

公开(公告)号：US08093505B2

公开(公告)日：2012-01-10

申请号：US12438570

申请日：2007-08-10

Applicant: Manabu Gokan ,  Akihisa Nakahashi ,  Takayuki Hirose ,  Yoko Kasai ,  Kohichi Tanda

Inventor： Manabu Gokan ,  Akihisa Nakahashi ,  Takayuki Hirose ,  Yoko Kasai ,  Kohichi Tanda

IPC: H05K1/00

CPC classification number: H05K1/144 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/023 ,  H05K1/145 ,  H05K3/323 ,  H05K3/361 ,  H05K3/403 ,  H05K2201/0367 ,  H05K2201/042 ,  H05K2201/09181 ,  H05K2201/10234 ,  H05K2201/10287 ,  Y10T29/49117 ,  H01L2224/0401

Abstract: Provided is a layered electronic circuit device capable of realizing high-density/high-function mounting, easily inspecting and repairing the respective constituent elements, and improving the electronic connection characteristic. The layered electronic circuit device includes a first circuit substrate (101) and a second circuit substrate (102) which are arranged in parallel such that their substrate surfaces are opposed to each other. The peripheral portion of the first circuit substrate (101) and the peripheral portion of the second circuit substrate (102) are connected to each other by connection members (10a to 10d) having a wiring member (103) and a thermal hardening anisotropic conductive sheet (107), thereby performing electric connection.

Abstract translation: 提供一种能够实现高密度/高功能安装，容易地检查和修复各个组成元件以及改善电子连接特性的分层电子电路装置。 分层电子电路器件包括平行布置以使得它们的衬底表面彼此相对的第一电路衬底（101）和第二电路衬底（102）。 第一电路基板（101）的周边部分和第二电路基板（102）的周边部分通过具有布线部件（103）和热硬化各向异性导电片的连接部件（10a〜10d）彼此连接 （107），从而进行电连接。

公开(公告)号：US20110116236A1

公开(公告)日：2011-05-19

申请号：US12820611

申请日：2010-06-22

Applicant: HIDEKI AKAHORI

Inventor： HIDEKI AKAHORI

IPC: H05K7/20 ,  H05K3/30 ,  H01R9/00

CPC classification number: H05K1/141 ,  H01L23/36 ,  H01L23/49541 ,  H01L2924/0002 ,  H05K1/056 ,  H05K3/202 ,  H05K3/3405 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/403 ,  H05K2201/09072 ,  H05K2201/09181 ,  H05K2201/09745 ,  H05K2201/10166 ,  H05K2201/1034 ,  H05K2201/10765 ,  H05K2201/10969 ,  Y10T29/4913 ,  Y10T29/49147 ,  H01L2924/00

Abstract: A heat conduction board, include a heat dissipation member; a heat conduction member which is arranged on the heat dissipation member and conducts a heat thereto; a lead frame which is formed in a wire pattern shape, and is arranged on the heat conduction member; and a printed circuit board which mounts a second electronic component for controlling a first electronic component; wherein the first electronic component and the printed circuit board are soldered to the lead frame.

Abstract translation: 导热板包括散热构件; 布置在散热构件上并传导热量的导热构件; 引线框架，其形成为线状，并布置在导热构件上; 以及安装用于控制第一电子部件的第二电子部件的印刷电路板; 其中所述第一电子部件和所述印刷电路板焊接到所述引线框架。

公开(公告)号：US20110069460A1

公开(公告)日：2011-03-24

申请号：US12927544

申请日：2010-11-17

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/00 ,  H01R43/16

CPC classification number: H05K1/118 ,  H01R12/79 ,  H05K1/117 ,  H05K3/363 ,  H05K3/4691 ,  H05K2201/09181

Abstract: An electrical connector comprises an elongated flexible circuit having rigid strips bonded onto one or both sides and one or more ends thereof. The strips contain metallized castellations that are aligned with respective metal traces on the flex circuit and soldered thereto. The flexible portion, along with the attached rigid board(s) forms a plug assembly that mates with a socket having contact pins that engage with their respective metallized castellations, with the castellations providing a self-aligning function. The invention may be used to form a flex cable with connectors on one or both ends. Alternatively, the elongated flexible circuit may represent an extension of a larger flex circuit substrate that further contains other electronic devices mounted thereon. The socket and contact pins are preferably attachable to a motherboard by soldering or other means.

Abstract translation: 电连接器包括细长的柔性电路，其具有结合到一侧或两侧上的刚性条和其一端或多端。 这些条带包含与柔性电路上的相应金属迹线对准并焊接到其上的金属化蓖麻。 柔性部分以及附接的刚性板形成一个插头组件，该插头组件与具有与它们各自的金属化cast that接合的接触销的插座配合，cast ations提供自对准功能。 本发明可以用于在一端或两端形成具有连接器的柔性电缆。 或者，细长柔性电路可以表示进一步包含安装在其上的其它电子装置的较大柔性电路基板的延伸部。 插座和接触针优选通过焊接或其他方式附接到主板。

公开(公告)号：US20100284161A1

公开(公告)日：2010-11-11

申请号：US12840432

申请日：2010-07-21

Applicant: Hiroyuki MOTOHARA

Inventor： Hiroyuki MOTOHARA

IPC: H05K1/14

CPC classification number: H05K1/144 ,  G01R31/2818 ,  H01L2924/0002 ,  H05K1/0268 ,  H05K3/403 ,  H05K2201/042 ,  H05K2201/09181 ,  H05K2201/10378 ,  H05K2201/2018 ,  H05K2203/162 ,  H01L2924/00

Abstract: There is provided a stacked mounting structure in which, it is possible to carry out testing of each substrate after the formation of (after manufacturing) the stacked mounting structure.The stacked mounting structure includes a first substrate (10) which includes a first electronic component, a second substrate (20) which is disposed facing the first substrate (10), and which includes a second electronic component, an intermediate member (40) which has a space for accommodating the second electronic component, an electroconductive member (7) which is provided to the intermediate member (40), a first electrode for testing (11a) which is electrically connected to the first electronic component, as an electrode for testing an operation of the first electronic component, a connecting electrode toward the second substrate (22a) which is electrically connected to the second electronic component, as an electrode for electrically connecting to the electroconductive member (7), and a second electrode for testing (12a) which is provided to the first substrate as an electrode for testing an operation of the second electronic component, and which is electrically connected to the second electronic component via the electroconductive member (7) and the connecting electrode toward the second substrate (22a).

Abstract translation: 提供了一种堆叠的安装结构，其中可以在（制造之后）层叠的安装结构之后对每个基板进行测试。 堆叠的安装结构包括第一基板（10），其包括第一电子部件，第二基板（20），其面对第一基板（10）设置，并且包括第二电子部件，中间部件（40） 具有用于容纳第二电子部件的空间，设置在中间部件（40）上的导电部件（7），与第一电子部件电连接的第一测试用电极（11a），作为测试电极 第一电子部件的操作，朝向与第二电子部件电连接的第二基板（22a）的连接电极作为用于电连接到导电部件（7）的电极和用于测试的第二电极（12a ），其被提供给作为用于测试第二电子部件的操作的电极的第一基板，并且与第二基板电连接 第二电子部件经由导电部件（7）和连接电极朝向第二基板（22a）。

公开(公告)号：US07821121B2

公开(公告)日：2010-10-26

申请号：US12061097

申请日：2008-04-02

Applicant: Tetsuo Yoshizawa ,  Shin-ichi Urakawa ,  Takashi Miyake

Inventor： Tetsuo Yoshizawa ,  Shin-ichi Urakawa ,  Takashi Miyake

IPC: H01L23/04

CPC classification number: H05K3/403 ,  H01L21/566 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L31/0203 ,  H01L31/18 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/12041 ,  H01L2924/15787 ,  H01L2924/181 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/42 ,  H05K2201/09181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: In a semiconductor device which has through holes in an end face, in which a semiconductor element is fixedly mounted on a face of a substrate which has a wiring pattern, which is conductive to the wiring portion formed in the through hole, in at least one face, in which electrodes of the semiconductor element are electrically connected to the wiring pattern, and in which the face of the substrate which has the semiconductor element is coated with a resin, the through hole has a through hole land with a width of 0.02 mm or more, which is conductive to the wiring portion, in a substrate face, and the wiring portion and the through hole land are exposed.

Abstract translation: 在半导体器件中，在半导体器件中，至少一个半导体器件中的至少一个半导体元件固定地安装在具有布线图形的基板的表面上，该布线图案对形成在通孔中的布线部分是导电的 面，其中半导体元件的电极电连接到布线图案，并且其中具有半导体元件的基板的表面涂覆有树脂，该通孔具有宽度为0.02mm的通孔焊盘 以上，在基板面上与布线部分导电，并且布线部分和通孔焊盘露出。