公开(公告)号：US20080310133A1

公开(公告)日：2008-12-18

申请号：US12081503

申请日：2008-04-16

Applicant: Masaoki Yoshida ,  Takuya Nakayama ,  Koji Ueyama

Inventor： Masaoki Yoshida ,  Takuya Nakayama ,  Koji Ueyama

IPC: H05K7/00

CPC classification number: H05K1/116 ,  H05K1/0256 ,  H05K3/3447 ,  H05K2201/09363 ,  H05K2201/09463 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2201/10651 ,  H05K2203/1446

Abstract: The present invention is to provide a printed wiring board which can certainly prevent damage of conductive pattern caused by the terminal. The printed wiring board has a board, a conductive pattern, a through-hole and a non-conductive area. A lead wire of resistance mounted on the printed wiring board is inserted into the through-hole 4. The lead wire projects from a surface of the board, and is bent close to the surface. The non-conductive area is formed into a fan-shaped shape enlarging toward a tip of the lead wire from a center of the through-hole. Since the bent lead wire is arranged on the non-conductive area, the non-conductive area can prevent damage of the conductive pattern which is caused by touching the lead wire to the conductive pattern.

Abstract translation: 本发明提供一种可以防止由端子引起的导电图案的损坏的印刷电路板。 印刷电路板具有基板，导电图案，通孔和非导电区域。 安装在印刷线路板上的电阻引线插入到通孔4中。引线从板的表面突出并且靠近表面弯曲。 非导电区域形成为从通孔的中心向引线的尖端扩大的扇形形状。 由于弯曲的引线布置在非导电区域上，所以非导电区域可以防止由引线接触导电图案而导致的导电图案的损坏。

公开(公告)号：US20070045808A1

公开(公告)日：2007-03-01

申请号：US11591744

申请日：2006-11-02

Applicant: Warren Farnworth ,  Alan Wood

Inventor： Warren Farnworth ,  Alan Wood

IPC: H01L21/44 ,  H01L23/48 ,  H01L23/52

CPC classification number: H01L23/3128 ,  G01R1/0483 ,  G01R3/00 ,  G01R31/2867 ,  H01L21/4846 ,  H01L23/32 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K1/0218 ,  H05K1/113 ,  H05K3/027 ,  H05K2201/09363 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A test carrier for a semiconductor component includes a base for retaining the component, and an interconnect on the base having contacts configured to electrically engage component contacts on the component. The base includes conductors in electrical communication with the contacts on the interconnect, which are defined by grooves in a conductive layer. In addition, the conductors include first portions of the conductive layer configured for electrical transmission, which are separated from one another by second portions of the conductive layer configured for no electrical transmission. The test carrier is configured for mounting to a burn in board in electrical communication with a test circuitry configured to apply test signals through the contacts on the interconnect to the component.

Abstract translation: 用于半导体部件的测试载体包括用于保持部件的基座和在基部上的互连件，其具有被构造成电接合部件上的部件触点的触点。 基座包括与互连上的触点电连通的导体，其由导电层中的沟槽限定。 此外，导体包括被配置用于电传输的导电层的第一部分，它们被配置为不进行电传输的导电层的第二部分彼此分离。 测试载体被配置为安装到板上的燃烧，与测试电路电连通，该测试电路经配置以通过互连件上的触点施加测试信号到组件。

公开(公告)号：US07052311B2

公开(公告)日：2006-05-30

申请号：US11069946

申请日：2005-03-03

Applicant: Takahiro Kondou ,  Mitsuru Kobayashi

Inventor： Takahiro Kondou ,  Mitsuru Kobayashi

IPC: H01R12/24

CPC classification number: H01R9/034 ,  H01R9/032 ,  H01R13/6471 ,  H01R13/6585 ,  H01R13/6592 ,  H01R24/562 ,  H01R2107/00 ,  H05K1/0219 ,  H05K1/0245 ,  H05K2201/09363

Abstract: A disclosed balanced transmission cable connector includes a relay board having a wiring pattern extending from the upper face to the lower face through a via hole. Wire connection pads to output signals are disposed on the upper face of the relay board, and wire connection pads to input signals are disposed on the lower face of the relay board. Two wires of a pair wire are soldered to the wire connection pads disposed on the same face of the relay board. A ground layer inside the relay board shields between the soldered parts of the pair wire to transmit output signals and the soldered parts of the pair wire to transmit input signals.

Abstract translation: 所公开的平衡传输电缆连接器包括具有通过通孔从上表面延伸到下表面的布线图案的中继板。 在继电器板的上表面上设置用于输出信号的导线连接焊盘，并且在继电器板的下表面上设置用于输入信号的导线连接焊盘。 一对线的两条线焊接到设置在继电器板的同一面上的电线连接焊盘。 继电器板内的接地层屏蔽了对线的焊接部分之间传输输出信号和对线的焊接部分以传输输入信号。

公开(公告)号：US20050287789A1

公开(公告)日：2005-12-29

申请号：US11166431

申请日：2005-06-24

Applicant: Bahadir Tunaboylu

Inventor： Bahadir Tunaboylu

IPC: G01R1/073 ,  H01L21/4763 ,  H05K1/00 ,  H05K1/09 ,  H05K3/02

CPC classification number: H05K3/027 ,  G01R1/07378 ,  G01R31/2889 ,  H05K1/0298 ,  H05K1/092 ,  H05K2201/09363

Abstract: A method of processing a substrate is provided. The method includes providing a substrate having a first surface, a second surface, and conductive paths extending from the first surface to the second surface. The method also includes (1) covering a portion of the first surface with a conductive material, and (2) removing a portion of the conductive material to define conductive traces on the first surface.

Abstract translation: 提供了一种处理衬底的方法。 该方法包括提供具有第一表面，第二表面和从第一表面延伸到第二表面的导电路径的基底。 该方法还包括（1）用导电材料覆盖第一表面的一部分，以及（2）去除导电材料的一部分以在第一表面上限定导电迹线。

公开(公告)号：US06458514B1

公开(公告)日：2002-10-01

申请号：US09588593

申请日：2000-06-07

Applicant: Chong-Ren Maa ,  Hong-Ming Lin ,  Toshikazu Oda ,  Makoto Nakamura ,  Sunao Meguro

Inventor： Chong-Ren Maa ,  Hong-Ming Lin ,  Toshikazu Oda ,  Makoto Nakamura ,  Sunao Meguro

IPC: G03F700

CPC classification number: H05K3/0052 ,  H05K3/0035 ,  H05K3/064 ,  H05K2201/0394 ,  H05K2201/09363 ,  Y10S430/146

Abstract: One or more through holes are formed by a process in a printed circuit board substrate formed of a resinous dielectric sheet and a conductive layer covering one surface of the dielectric sheet. The process involves the forming by laser one or more cavities on other surface of the dielectric sheet such that the cavities penetrate only the dielectric sheet, without penetrating the conductive layer. Both surfaces of the dielectric sheet are coated with a liquid photoresist layer such that the cavities are filled with the photoresist. A plurality of small areas are formed by photolithography on the surface which is covered with the conductive layer. The small areas are corresponding in location and shape to the cavities which may be of any shape. The small areas are stripped of the conductive, layer by etching before the cavities are stripped of the photoresist. The through holes are thus formed in the small areas defined by the cavities.

Abstract translation: 通过由树脂电介质片形成的印刷电路板基板和覆盖电介质片的一个表面的导电层的工艺形成一个或多个通孔。 该方法涉及通过激光在电介质片的另一表面上形成一个或多个空腔，使得腔不穿透导电层而仅穿透电介质片。 电介质片的两个表面涂覆有液态光致抗蚀剂层，使得空​​腔被光致抗蚀剂填充。 在被导电层覆盖的表面上通过光刻法形成多个小区域。 这些小区域对应于可以是任何形状的空腔的位置和形状。 在空穴被光致抗蚀剂剥离之前，通过蚀刻将小区域剥离为导电层。 因此，通孔形成在由空腔限定的小区域中。

公开(公告)号：US20170303395A1

公开(公告)日：2017-10-19

申请号：US15513459

申请日：2015-09-15

Applicant: FUJIKURA LTD. ,  DDK LTD.

Inventor： Yuki Ishida ,  Masayuki Suzuki ,  Harunori Urai ,  Isao Kojima

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/22 ,  H05K3/46

CPC classification number: H05K1/111 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/0221 ,  H05K1/0245 ,  H05K1/0298 ,  H05K1/117 ,  H05K1/118 ,  H05K3/22 ,  H05K3/4644 ,  H05K2201/09236 ,  H05K2201/09363

Abstract: A printed wiring board includes one or more substrates, the one or more substrates including at least a first substrate, the first substrate being formed with a pad and a ground layer at any one of main surfaces of the first substrate, the pad being to be electrically connected to a connector as another component, the ground layer being formed to surround the pad from a circumference of the pad and have an inner edge at a location separated from an outer edge of the pad with a predetermined distance, the ground layer being to be grounded to a ground contact.

公开(公告)号：US09664569B2

公开(公告)日：2017-05-30

申请号：US14714005

申请日：2015-05-15

Applicant: Google Inc.

Inventor： Adam Mittleman ,  Ian Charles Smith ,  Daniel Adam Warren ,  William Raeming Dong ,  Jeff Wheeler

IPC: G01N21/00 ,  G01J5/06 ,  H05K1/02 ,  G01J5/00 ,  G01J5/10 ,  G01J5/02 ,  G01J5/04 ,  G08B13/189

CPC classification number: G01J5/06 ,  G01J5/0014 ,  G01J5/0205 ,  G01J5/04 ,  G01J5/10 ,  G08B13/189 ,  G08B13/191 ,  H05K1/0201 ,  H05K1/0298 ,  H05K2201/09063 ,  H05K2201/093 ,  H05K2201/09363 ,  H05K2201/0969 ,  H05K2201/10106 ,  H05K2201/10151 ,  H05K2201/10522 ,  H05K2201/10575 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A multilayered circuit board having a metal-free region vertically extending through at least a portion of a conductive layer, which lies generally parallel to a horizontal plane, vertically spaced from an outer surface. Heat-emitting and heat-sensitive components are mounted on the outer surface. The heat-emitting component is vertically and laterally spaced from the metal-free region, whereas the heat-sensitive component is vertically spaced and laterally aligned within the metal-free region such that the metal-free region is a thermal barrier that shields heat-sensitive component from radial heat flowing from the heat-emitting component.

公开(公告)号：US09019035B2

公开(公告)日：2015-04-28

申请号：US12674221

申请日：2008-07-24

Applicant: Risato Ohhira

Inventor： Risato Ohhira

IPC: H01P3/08 ,  H05K1/02 ,  H01P1/04 ,  H01L23/66

CPC classification number: H05K1/0219 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01019 ,  H01L2924/09701 ,  H01L2924/15192 ,  H01L2924/15313 ,  H01L2924/15323 ,  H01L2924/16195 ,  H01L2924/19033 ,  H01L2924/3011 ,  H01P1/047 ,  H01P3/08 ,  H05K1/0253 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09363 ,  H05K2201/09618 ,  H05K2201/09663 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The high-frequency wiring board of the present invention includes: first coplanar lines provided with a first signal line and a first planar ground pattern formed on the same wiring layer as the first signal line; second coplanar lines provided with a second signal line formed on a different wiring layer than the first signal line and a second planar ground pattern formed on the same wiring layer as the second signal line; and a first ground pattern formed on the same wiring layer as the first coplanar lines. The first coplanar lines and the second coplanar lines are connected. At least the first ground pattern and the first planar ground pattern are separated in a region following the second signal line from the connection of the first signal line and the second signal line.

Abstract translation: 本发明的高频布线基板包括：第一共面线，设置有与第一信号线在同一布线层上形成的第一信号线和第一平面接地图案; 第二共面线设置有形成在与第一信号线不同的布线层上的第二信号线和形成在与第二信号线相同的布线层上的第二平面接地图案; 以及形成在与第一共面线相同的布线层上的第一接地图案​​。 第一共面线和第二共面线被连接。 至少第一接地图案​​和第一平面接地图案在第二信号线之后的区域中与第一信号线和第二信号线的连接分开。

公开(公告)号：US20130048618A1

公开(公告)日：2013-02-28

申请号：US13695870

申请日：2011-03-23

Applicant: Jan van Aalst ,  Drago Kovacic ,  Bostjan Podobnik

Inventor： Jan van Aalst ,  Drago Kovacic ,  Bostjan Podobnik

IPC: B23K26/36

CPC classification number: H05K3/027 ,  B23K26/36 ,  B23K2101/38 ,  H05K2201/062 ,  H05K2201/09363

Abstract: A method for partial detachment of a defined area of a conductive layer using a laser beam includes forming a conductor track with a defined path from the conductive layer on the substrate, the path defining main axes. The area is segmented into zones. A linear recess is provided along a respective perimeter of each of the zones. Each of the zones has a strip shape such that the recesses extend along paths that are substantially straight lines not parallel to either of the main axes. One of the zones to be removed is heated using laser radiation until adhesion of the conductive layer to the substrate is substantially reduced and the zone to be removed is detached in a surface-wide manner from the substrate under external influences. Laser-beam parameters are set such that only the conductive layer is removed without affecting an underlying substrate.

Abstract translation: 使用激光束对导电层的限定区域进行部分分离的方法包括从基板上的导电层形成具有限定路径的导体轨道，该路径限定主轴。 该区域被分割成区域。 沿着每个区域的相应周边设置有线性凹槽。 每个区域具有带状，使得凹部沿着不平行于任一主轴线的基本直线的路径延伸。 使用激光辐射来加热待除去的区域之一，直到导电层与基底的粘合性大大降低，并且在外部影响下将被去除的区域以表面宽度方式从衬底上分离。 激光束参数被设置为使得仅去除导电层而不影响下面的衬底。

公开(公告)号：US08157430B2

公开(公告)日：2012-04-17

申请号：US12527336

申请日：2007-10-10

Applicant: Tetsuya Hamada

Inventor： Tetsuya Hamada

IPC: F21V7/22

CPC classification number: G02B6/0073 ,  G02B6/0068 ,  G02B6/0083 ,  G02B6/0085 ,  G02F1/133615 ,  H05K1/0209 ,  H05K1/189 ,  H05K3/28 ,  H05K3/321 ,  H05K2201/09363 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/10969 ,  H05K2201/2054

Abstract: Electrode terminals (33a, 33b) of an LED (3) and a mounting wiring (42) of an FPC (4) are bonded by using a conductive adhesive, and a metal slug (31) of the LED (3) and a heat dissipation wiring (43) of the FPC (4) are bonded by using the conductive adhesive. The heat dissipation wiring (43) corresponds to each of the LEDs (3) and isolates the LEDs one from the other, not permitting electricity to be carried between them.

Abstract translation: LED（3）的电极端子（33a，33b）和FPC（4）的安装布线（42）通过使用导电粘合剂和LED（3）的金属块（31）和热 通过使用导电粘合剂将FPC（4）的耗散布线（43）接合。 散热线（43）对应于每个LED（3），并且将LED彼此隔离，不允许在它们之间承载电力。