公开(公告)号：US20110286189A1

公开(公告)日：2011-11-24

申请号：US13196129

申请日：2011-08-02

Applicant: Junichi Nakamura ,  Yuji Kobayashi

Inventor： Junichi Nakamura ,  Yuji Kobayashi

IPC: H05K1/18 ,  H05K1/11

CPC classification number: H05K1/115 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/116 ,  H05K3/205 ,  H05K3/28 ,  H05K3/3473 ,  H05K3/4007 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4644 ,  H05K2201/0376 ,  H05K2201/09481 ,  H05K2201/0949 ,  H05K2201/09509 ,  H05K2203/0338 ,  H05K2203/0361 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of fabricating a wiring board includes forming a resist layer, such as a solder or plating resist layer, defining an opening portion on a support board such that a portion of the support board is exposed. An electrode is formed directly on the support board within the opening portion, and the plating resist layer, when used, is removed. An insulating layer is formed on the electrode, as well as the support board or solder resist layer, and a wiring portion connected to the electrode at the insulating layer is also formed. A solder resist layer having an opening portion is then formed on the wiring portion, and the support board is removed to expose a surface of the electrode or a surface of the electrode and insulating layer. Another solder resist layer having an opening portion may then be formed on the exposed surface of the insulating layer.

Abstract translation: 制造布线板的方法包括在支撑板上形成限定开口部分的焊料或电镀抗蚀剂层的抗蚀剂层，使得支撑板的一部分露出。 电极直接形成在开口部内的支撑板上，当使用时，电镀抗蚀剂层被去除。 在电极以及支撑板或阻焊层上形成绝缘层，并且还形成连接到绝缘层处的电极的布线部分。 然后在布线部分上形成具有开口部分的阻焊层，并且去除支撑板以暴露电极的表面或电极和绝缘层的表面。 然后可以在绝缘层的暴露表面上形成具有开口部分的另一阻焊层。

公开(公告)号：US08046912B2

公开(公告)日：2011-11-01

申请号：US12321210

申请日：2009-01-16

Applicant: Yoichi Kubota ,  Teck-Gyu Kang ,  Jae M. Park ,  Belgacem Haba

Inventor： Yoichi Kubota ,  Teck-Gyu Kang ,  Jae M. Park ,  Belgacem Haba

IPC: H05K3/02

CPC classification number: H05K1/0366 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K3/06 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A packaged microelectronic element includes connection component incorporating a dielectric layer (22) carrying traces (58) remote from an outer surface (26), posts (48) extending from the traces and projecting beyond the outer surface of the dielectric, and pads (30) exposed at the outer surface of the dielectric layer, the pads being connected to the posts by the traces. The dielectric element overlies the front surface of a microelectronic element, and contacts (74) exposed on the front surface of the microelectronic element are connected to the pads by elongated leads (76) such as wire bonds. Methods of making the connection component are also disclosed.

Abstract translation: 封装的微电子元件包括连接部件，其包括承载远离外表面（26）的迹线（58）的介电层（22），从该迹线延伸并突出超过电介质外表面的柱（48） ）暴露在介电层的外表面处，焊盘通过迹线连接到柱。 电介质元件覆盖在微电子元件的前表面上，暴露在微电子元件的前表面上的触点（74）通过诸如引线键的细长引线（76）连接到焊盘。 还公开了制造连接部件的方法。

公开(公告)号：US08043735B2

公开(公告)日：2011-10-25

申请号：US11370845

申请日：2006-03-09

Applicant: Sang Kwon Nam ,  Bo Hyun Byun

Inventor： Sang Kwon Nam ,  Bo Hyun Byun

IPC: H01M14/00 ,  H01M2/26 ,  H01R9/00 ,  H05K7/00

CPC classification number: H05K3/242 ,  H01M10/42 ,  H01M10/425 ,  H05K1/117 ,  H05K3/0052 ,  H05K2201/0919 ,  H05K2201/09481

Abstract: A method of fabricating a rechargeable battery having an electrode assembly, a PCB and a battery case, wherein the electrode assembly is connected to the PCB, the method including preparing a PCB having a first surface with an external contact terminal formed thereon and having a second surface with a conductive feature formed thereon, wherein the conductive feature is electrically connected to the external contact terminal through a conductive trace, and plating the external contact terminal by electrically connecting a plating electrode to the conductive feature.

Abstract translation: 一种制造具有电极组件，PCB和电池壳体的可再充电电池的方法，其中所述电极组件连接到所述PCB，所述方法包括制备具有形成在其上的外部接触端子的第一表面的PCB，并具有第二 表面，其上形成有导电特征，其中导电特征通过导电迹线电连接到外部接触端子，并且通过将电镀电极电连接到导电特征来电镀外部接触端子。

公开(公告)号：US08037600B2

公开(公告)日：2011-10-18

申请号：US12061774

申请日：2008-04-03

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R43/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and mounting at least one interposer on a first surface of the carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. The method includes arranging a plurality of electrically conductive elements about the surface of the at least one hemi-toroidal interposer and extending radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

Abstract translation: 一种制造包括电绝缘载体平面并在载体平面的第一表面上安装至少一个插入件的焊盘格栅阵列（LGA）插入器结构的方法。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 该方法包括围绕至少一个半环形插入器的表面布置多个导电元件，并从其最上端向内和向下自由地延伸，与位于电绝缘的相对侧上的至少一个部件电接触 载体飞机

公开(公告)号：US20110232953A1

公开(公告)日：2011-09-29

申请号：US13074144

申请日：2011-03-29

Applicant: Takeshi Oga ,  Katsura Hayashi

Inventor： Takeshi Oga ,  Katsura Hayashi

IPC: H05K1/02

CPC classification number: H05K3/4602 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/427 ,  H05K2201/0175 ,  H05K2201/0209 ,  H05K2201/029 ,  H05K2201/0769 ,  H05K2201/09481 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/10674 ,  H05K2201/2072

Abstract: According to one embodiment of the invention, a circuit board comprises an insulating layer including a resin material, a plurality of inorganic insulating particles, and a penetrating hole. The circuit board further comprises a penetrating conductor disposed in the penetrating hole. The insulating layer includes a resin insulating portion having the plurality of inorganic insulating particles dispersed in the resin material. The insulating layer further includes an inorganic insulating portion interposed between the resin insulating portion and the penetrating conductor and made of the same material as the plurality of inorganic insulating particles.

Abstract translation: 根据本发明的一个实施例，电路板包括包括树脂材料，多个无机绝缘颗粒和穿透孔的绝缘层。 电路板还包括布置在穿透孔中的穿透导体。 绝缘层包括具有分散在树脂材料中的多个无机绝缘粒子的树脂绝缘部分。 绝缘层还包括介于树脂绝缘部分和穿透导体之间并由与多个无机绝缘颗粒相同的材料制成的无机绝缘部分。

公开(公告)号：US08007286B1

公开(公告)日：2011-08-30

申请号：US12406761

申请日：2009-03-18

Applicant: Henry V. Holec ,  Wm. Todd Crandell

Inventor： Henry V. Holec ,  Wm. Todd Crandell

IPC: H01R12/00

CPC classification number: H05K1/0293 ,  F21Y2107/30 ,  F21Y2115/10 ,  H01R4/02 ,  H01R9/096 ,  H01R12/523 ,  H01R13/717 ,  H05K1/0266 ,  H05K1/0269 ,  H05K1/0292 ,  H05K1/0298 ,  H05K1/11 ,  H05K1/113 ,  H05K1/118 ,  H05K1/14 ,  H05K1/144 ,  H05K1/147 ,  H05K3/0061 ,  H05K3/363 ,  H05K2201/041 ,  H05K2201/09481 ,  H05K2201/09918 ,  H05K2201/10106 ,  H05K2201/2027 ,  H05K2203/0228

Abstract: In some embodiments, an interconnectable circuit board may include one or more of the following features: (a) a first electrically conductive pad located on a top of the circuit board, (b) a plated through hole on the conductive pad which passes through the circuit board, (c) a second electrically conductive pad coupled to the plated through hole; the second conductive pad capable of being electrically connected to a third electrically conductive pad attached to a top of a second interconnectable circuit board, (d) cut marks indicating safe locations for separating the circuit board, and (e) a second cut mark adjacent to the first cut mark where the area between the first and second cut mark can be utilized to make a safe cut through the circuit board.

Abstract translation: 在一些实施例中，可互连电路板可以包括以下特征中的一个或多个：（a）位于电路板顶部的第一导电焊盘，（b）导电焊盘上的电镀通孔， 电路板，（c）耦合到电镀通孔的第二导电焊盘; 第二导电焊盘能够电连接到附接到第二可互连电路板的顶部的第三导电焊盘，（d）切割标记，指示用于分离电路板的安全位置，以及（e）与第二导电焊盘相邻的第二切割标记 可以利用第一和第二切割标记之间的区域来进行通过电路板的安全切割的第一切割标记。

公开(公告)号：US08001683B2

公开(公告)日：2011-08-23

申请号：US12023657

申请日：2008-01-31

Applicant: Yoichiro Kawamura ,  Katsuhiko Tanno

Inventor： Yoichiro Kawamura ,  Katsuhiko Tanno

IPC: H01K3/00 ,  B23K31/00

CPC classification number: B23K3/0623 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2924/00014 ,  H05K3/3478 ,  H05K3/4644 ,  H05K2201/09481 ,  H05K2203/0195 ,  H05K2203/0557 ,  H05K2203/082 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49204 ,  Y10T29/49222 ,  Y10T29/53204 ,  Y10T29/53209 ,  Y10T29/53213 ,  H01L2224/05599

Abstract: This invention provides a solder ball loading apparatus which enables fine solder balls to be loaded on pads while void is blocked from being caught into bump upon reflow. Inactive gas is supplied and the inactive gas is sucked from a loading cylinder located above a ball arrangement mask so as to gather solder balls. The gathered solder balls are rolled on the ball arrangement mask by moving the loading cylinder horizontally and the solder balls are dropped onto connecting pads on a multilayer printed wiring board through openings in the ball arrangement mask. Oxidation of the solder balls and mixture of voids upon reflow are prevented by loading the solder balls in the atmosphere of inactive gas.

Abstract translation: 本发明提供了一种焊球加载装置，其使得能够在焊盘上加载精细的焊球，同时在回流时阻止空隙被卡入凹陷中。 供给非活性气体，从位于球形布置掩模上方的装载圆筒吸入惰性气体，以收集焊球。 通过使装载筒水平移动，将聚集的焊球滚动在球形布置掩模上，并且焊球通过球形布置掩模中的开口落到多层印刷线路板上的连接焊盘上。 通过在不活泼气体的气氛中加载焊球来防止焊球和回流时的空隙混合物的氧化。

公开(公告)号：US07947908B2

公开(公告)日：2011-05-24

申请号：US11874930

申请日：2007-10-19

Applicant: Shoichi Mizuno ,  Hiroaki Takeuchi ,  Shuji Nojima

Inventor： Shoichi Mizuno ,  Hiroaki Takeuchi ,  Shuji Nojima

IPC: H05K1/16

CPC classification number: H05K1/183 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/6627 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/19032 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K1/0243 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/09481 ,  H05K2201/09727 ,  H05K2201/10969 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: An electronic device is provided. The electronic device includes: a circuit board having a surface on which a hollow is formed; an electronic component placed into the hollow; a pattern wiring which is formed on a bottom surface of the hollow and whose tip is provided at a position corresponding to a signal electrode of the electronic component; a signal wire connecting a tip of the pattern wiring and the signal electrode of the electronic component; two in-hollow ground patterns formed so as to sandwich the tip of the pattern wiring therebetween on the bottom surface of the hollow; and two or more ground wires that connect two ground electrodes provided on the electronic component so as to sandwich the signal electrode therebetween to the corresponding in-hollow ground patterns, respectively.

Abstract translation: 提供电子设备。 电子设备包括：具有形成有中空部的表面的电路板; 电子元件放置在空心中; 图案布线，其形成在所述中空部的底面上，其末端设置在与所述电子部件的信号电极对应的位置; 连接图案布线的尖端和电子部件的信号电极的信号线; 两个中空的接地图案形成为将中间的图案布线的末端夹在其间的中空部分的底面上; 以及两个或更多个接地线，其连接设置在电子部件上的两个接地电极，以将信号电极夹在其间，分别对应于中空接地图案。

公开(公告)号：US07937833B2

公开(公告)日：2011-05-10

申请号：US11976072

申请日：2007-10-19

Applicant: Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

Inventor： Hoe-Ku Jung ,  Je-Gwang Yoo ,  Myung-Sam Kang ,  Ji-Eun Kim ,  Jeong-Woo Park ,  Jung-Hyun Park

IPC: H03K3/02

CPC classification number: H05K3/20 ,  H05K3/0058 ,  H05K3/108 ,  H05K3/4611 ,  H05K3/4682 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A method of manufacturing a circuit board is disclosed. A method of manufacturing a circuit board that includes forming a first circuit pattern on the insulation layer of a carrier, in which an insulation layer and a first seed layer are stacked in order; stacking and pressing the carrier and an insulation board with the side of the carrier having the first circuit pattern facing the insulation board; removing the carrier to transfer the first circuit pattern and the insulation layer onto the insulation board; and forming a second circuit pattern on the insulation layer transferred to the insulation board, allows fine pitch circuit patterns to enable the manufacture of fine circuit patterns of high density on the board, and allows the manufacture of a multi-layer circuit board with a simple process.

Abstract translation: 公开了一种制造电路板的方法。 一种制造电路板的方法，包括在载体的绝缘层上形成第一电路图案，其中绝缘层和第一种子层依次层叠; 堆叠并按压载体和绝缘板，其中载体侧具有面向绝缘板的第一电路图案; 移除载体以将第一电路图案和绝缘层转移到绝缘板上; 并且在转移到绝缘板的绝缘层上形成第二电路图案，允许精细的间距电路图案能够在板上制造高密度的精细电路图案，并且允许制造具有简单的多层电路板 处理。

公开(公告)号：US20110061907A1

公开(公告)日：2011-03-17

申请号：US12654538

申请日：2009-12-22

Applicant: Myung Sam Kang ,  Chang Sup Ryu

Inventor： Myung Sam Kang ,  Chang Sup Ryu

IPC: H05K1/09 ,  H05K1/11 ,  C25D5/02 ,  B32B38/00

CPC classification number: C25D5/022 ,  C25D7/12 ,  H05K3/0035 ,  H05K3/242 ,  H05K3/243 ,  H05K3/3473 ,  H05K3/4007 ,  H05K3/42 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2203/054 ,  H05K2203/0577 ,  H05K2203/1581

Abstract: A printed circuit board according to an aspect of the invention may include: a board portion having an electrode portion provided on a surface thereof; a solder resist layer provided on the surface of the board portion and having an opening therein to expose the electrode portion to the outside; and a bump layer having the same diameter as the opening and providing an electrical connection with an external chip component.

Abstract translation: 根据本发明的一个方面的印刷电路板可以包括：具有设置在其表面上的电极部分的板部分; 阻焊层，设置在基板部分的表面上，并且在其中具有开口以将电极部分暴露于外部; 以及具有与开口相同直径并且提供与外部芯片部件的电连接的凸块层。