公开(公告)号：US20110315440A1

公开(公告)日：2011-12-29

申请号：US13137632

申请日：2011-08-30

Applicant: Han Kim

Inventor： Han Kim

IPC: H05K1/11

CPC classification number: H01P1/2005 ,  H01Q15/006 ,  H01Q15/008 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969

Abstract: An electromagnetic bandgap structure and a printed circuit board that have a mushroom type structure. The electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, layer-built on the first metal layer; a mushroom type structure having a metal plate layer-built on the first dielectric layer and a via of which one end is connected to the metal plate; a second dielectric layer, layer-built on the metal plate and the first dielectric layer; and a second metal layer, layer-built on the second dielectric layer, wherein the other end of the via is placed in a hole formed on the first metal layer and is connected to the first metal layer through a metal line.

Abstract translation: 具有蘑菇型结构的电磁带隙结构和印刷电路板。 电磁带隙结构包括第一金属层; 第一电介质层，其被构建在第一金属层上; 具有建立在第一电介质层上的金属板层的蘑菇型结构和其一端连接到金属板的通孔; 第二电介质层，层叠在金属板和第一介电层上; 以及第二金属层，其构造在所述第二电介质层上，其中所述通孔的另一端位于形成在所述第一金属层上的孔中，并且通过金属线连接到所述第一金属层。

公开(公告)号：US07922362B2

公开(公告)日：2011-04-12

申请号：US12062850

申请日：2008-04-04

Applicant: Yu-Kai Lin ,  Ya-hsien Chang

Inventor： Yu-Kai Lin ,  Ya-hsien Chang

IPC: F21V29/00

CPC classification number: H05K1/0206 ,  H05K1/0207 ,  H05K3/0061 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/09309 ,  H05K2201/10106

Abstract: A circuit board assembly and a backlight module comprising the circuit board assembly are provided. The circuit board assembly has a first surface and a second surface opposite to the first surface, and further comprises at least one laminate, a first conductive wiring structure and a coating. The first conductive wiring structure is formed on the first surface. The coating is formed on the coating area of the second surface, wherein the coating can conduct heat and provide electric insulation. Thus, the circuit board assembly is adapted to outwardly conduct heat from the laminate through the second surface and to promote the heat dissipation efficiency of the circuit board assembly.

Abstract translation: 提供了包括电路板组件的电路板组件和背光模组。 电路板组件具有与第一表面相对的第一表面和第二表面，并且还包括至少一个层压体，第一导电布线结构和涂层。 第一导电布线结构形成在第一表面上。 涂层形成在第二表面的涂覆区域上，其中涂层可以传导热量并提供电绝缘。 因此，电路板组件适于向外传导来自层压板的热量通过第二表面并且促进电路板组件的散热效率。

公开(公告)号：US20110067914A1

公开(公告)日：2011-03-24

申请号：US12654361

申请日：2009-12-17

Applicant: Hyo-Jic Jung ,  Han Kim ,  Mi-Ja Han ,  Kang-Wook Bong ,  Dae-Hyun Park

Inventor： Hyo-Jic Jung ,  Han Kim ,  Mi-Ja Han ,  Kang-Wook Bong ,  Dae-Hyun Park

IPC: H05K9/00 ,  H05K1/11

CPC classification number: H05K1/0236 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K2201/09309 ,  H05K2201/09627 ,  H01L2924/00014

Abstract: Disclosed is a printed circuit board into which an electromagnetic bandgap structure for blocking a noise is inserted. The electromagnetic bandgap structure can include a first conductor and a second conductor arranged on different planar surfaces, a third conductor arranged on a same planar surface that is different from a planar surface where the second conductor is arranged, and a first stitching via unit configured to connect the first conductor to the third connector through the planar surface where the second conductor is arranged and being electrically separated from the second conductor. The first conductor can include a first plate, a second plate spaced from the first plate, and a second stitching unit configured to electrically connect the first plate to the second plate through a planar surface that is different from a planar surface where the first plate and the second plate are arranged.

Abstract translation: 公开了一种印刷电路板，其中插入用于阻挡噪声的电磁带隙结构。 电磁带隙结构可以包括布置在不同平面上的第一导体和第二导体，布置在与布置第二导体的平面不同的相同平面上的第三导体，以及第一缝合通孔单元， 通过布置第二导体的平面表面将第一导体连接到第三连接器，并与第二导体电分离。 第一导体可以包括第一板，与第一板间隔开的第二板，以及第二缝合单元，其被配置为通过与第一板和第二板的平坦表面不同的平面表面将第一板电连接到第二板 布置第二板。

公开(公告)号：US07886431B2

公开(公告)日：2011-02-15

申请号：US11757261

申请日：2007-06-01

Applicant: Steve Weir ,  Scott McMorrow

Inventor： Steve Weir ,  Scott McMorrow

IPC: H05K3/30

CPC classification number: H05K1/141 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2924/19105 ,  H01L2924/3011 ,  H03H7/01 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/0263 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/049 ,  H05K2201/09254 ,  H05K2201/09309 ,  H05K2201/09781 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49128 ,  Y10T29/4913

Abstract: A power distribution system for integrated circuits includes methods to damp resonance between a bypass capacitor network and a power/ground cavity of the printed circuit board that (a) does not require excessive quantities of bypass/damping components or (b) does not require high plane cavity capacitance or in the alternative can insure a Q of less than 1.4 at the transition from the bypass network to the plane cavity impedance cross-over.

Abstract translation: 用于集成电路的配电系统包括阻止旁路电容器网络和印刷电路板的电源/接地腔之间的谐振的方法，（a）不需要过量的旁路/阻尼部件，或（b）不需要高 平面腔电容，或者在旁路网络到平面腔阻抗交叉的过渡中，可以确保小于1.4的Q。

公开(公告)号：US20100270646A1

公开(公告)日：2010-10-28

申请号：US12763444

申请日：2010-04-20

Applicant: CHEONG-WO HUNTER CHAN ,  Lynne E. Dellis ,  Fuhan Liu ,  David Ross McGregor ,  Venkatesh Sundaram ,  Deepukumar M. Nair

Inventor： CHEONG-WO HUNTER CHAN ,  Lynne E. Dellis ,  Fuhan Liu ,  David Ross McGregor ,  Venkatesh Sundaram ,  Deepukumar M. Nair

IPC: H01L29/92 ,  H01L21/50

CPC classification number: H05K1/162 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2201/10674 ,  H05K2203/0353 ,  H05K2203/1126

Abstract: Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printed wiring board core through build-up layers, wherein a first electrode of the thin-film capacitor comprises a thin nickel foil, a second electrode comprises a copper electrode, and a copper layer is formed on the nickel foil. The interconnections between the thin-film capacitor and the semiconductor device provide a low inductance path to transfer charge to and from the semiconductor device. Also provided are methods for fabricating such semiconductor packages.

Abstract translation: 提供了包括通过堆积层附着到印刷线路板芯的至少一个薄膜电容器的半导体封装，其中薄膜电容器的第一电极包括薄镍箔，第二电极包括铜电极和 在镍箔上形成铜层。 薄膜电容器和半导体器件之间的互连提供了将电荷转移到半导体器件和从半导体器件传输电荷的低电感路径。 还提供了制造这种半导体封装的方法。

公开(公告)号：US07813141B2

公开(公告)日：2010-10-12

申请号：US12188271

申请日：2008-08-08

Applicant: William J. Borland ,  G. Sidney Cox ,  David Ross McGregor

Inventor： William J. Borland ,  G. Sidney Cox ,  David Ross McGregor

IPC: H05K1/16

CPC classification number: H05K1/167 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/0154 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09672 ,  H05K2201/09763 ,  H05K2203/0361 ,  H05K2203/1461 ,  Y10T29/435

Abstract: This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode; a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0.

Abstract translation: 本发明涉及可以嵌入在印刷线路板的层内的电容/电阻装置。 嵌入器件节省了电路板表面的空间，并减少了焊接连接的数量，从而提高了可靠性。 更具体地，该装置包括第一金属箔; 第二金属箔; 由所述第一金属箔形成的第一电极; 设置在所述第一电极上的电介质; 形成在电介质上并与其相邻的电阻元件; 导电迹线 以及由所述第二金属箔形成并且设置在所述电介质上并与所述电阻元件电接触的第二电极，其中所述电介质设置在所述第一电极和所述第二电极之间，并且其中所述电介质包括介电常数小于 4.0。

公开(公告)号：US07797663B2

公开(公告)日：2010-09-14

申请号：US11696659

申请日：2007-04-04

Applicant: Steven C. Bird ,  Varoujan Malian ,  Mudasir Ahmad ,  Charles H. Casale ,  Danlu Tang

Inventor： Steven C. Bird ,  Varoujan Malian ,  Mudasir Ahmad ,  Charles H. Casale ,  Danlu Tang

IPC: G06F17/50

CPC classification number: G01R31/2818 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/0262 ,  H05K1/0268 ,  H05K1/113 ,  H05K1/181 ,  H05K3/3421 ,  H05K3/3457 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4623 ,  H05K2201/0367 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09627 ,  H05K2201/09663 ,  H05K2201/10333 ,  H05K2201/10462 ,  H05K2201/10484 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: Methods and apparatus for accessing a high speed signal routed on a conductive trace on an internal layer of a printed circuit board (PCB) using high density interconnect (HDI technology) are provided. The conductive trace may be coupled to a microvia (μVia) having a conductive dome disposed above the outer layer pad of the μVia. In-circuit test (ICT) fixtures or high speed test probes may interface with the conductive dome to test the high speed signal with decreased reflection loss and other parasitic effects when compared to conventional test points utilizing plated through-hole (PTH) technology.

Abstract translation: 提供了使用高密度互连（HDI技术）访问在印刷电路板（PCB）的内层上的导电迹线上路由的高速信号的方法和装置。 导电迹线可以耦合到具有设置在μVia的外层焊盘上方的导电圆顶的微孔（μVia）。 与使用电镀通孔（PTH）技术的常规测试点相比，在线测试（ICT）固定装置或高速测试探头可与导电圆顶接口以测试具有降低的反射损耗和其他寄生效应的高速信号。

公开(公告)号：US07787249B2

公开(公告)日：2010-08-31

申请号：US12364862

申请日：2009-02-03

Applicant: Lance L. Sundstrom

Inventor： Lance L. Sundstrom

IPC: H05K7/20 ,  H05K1/00

CPC classification number: H05K7/205 ,  H05K1/0206 ,  H05K1/0207 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09354 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: Systems and methods for printed board assembly isolated heat exchange are provided. In one embodiment, a printed board assembly comprises: at least one electrical power layer; at least one electrical ground layer; a first signal layer having a first signal routing area providing electrical trace connections for signals and a first heat exchange chassis fill conductor area located adjacent to a periphery of the first signal routing area; at least one thermal interface coupled to a chassis for conducting heat from the printed board assembly to the chassis; and at least one via conductively coupling the first heat exchange chassis fill conductor area to the at least one thermal interface.

Abstract translation: 提供印刷电路板组装隔离热交换的系统和方法。 在一个实施例中，印刷电路板组件包括：至少一个电功率层; 至少一个电接地层; 第一信号层，具有提供用于信号的电迹线连接的第一信号路由区域和邻近所述第一信号路由区域的周边定位的第一热交换机箱填充导体区域; 耦合到底架的至少一个热接口，用于将热量从印刷电路板组件传导到底座; 并且至少一个通孔将第一热交换底盘填充导体区域导电地耦合到至少一个热界面。

公开(公告)号：US20100195287A1

公开(公告)日：2010-08-05

申请号：US12364862

申请日：2009-02-03

Applicant: Lance L. Sundstrom

Inventor： Lance L. Sundstrom

IPC: H05K7/20

CPC classification number: H05K7/205 ,  H05K1/0206 ,  H05K1/0207 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09354 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: Systems and methods for printed board assembly isolated heat exchange are provided. In one embodiment, a printed board assembly comprises: at least one electrical power layer; at least one electrical ground layer; a first signal layer having a first signal routing area providing electrical trace connections for signals and a first heat exchange chassis fill conductor area located adjacent to a periphery of the first signal routing area; at least one thermal interface coupled to a chassis for conducting heat from the printed board assembly to the chassis; and at least one via conductively coupling the first heat exchange chassis fill conductor area to the at least one thermal interface.

Abstract translation: 提供印刷电路板组装隔离热交换的系统和方法。 在一个实施例中，印刷电路板组件包括：至少一个电功率层; 至少一个电接地层; 第一信号层，具有提供用于信号的电迹线连接的第一信号路由区域和邻近所述第一信号路由区域的周边定位的第一热交换机箱填充导体区域; 耦合到底架的至少一个热接口，用于将热量从印刷电路板组件传导到底座; 并且至少一个通孔将第一热交换底盘填充导体区域导电地耦合到至少一个热界面。

公开(公告)号：US20100193227A1

公开(公告)日：2010-08-05

申请号：US12758908

申请日：2010-04-13

Applicant: Takashi KARIYA ,  Akira Mochida

Inventor： Takashi KARIYA ,  Akira Mochida

IPC: H05K1/16 ,  H05K1/00

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed wiring board including a first insulating layer, a second insulating layer formed over the first insulating layer, a capacitor portion including an upper electrode, a lower electrode and a ceramic high dielectric layer formed between the upper electrode and the lower electrode, the capacitor portion sandwiched by the first insulating layer and the second insulating layer, an upper electrode connecting portion passing through the capacitor portion without contact and through the second insulating layer and electrically connected to the upper electrode of the capacitor portion, and a lower electrode connecting portion passing through the second insulating layer and the upper electrode of the capacitor portion without contact and electrically connected to the lower electrode in contact.

Abstract translation: 一种印刷布线板，包括形成在第一绝缘层上的第一绝缘层，第二绝缘层，形成在上电极和下电极之间的上电极，下电极和陶瓷高介电层的电容器部分，电容器 夹在第一绝缘层和第二绝缘层之间的部分，通过电容器部分而没有接触并穿过第二绝缘层并电连接到电容器部分的上电极的上电极连接部分和通过电容器部分的下电极连接部分 通过第二绝缘层和电容器部分的上电极而不接触并与下电极接触地电连接。