公开(公告)号：US20060283625A1

公开(公告)日：2006-12-21

申请号：US11452933

申请日：2006-06-15

Applicant: Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

Inventor： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/0055 ,  H05K3/20 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09563 ,  H05K2201/09863 ,  H05K2203/0796 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.

Abstract translation: 在由板状绝缘膜的一面形成的凹部形成有由布线体和蚀刻阻挡层构成的下层布线的布线基板，在基板绝缘膜的另一面形成有上层布线， 绝缘膜，上层布线和下层布线的布线体通过形成在基板绝缘膜上的通孔相互连接。 通孔为桶形，钟形或波纹管状。

公开(公告)号：US06998291B2

公开(公告)日：2006-02-14

申请号：US10859639

申请日：2004-06-03

Applicant: Shigetsugu Muramatsu ,  Tohru Hizume

Inventor： Shigetsugu Muramatsu ,  Tohru Hizume

IPC: H01L21/44

CPC classification number: H05K3/4644 ,  H05K3/005 ,  H05K3/421 ,  H05K2201/0969 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0108 ,  H05K2203/1189

Abstract: A wiring board is disclosed that includes a first insulating layer, a conductor which is formed on a surface of the first insulating layer, and a second insulating layer which is formed on surfaces of the first insulating layer and of the conductor. The wiring board is provided with a semispherical-shaped or conical-shaped hole-forming portion which penetrates through the second insulating layer into the conductor.

Abstract translation: 公开了一种布线板，其包括第一绝缘层，形成在第一绝缘层的表面上的导体和形成在第一绝缘层和导体的表面上的第二绝缘层。 布线板设置有半球形或圆锥形的孔形成部分，其穿过第二绝缘层进入导体。

公开(公告)号：US20040025333A1

公开(公告)日：2004-02-12

申请号：US10356464

申请日：2003-02-03

Applicant: IBIDEN Co., Ltd.

Inventor： Naohiro Hirose ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H05K003/36 ,  H05K003/20

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 nullm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US06581280B2

公开(公告)日：2003-06-24

申请号：US10197125

申请日：2002-07-17

Applicant: Brian Eugene Curcio ,  Peter Alfred Gruber ,  Frederic Maurer ,  Konstantinos I. Papathomas ,  Mark David Poliks

Inventor： Brian Eugene Curcio ,  Peter Alfred Gruber ,  Frederic Maurer ,  Konstantinos I. Papathomas ,  Mark David Poliks

IPC: H05K330

CPC classification number: H05K3/4069 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/246 ,  H05K3/4602 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0126 ,  H05K2203/085 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/53191 ,  H01L2924/00

Abstract: High aspect ratio (5:1-30:1) and small (5 &mgr;m-125 &mgr;m) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.

Abstract translation: 提供介电基片中的高纵横比（5：1-30：1）和小（5毫米-125毫米）直径的孔，填充有凝固的导电材料，以及使用压力填充这些孔的方法 和真空。 在某些实施例中，孔用导电材料衬里和/或用导电材料封盖。 本发明还考虑由这种材料形成的芯片载体。

公开(公告)号：US06571467B2

公开(公告)日：2003-06-03

申请号：US09358365

申请日：1999-07-21

Applicant: Takayuki Haze ,  Tsuneo Yabuuchi

Inventor： Takayuki Haze ,  Tsuneo Yabuuchi

IPC: H01K310

CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/0035 ,  H05K3/385 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09863 ,  H05K2203/0315 ,  H05K2203/086 ,  H05K2203/087 ,  H05K2203/1157 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158 ,  Y10T29/49165

Abstract: The method for producing a printed wiring board comprising the steps of preparing a conductive substrate, forming an insulating layer on one surface of the said substrate, forming at least one via hole in the insulating layer, thermally curing the insulating layer, and reducing at least one oxidized layer formed on the other conductive surface of the substrate during the curing operation. Alternatively, the thermal cure may be accomplished in an atmosphere (e.g., reducing gas, inactive gas, or mixtures thereof) not conducive to oxide formation on metallized circuit surfaces.

Abstract translation: 一种制造印刷电路板的方法，包括以下步骤：制备导电基板，在所述基板的一个表面上形成绝缘层，在绝缘层中形成至少一个通孔，热固化绝缘层，并至少减少 在固化操作期间在基板的另一导电表面上形成一个氧化层。 或者，热固化可以在不利于金属化电路表面上的氧化物形成的气氛（例如还原气体，惰性气体或其混合物）中完成。

公开(公告)号：US20020175438A1

公开(公告)日：2002-11-28

申请号：US10191378

申请日：2002-07-08

Applicant: International Business Machines Corporation

Inventor： Peter A. Gruber ,  Frederic Maurer ,  Lubomyr Taras Romankiw

IPC: B29C045/14 ,  B29C045/63

CPC classification number: H05K3/4069 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/246 ,  H05K3/4602 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0126 ,  H05K2203/085 ,  H01L2924/00

Abstract: An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 nullm, and high aspect ratios, i.e., at least 5:1 to be filled with an electrically conductive material such as a solder or a conductive polymer such that vias or interconnects can be formed in electronic substrates. The present invention apparatus and method can be advantageously used in fabricating substrates for display panels by forming conductive vias and interconnects for placing a voltage potential on pixel display elements formed on the display panels.

Abstract translation: 公开了一种用于填充电子基板中的高纵横比孔的装置和方法，其可以有利地用于填充具有大于5:1的纵横比的孔。 在装置中，填充板和真空板与连接装置结合使用，使得在两个板之间形成间隙以容纳配备有高纵横比通孔的电子基板。 填充板配备有注入槽，而真空板配备有真空槽，使得当基板夹在其中时，通孔可以从空气排出并同时从液体的底侧和顶侧注入液体 底物。 本发明的新型装置和方法允许填充具有小直径，即小至10um，高纵横比，即至少5:1的通孔，以填充诸如焊料的导电材料 或导电聚合物，使得可以在电子基板中形成通孔或互连。 本发明的装置和方法可以有利地用于制造用于显示面板的基板，通过形成用于在形成在显示面板上的像素显示元件上放置电压电位的导电通孔和互连。

公开(公告)号：US06460247B1

公开(公告)日：2002-10-08

申请号：US09467678

申请日：1999-12-21

Applicant: George D. Gregoire

Inventor： George D. Gregoire

IPC: H01K322

CPC classification number: H05K3/005 ,  H05K1/095 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0014 ,  H05K3/061 ,  H05K3/107 ,  H05K3/1241 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/465 ,  H05K3/4652 ,  H05K2201/0394 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09863 ,  H05K2201/09981 ,  H05K2203/0108 ,  H05K2203/025 ,  H05K2203/041 ,  H05K2203/0746 ,  H05K2203/095 ,  H05K2203/1189 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49167

Abstract: A wiring board construction includes at least one microvia disposed in a base substrate and includes a deep imprinted cup shaped in the top surface thereof. A conductor material is disposed within the recess, and has a portion disposed at the bottom thereof. A conductor disposed at a bottom surface of the substrate opposite to the conductor material bottom portion helps to complete an electrically conductor path through the substrate to help complete an electrically conductive path through the substrate.

Abstract translation: 布线板结构包括设置在基底基板中的至少一个微孔，并且包括形成在其顶表面中的深刻印刷杯。 导体材料设置在凹部内，并且具有设置在其底部的部分。 设置在与导体材料底部相对的基板的底表面处的导体有助于完成穿过基板的导电路径，以帮助完成穿过基板的导电路径。

公开(公告)号：US20020086145A1

公开(公告)日：2002-07-04

申请号：US10024470

申请日：2001-12-21

Inventor： Yoshitaro Yazaki ,  Yoshihiko Shiraishi ,  Koji Kondo ,  Toshikazu Harada ,  Tomohiro Yokochi

IPC: H05K001/03

CPC classification number: H05K3/4632 ,  H05K1/095 ,  H05K3/4069 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0272 ,  H05K2201/0305 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2203/0425 ,  H05K2203/1131 ,  Y10T428/24917

Abstract: A heated and pressed printed wiring board is made by filling via holes formed in layers of insulating film of the wiring board with an interlayer conducting material. The insulating film is stacked with conductor patterns, and each conductor pattern closes a via hole. The interlayer conducting material forms a solid conducting material in the via holes after a heating a pressing procedure. The solid conducting material includes two types of conducting materials. The first type of conducting material includes a metal, and the second type of conductive material includes an alloy formed by the metal and conductor metal of the conductor patterns. The conductor patterns are electrically connected reliably without relying on mere mechanical contact.

Abstract translation: 通过用层间导电材料填充形成在布线板的绝缘膜层上的孔，制成加压印刷线路板。 绝缘膜与导体图案堆叠，并且每个导体图案封闭通孔。 夹层导电材料在加压压制程序后在通孔中形成固体导电材料。 固体导电材料包括两种类型的导电材料。 第一类导电材料包括金属，第二类导电材料包括由导体图案的金属和导体金属形成的合金。 导体图形可靠地电连接，而不依赖于机械接触。

公开(公告)号：US06326559B1

公开(公告)日：2001-12-04

申请号：US09321644

申请日：1999-05-28

Applicant: Hirokazu Yoshioka ,  Norio Yoshida ,  Kenichiro Tanaka

Inventor： Hirokazu Yoshioka ,  Norio Yoshida ,  Kenichiro Tanaka

IPC: H01R909

CPC classification number: H05K3/4652 ,  H05K1/116 ,  H05K3/0035 ,  H05K3/0044 ,  H05K3/0055 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/0969 ,  H05K2201/098 ,  H05K2201/09863 ,  H05K2203/025 ,  H05K2203/0554 ,  H05K2203/0796 ,  H05K2203/095 ,  H05K2203/1383 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158 ,  Y10T29/4916 ,  Y10T29/49165

Abstract: A multilayer printed wiring board is formed with a plurality of conductor layers laminated as a whole with insulating layers interposed, a non-penetrating via hole provided in the insulating layer as bottomed by the conductor layer exposed, a plated layer provided inside the via hole for electric connection between the conductor layers, the via hole being formed to be of a concave curved surface of a radius in a range of 20 to 100 &mgr;m in axially sectioned view at continuing zone of inner periphery to bottom surface of the via hole, whereby the equipotential surfaces occurring upon plating the plated layer are curved along the continuing zone to unify the density of current for rendering the plated layer uniform in the thickness without being thinned at the continuing zone.

Abstract translation: 多层印刷电路板形成有多个导体层，绝缘层整体层叠在一起，绝缘层中设置的非穿透通孔由导体层露出的底部，设置在通孔内部的镀层， 所述导体层之间的电连接，所述通孔形成为在通孔的内周到底面的连续区域的半径在20至100μm的范围内的轴向剖视图中的凹曲面的通孔，由此 在电镀镀层时发生的等电势面沿着连续区域弯曲，以统一电流密度，以使电镀层在厚​​度上均匀，而不会在连续区域变薄。

公开(公告)号：US06225139B1

公开(公告)日：2001-05-01

申请号：US09489829

申请日：2000-01-24

Applicant: Chan Tsung-Wen

Inventor： Chan Tsung-Wen

IPC: H01L2100

CPC classification number: H05K3/0044 ,  H01L25/0753 ,  H01L33/54 ,  H01L33/60 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K1/183 ,  H05K3/0047 ,  H05K3/108 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/09863 ,  H05K2203/0228 ,  H05K2203/025 ,  H05K2203/1476 ,  H01L2924/00014

Abstract: A manufacturing method of an LED of a type of round concave cup with a flat bottom comprises two manufacturing steps. At first stage of concave cup printer circuit board, a printed circuit board is placed in a CNC computer driller, and a special miller cutting is used to drill a concave cup with a round flat bottom at the speed of 12000 to 25000 rps (the depth of the cup must be set). After drilling process is complete, a sand ejector serves to polish the interior of the concave cup. Then, plating with copper ions (which is similar to the penetrating process of guide holes in a general printed circuit board), after plating nickel step and plating metal step are completed, the first stage is finished. In the second stage, a manufacturing method of concave cup type LED is performed. The concave cup type LED in the first stage is processed through the steps of point gluing, fixing chip, baking, bonding, quality controlling, filling glue, and baking again. Then a multiple usage concave cup type LED is fabricated.

Abstract translation: 一种具有平底的圆形凹杯的LED的制造方法包括两个制造步骤。 在凹杯式打印机电路板的第一阶段，将印刷电路板放置在CNC电钻机中，采用特殊的铣刀切割，以12000至25000rps的速度钻出圆底平底的凹杯（深度 的杯子必须设置）。 钻孔过程完成后，喷砂器用于抛光凹杯内部。 然后，在镀镍步骤和电镀金属步骤之后，完成用铜离子（类似于通用印刷电路板中的引导孔的穿透过程）的电镀，第一阶段完成。 在第二阶段中，执行凹杯型LED的制造方法。 第一阶段的凹杯式LED通过点胶，固定芯片，烘烤，粘合，质量控制，灌胶，再烘烤等步骤进行处理。 然后制造多用途凹杯式LED。