公开(公告)号：US08365390B2

公开(公告)日：2013-02-05

申请号：US12843073

申请日：2010-07-26

Applicant: Hua-Lin Lv ,  Kok-Kan Chan ,  Ting-Jian Zou ,  Yu Zou ,  Kai-Gui Wang

Inventor： Hua-Lin Lv ,  Kok-Kan Chan ,  Ting-Jian Zou ,  Yu Zou ,  Kai-Gui Wang

IPC: G01R3/00

CPC classification number: H05K9/0032 ,  H05K1/0259 ,  H05K2201/10371 ,  H05K2201/2018 ,  Y10T29/49002 ,  Y10T29/49007 ,  Y10T29/49135 ,  Y10T29/49719 ,  Y10T29/49833 ,  Y10T29/49904 ,  Y10T83/0476 ,  Y10T83/0505 ,  Y10T83/051 ,  Y10T83/0577

Abstract: A method for affixing adhesive films to a main board is provided. The main board includes a main body and a shield. The shield includes a first shield and a second shield. The second shield defines openings. When the second shield is attached to the main body, components of the main body are confined within the openings, respectively. The method includes: first absorbing a single adhesive film to an electrostatic absorbing film. Then, stamping the electrostatic absorbing film and the single adhesive film to form adhesive films that have substantially the same shape and arrangement as the openings. Next, aligning the electrostatic absorbing film with the first shield and affixing the adhesive films to the first shield. Then, removing the electrostatic absorbing film from the first shield. And, assembling the first shield to the second shield.

Abstract translation: 提供了一种将粘合膜固定在主板上的方法。 主板包括主体和屏蔽。 屏蔽包括第一屏蔽和第二屏蔽。 第二个屏蔽定义了开口。 当第二屏蔽件附接到主体时，主体的部件分别被限制在开口内。 该方法包括：首先将单一粘合剂膜吸收到静电吸收膜上。 然后，将静电吸收膜和单个粘合膜冲压以形成具有与开口基本相同的形状和布置的粘合剂膜。 接下来，将静电吸收膜与第一屏蔽件对准并将粘合剂膜附着到第一屏蔽件。 然后，从第一屏蔽层去除静电吸收膜。 并且，将第一屏蔽件组装到第二屏蔽层。

公开(公告)号：US20120302095A1

公开(公告)日：2012-11-29

申请号：US13455112

申请日：2012-04-24

Applicant: Erik J. Shahoian

Inventor： Erik J. Shahoian

IPC: H01R13/648 ,  H05K3/00

CPC classification number: H01R13/6594 ,  H01R12/7011 ,  H01R12/716 ,  H01R13/6581 ,  H05K1/0219 ,  H05K3/326 ,  H05K3/34 ,  H05K2201/0311 ,  H05K2201/10356 ,  H05K2201/10371 ,  H05K2201/10378 ,  H05K2201/10409 ,  H05K2201/10962 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: High-speed interposer connectors that may be space-efficient, reliable, and may be readily manufactured. One example may provide an interposer connector that may be particularly space-efficient in a vertical direction by using an interposer to form an electrical connection between conductors and a main-logic board or other appropriate substrate. Another example may provide a reliable connection between conductors and a main-logic board by using fasteners to fix an interposer to the main-logic board. Another example may provide connectors that are well-suited to handling high-speed signals by providing a shield to at least partially cover a top of an interposer connector.

Abstract translation: 高速插入器连接器可以节省空间，可靠，并且可以容易地制造。 一个示例可以提供一种插入器连接器，其可以通过使用插入器在导体和主逻辑板或其他适当的衬底之间形成电连接而在垂直方向上特别空间高效。 另一个例子可以通过使用紧固件将插入件固定到主逻辑板来提供导体和主逻辑板之间的可靠连接。 另一个示例可以提供通过提供屏蔽以至少部分地覆盖插入器连接器的顶部而非常适合于处理高速信号的连接器。

公开(公告)号：US20120282807A1

公开(公告)日：2012-11-08

申请号：US13508209

申请日：2010-11-04

Applicant: Kent E. Regnier

Inventor： Kent E. Regnier

IPC: H01R13/646 ,  H05K1/00

CPC classification number: H05K1/0227 ,  H01R13/6466 ,  H01R13/6469 ,  H01R13/6625 ,  H01R13/6633 ,  H01R2107/00 ,  H03H7/09 ,  H05K1/0233 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/115 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/09263 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09663 ,  H05K2201/1006 ,  H05K2201/10189 ,  H05K2201/10371 ,  H05K2203/0307

Abstract: A multi-layer circuit member includes a conductive reference plane with first and second electrically connected regions. A pair of signal conductors are in proximity to the first region and a circuit component is in proximity to the second region. An area of increased impedance exists between the first and second electrically connected regions.

Abstract translation: 多层电路构件包括具有第一和第二电连接区域的导电参考平面。 一对信号导体靠近第一区域，电路部件接近第二区域。 在第一和第二电连接区域之间存在增加阻抗的区域。

公开(公告)号：US20120248630A1

公开(公告)日：2012-10-04

申请号：US13523464

申请日：2012-06-14

Applicant: Shinji MORIYAMA ,  Tomio YAMADA

Inventor： Shinji MORIYAMA ,  Tomio YAMADA

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L23/10 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/50 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L25/165 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H03G3/3042 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/183 ,  H05K3/3405 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10371 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A hybrid integrated circuit device having high mount reliability comprises a module substrate which is a ceramic wiring substrate, a plurality of electronic component parts laid out on the main surface of the module substrate, a plurality of electrode terminals laid out on the rear surface of the module substrate, and a cap which is fixed to the module substrate to cover the main surface of the module substrate. The electrode terminals include ones which are aligned along the edges of the module substrate and power voltage supply terminals which are located inner than these electrode terminals. The electrode terminals aligned along the substrate edges are coated, at least in their portions close to the substrate edge, with a protection film having a thickness of several tens micrometers or less. Connection reinforcing terminals consist of a plurality of divided terminals which are independent of each other, and are ground terminals.

Abstract translation: 具有高安装可靠性的混合集成电路装置包括：模块基板，其是陶瓷布线基板，布置在模块基板的主表面上的多个电子部件部件，布置在模块基板的后表面上的多个电极端子 模块基板和固定到模块基板以覆盖模块基板的主表面的盖。 电极端子包括沿着模块基板的边缘排列的电极端子和位于内部的电源电压端子。 沿着基板边缘排列的电极端子至少在其靠近基板边缘的部分中涂覆有几十微米或更小的厚度的保护膜。 连接加强端子由彼此独立的多个分开的端子组成，并且是接地端子。

公开(公告)号：US08240037B2

公开(公告)日：2012-08-14

申请号：US12591240

申请日：2009-11-13

Applicant: Yoichi Kitamura ,  Minoru Hashimoto ,  Tatsuya Kaneko

Inventor： Yoichi Kitamura ,  Minoru Hashimoto ,  Tatsuya Kaneko

IPC: H05K3/02

CPC classification number: H01L23/04 ,  H01L23/10 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/15165 ,  H01L2924/16153 ,  H01L2924/16315 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K3/341 ,  H05K9/0056 ,  H05K2201/10371 ,  H05K2203/043 ,  H05K2203/0465 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49171 ,  H01L2924/15153 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A process for producing a circuit module including, carried out in this order, preparing a ceramic carrier substrate having ceramic substrate pads for mounting electronic parts, forming solder paste layers on the ceramic substrate pads, forming precoated solder layers by heating the ceramic carrier substrate having the solder paste layers on the ceramic substrate pads to melt the solder paste layers, and then cooling for solidifying the solder, preliminarily fixing stepped lid having protrusions adjacent to a cavity and dents adjacent to the cavity with the protrusions intervening therebetween to the precoated solder layers of the ceramic carrier substrate and joining the stepped lid to the ceramic carrier substrate with solder by placing the ceramic carrier substrate having the stepped lid preliminarily fixed to the precoated solder layers in a reflow furnace.

Abstract translation: 一种电路模块的制造方法，其特征在于，依次制备具有陶瓷基板焊盘的陶瓷载体基板，该陶瓷载体基板具有用于安装电子部件的陶瓷基板焊盘，在陶瓷基板焊盘上形成焊膏层，通过加热陶瓷载体基板形成预涂焊料层， 陶瓷基板焊盘上的焊膏层以熔化焊膏层，然后冷却以使焊料固化，预先将具有邻近腔体的突起和邻近腔体的阶梯盖固定到具有介入其间的突起到预涂焊料层 的陶瓷载体基板，并且将具有阶梯盖的陶瓷载体基板预先固定在预涂焊料层上的陶瓷载体基板放入回流炉中，将台阶盖连接到陶瓷载体基板上。

公开(公告)号：US08222541B2

公开(公告)日：2012-07-17

申请号：US12487784

申请日：2009-06-19

Applicant: Benjamin Jon Vander Ploeg ,  Meredith Marie Steenwyk ,  Danny Weldon Coxon ,  Paul James Horton ,  John Jay Streyle

Inventor： Benjamin Jon Vander Ploeg ,  Meredith Marie Steenwyk ,  Danny Weldon Coxon ,  Paul James Horton ,  John Jay Streyle

IPC: H05K9/00

CPC classification number: H05K9/0045 ,  H02G13/00 ,  H05K7/20545 ,  H05K9/0062 ,  H05K9/0084 ,  H05K2201/10371

Abstract: An avionics chassis comprises a composite housing, a radio wave shield, and a lightning strike conductive path, wherein the radio wave shield attenuates electromagnetic interference entering and leaving the housing, and the lightning strike conductive path directs the current from a lightning strike away from an interior of the housing.

Abstract translation: 航空电子底盘包括复合壳体，无线电波屏蔽和雷击导电路径，其中无线电波屏蔽减弱进入和离开壳体的电磁干扰，并且雷击导电路径将电流从雷击远离 房屋内部。

公开(公告)号：US20120127688A1

公开(公告)日：2012-05-24

申请号：US12969479

申请日：2010-12-15

Applicant: SONG-LING YANG

Inventor： SONG-LING YANG

IPC: H05K9/00

CPC classification number: H05K5/0286 ,  H05K1/0218 ,  H05K1/141 ,  H05K9/0007 ,  H05K2201/10159 ,  H05K2201/10371

Abstract: A shield case is configured for supporting a memory card. The shield case includes a recessed portion, and a first edge, a second edge, and a third edge arranged around the recessed portion. The first edge forms a first support plate. The second edge forms a second support plate. The first support plate and the second support plate cooperatively support the memory card.

Abstract translation: 屏蔽盒配置为支持存储卡。 屏蔽壳包括凹部，第一边缘，第二边缘和围绕凹部布置的第三边缘。 第一边缘形成第一支撑板。 第二边缘形成第二支撑板。 第一支撑板和第二支撑板协作地支撑存储卡。

公开(公告)号：US20120099286A1

公开(公告)日：2012-04-26

申请号：US13382507

申请日：2011-02-04

Applicant: Suguru Suzuki ,  Tsutomu Abe

Inventor： Suguru Suzuki ,  Tsutomu Abe

IPC: H05K7/12

CPC classification number: H01L23/04 ,  H01L2924/0002 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/10371 ,  H05K2201/10598 ,  Y02P70/613 ,  H01L2924/00

Abstract: To provide an electronic apparatus that can prevent electronic components from being separated from a circuit board.The electronic apparatus 10 includes a circuit board 25, an electronic component 28 mounted on the circuit board 25 via solder balls 26, a cover member 30 mounted on the circuit board 25 so as to surround and cover the electronic component 28 and a convex portion 34 provided at the top plate portion 32 of the cover member 30. The convex portion 34 is deformable to a second state protruding on the circuit board 25 side from a first state protruding in the direction opposite to the circuit board 25 side. When the convex portion 34 is deformed in the second state, the convex portion 34 thus deformed can be made in contact with the top portion 28a of the electronic component 28.

Abstract translation: 提供可防止电子部件与电路板分离的电子设备。 电子设备10包括电路板25，通过焊球26安装在电路板25上的电子部件28，安装在电路板25上以覆盖电子部件28的盖部件30和凸部34 设置在盖构件30的顶板部32处。凸部34可以从与电路板25侧相反的方向突出的第一状态而变形到突出在电路板25侧的第二状态。 当凸部34在第二状态下变形时，可以使如此变形的凸部34与电子部件28的顶部28a接触。

公开(公告)号：US08154876B2

公开(公告)日：2012-04-10

申请号：US12863179

申请日：2008-10-16

Applicant: Shotaro Nagaike

Inventor： Shotaro Nagaike

IPC: H05K1/00

CPC classification number: H05K1/181 ,  G02F1/13452 ,  H01L23/04 ,  H01L23/24 ,  H01L2924/0002 ,  H05K1/0218 ,  H05K3/284 ,  H05K2201/0382 ,  H05K2201/10128 ,  H05K2201/10371 ,  H05K2201/10515 ,  H05K2201/2018 ,  H05K2203/1316 ,  Y02P70/611 ,  H01L2924/00

Abstract: A circuit board module includes: a board having a mounting surface; an electronic component mounted on the mounting surface; a frame which is mounted on the mounting surface so as to surround the electronic component; a resin portion which is provided inside the frame and closely contacts the electronic component, the mounting surface, and the frame; and a lid portion which covers the electronic component, and which is connected to the frame. The lid portion includes a flat portion which is provided at a region containing an area corresponding to the electronic component not covered with the resin portion and which protrudes outward more than the other regions.

Abstract translation: 电路板模块包括：具有安装表面的板; 安装在安装表面上的电子部件; 框架，其安装在安装表面上以包围电子部件; 树脂部分，设置在框架内部并紧密接触电子部件，安装表面和框架; 以及覆盖电子部件并与框架连接的盖部。 盖部包括平坦部，该平坦部设置在包含与未被树脂部覆盖的电子部件相对应的区域的区域，并且比其他区域向外突出。

公开(公告)号：US08018309B2

公开(公告)日：2011-09-13

申请号：US12256949

申请日：2008-10-23

Applicant: Wen-Hung Huang ,  Ming-Chu Kuo ,  Hsien Tsung Lin

Inventor： Wen-Hung Huang ,  Ming-Chu Kuo ,  Hsien Tsung Lin

IPC: H01F38/12

CPC classification number: H05K1/18 ,  H01L2924/0002 ,  H05K2201/086 ,  H05K2201/1003 ,  H05K2201/10371 ,  Y10T29/4902 ,  H01L2924/00

Abstract: For improving efficiency of a power device having an exposed surface capable of radiating energy, a shielding layer is disposed in between the exposed surface and a conductive layer. The shielding layer causes at least a portion of the energy to be directed back into the power device, thereby substantially preventing the energy from inducing eddy currents in the conductive layer. The conductive layer is fabricated from a metal foil for compliance with electromagnetic energy leakage regulations.

Abstract translation: 为了提高具有能够辐射能量的暴露表面的功率器件的效率，在暴露表面和导电层之间设置屏蔽层。 屏蔽层使能量的至少一部分被引导回功率器件，从而基本上防止能量在导电层中引起涡流。 导电层由金属箔制成，以符合电磁能量泄漏规定。