公开(公告)号：US20080010819A1

公开(公告)日：2008-01-17

申请号：US11775294

申请日：2007-07-10

Applicant: Hidehiro NAKAMURA ,  Akishi Nakaso ,  Shigeharu Arike ,  Fumio Inoue ,  Tetsuya Enomoto ,  Norio Moriike ,  Kousuke Hiroki

Inventor： Hidehiro NAKAMURA ,  Akishi Nakaso ,  Shigeharu Arike ,  Fumio Inoue ,  Tetsuya Enomoto ,  Norio Moriike ,  Kousuke Hiroki

IPC: H05K3/30

CPC classification number: H05K3/4617 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/244 ,  H05K3/4038 ,  H05K3/4623 ,  H05K3/4632 ,  H05K3/4647 ,  H05K2201/0141 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/0152 ,  H05K2203/0156 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The present invention provides a connection board that is formed by an insulating resin composition layer made of one layer or two or more layers and a connection conductor that is formed so as to pass through the insulating resin composition layer in its thickness direction at a position where a conductor circuit is connected, and a multi-layer wiring board, a substrate for semiconductor package and a semiconductor package using the connection board, and methods for manufacturing them.

Abstract translation: 本发明提供一种由一层或两层以上的绝缘树脂组合物层形成的连接板，以及形成为在其绝缘树脂组合物层的厚度方向上形成的连接导体， 连接导体电路，并且使用多层布线板，半导体封装用基板和使用该连接基板的半导体封装，以及其制造方法。

公开(公告)号：US07284320B2

公开(公告)日：2007-10-23

申请号：US11119820

申请日：2005-05-03

Applicant: Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

Inventor： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC: H05K3/36

CPC classification number: H05K1/0221 ,  H05K3/062 ,  H05K3/4647 ,  H05K2201/0361 ,  H05K2201/09254 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A multilayer printed wiring board having a wiring lead-out port has a signal circuit conductor perfectly covered by an earth circuit in its inside and a wiring lead-out port. A signal circuit conductor having a branch pattern is preferable. A large number of products can be easily manufactured with good size reproducibility. The multilayer printed wiring board is manufactured by selectively etching the copper of a cladding sheet manufactured by bonding a copper foil to a nickel foil with 0.1-3% reduction and forming a signal circuit conductor covered by an earth circuit and the wiring lead-out port.

Abstract translation: 具有布线引出口的多层印刷布线板具有完全被其内部的接地电路覆盖的信号电路导体和布线引出口。 具有分支图案的信号电路导体是优选的。 可以容易地制造大量的产品，具有良好的尺寸再现性。 多层印刷线路板是通过选择性地蚀刻通过将铜箔接合到镍箔上而制造的包层片的铜，其中，铜箔的折射率减少了0.1-3％，并且形成了由接地电路覆盖的信号电路导体和布线引出端口 。

公开(公告)号：US07124503B1

公开(公告)日：2006-10-24

申请号：US09655893

申请日：2000-09-06

Applicant: Delin Li ,  Jay D. Baker ,  Myron Lemecha

Inventor： Delin Li ,  Jay D. Baker ,  Myron Lemecha

IPC: H01K3/10

CPC classification number: H05K3/4038 ,  H05K3/062 ,  H05K3/4084 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2203/0361 ,  H05K2203/063 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: A method for forming connections within a multi-layer electronic circuit board 10 which allows for the selective, efficient, and reliable interconnection between at least one conductive layer and a ground plane or layer.

Abstract translation: 一种用于在多层电子电路板10内形成连接的方法，其允许至少一个导电层与接地平面或层之间的选择性，有效和可靠的互连。

公开(公告)号：US20060163329A1

公开(公告)日：2006-07-27

申请号：US11387949

申请日：2006-03-24

Applicant: Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

Inventor： Kinji Saijo ,  Kazuo Yoshida ,  Hiroaki Okamoto ,  Shinji Ohsawa

IPC: B23K31/02

CPC classification number: H05K3/025 ,  B23K20/04 ,  B32B15/01 ,  H05K3/062 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2203/0384 ,  H05K2203/068 ,  Y10T428/12 ,  Y10T428/12438 ,  Y10T428/12896 ,  Y10T428/12979

Abstract: An adhesive-free multilayered metal laminate having a given thickness which is obtained by bonding a metal sheet having a thin metal film on a surface thereof to a metal foil without using an adhesive; and a process for continuously producing the laminate. The process comprises the steps of; setting a metal sheet on a reel for metal sheet unwinding; setting a metal foil on a reel for metal foil unwinding; unwinding the metal sheet from the metal sheet-unwinding reel and activating a surface of the metal sheet to thereby form a first thin metal film on the metal sheet surface; unwinding the metal foil from the metal foil-unwinding reel and activating a surface of the metal foil to thereby form a second thin metal film on the metal foil surface; and press-bonding the activated surface of the first thin metal film to that of the second thin metal film so that the first thin metal film formed on the metal sheet is in contact with the second thin metal film formed on the metal foil.

Abstract translation: 具有给定厚度的无粘合剂的多层金属层压体，其通过在其表面上将不具有金属薄膜的金属薄片接合而不使用粘合剂而获得; 以及连续制造层压体的方法。 该方法包括以下步骤： 将金属板放在卷轴上用于金属板退绕; 在金属箔退绕卷轴上设置金属箔; 从金属板退绕卷轴退绕金属片并激活金属片的表面，从而在金属片表面上形成第一薄金属膜; 从金属箔退绕卷轴退绕金属箔并激活金属箔的表面，从而在金属箔表面上形成第二薄金属膜; 并且将第一薄金属膜的活化表面压接到第二薄金属膜的活化表面，使得形成在金属片上的第一薄金属膜与形成在金属箔上的第二薄金属膜接触。

公开(公告)号：US20060011382A1

公开(公告)日：2006-01-19

申请号：US10527169

申请日：2004-04-05

Applicant: Yoichi Miura

Inventor： Yoichi Miura

IPC: H05K1/03

CPC classification number: H01L24/16 ,  H01L21/4857 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K3/064 ,  H05K3/205 ,  H05K3/243 ,  H05K3/4007 ,  H05K3/423 ,  H05K3/4682 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2203/0384 ,  H05K2203/0571 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/0401

Abstract: A wiring board according to the present invention includes a wiring part formed of one or more layers, a first terminal area disposed on one side of the wiring part in a projecting manner, and a second terminal area disposed on the other side of the wiring part. A resist having an opening for a first terminal area is formed on a surface of a composite made of a plurality of metal layers. A part of a first metal layer of the composite is etched through the opening for a first terminal area to form a hole. The hole is subjected to an electroless plating through the opening of the resist. Thus, the hole is filled with an electroplated layer to form a first terminal area. Then, the resist is removed from the composite, and a wiring layer is formed thereon. Subsequently, a solder resist having an opening for a second terminal area is disposed on the wiring layer. The opening of a second terminal area of the solder resist is subjected to an electroplating so as to form a second terminal area. Removing remaining parts of the composite, a wiring board is completed.

Abstract translation: 根据本发明的布线板包括由一层或多层形成的布线部分，以布置方式布置在布线部分的一侧上的第一端子区域和布置在布线部分的另一侧上的第二端子区域 。 在由多个金属层制成的复合体的表面上形成具有用于第一端子区域的开口的抗蚀剂。 复合材料的第一金属层的一部分通过开口蚀刻以形成第一端子区域以形成孔。 通过抗蚀剂的开口对该孔进行化学镀。 因此，孔填充有电镀层以形成第一末端区域。 然后，将抗蚀剂从复合材料上除去，并在其上形成布线层。 随后，在布线层上设置具有用于第二端子区的开口的阻焊剂。 对阻焊剂的第二端子区域的开口进行电镀以形成第二端子区域。 拆除复合材料的剩余部分，完成接线板。

公开(公告)号：US20050167794A1

公开(公告)日：2005-08-04

申请号：US10510591

申请日：2003-04-08

Applicant: Hendrik Kloen ,  Gerardus Henricus Franciscus Steenbruggen ,  Peter Wilhelmus Van De Water

Inventor： Hendrik Kloen ,  Gerardus Henricus Franciscus Steenbruggen ,  Peter Wilhelmus Van De Water

IPC: H01L23/12 ,  H01L21/48 ,  H01L23/31 ,  H05K1/18 ,  H05K3/06 ,  H01L23/02

CPC classification number: H05K3/062 ,  H01L21/4821 ,  H01L21/4828 ,  H01L21/4832 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/185 ,  H05K2201/0361 ,  H05K2203/0384 ,  H05K2203/1469 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The semiconductor device (10) comprises a carrier (30) and a semiconductor element (20), such as an integrated circuit. The carrier (30) is provided with apertures (15), thereby defining connecting conductors (31-33) having side faces (3). Notches (16) are present in the side faces (3). The semiconductor element (20) is enclosed in an encapsulation (40) that extends into the notches (16) in the carrier (30). As a result, the encapsulation (40) is mechanically anchored in the carrier (30). The semiconductor device (10) can be made in a process wherein, after the encapsulating step, no lithographic steps are necessary.

Abstract translation: 半导体器件（10）包括载体（30）和诸如集成电路的半导体元件（20）。 载体（30）设置有孔（15），从而限定具有侧面（3）的连接导体（31-33）。 缺口（16）存在于侧面（3）中。 半导体元件（20）被封装在延伸到载体（30）中的凹口（16）中的封装（40）中。 结果，封装（40）机械地锚定在载体（30）中。 半导体器件（10）可以在其中在封装步骤之后不需要光刻步骤的过程中制成。

公开(公告)号：US20040005772A1

公开(公告)日：2004-01-08

申请号：US10434410

申请日：2003-05-08

Inventor： Chang-hee Choi ,  Sang-yum Kim ,  Cha-Je Cho

IPC: H01L021/44

CPC classification number: H05K3/062 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0367 ,  H05K2203/0384 ,  H05K2203/068 ,  H05K2203/085 ,  H05K2203/095

Abstract: The present invention discloses a method of producing a copper foil used for a printed circuit board (PCB). In this method of producing a copper foil for a solder bump, metal surfaces are activated by plasma or primer treatment and finally are clad using a pressing means in a process of cladding a copper foil constituting a bump and a copper foil forming a circuit. Therefore, it is possible to produce a copper foil for a PCB with excellent adhesion strength without carrying out any bump forming process.

Abstract translation: 本发明公开了一种用于印刷电路板（PCB）的铜箔的制造方法。 在制造焊料凸块用铜箔的方法中，金属表面通过等离子体或底漆处理而被激活，最后在构成凸块的铜箔和形成电路的铜箔的过程中使用加压装置进行包覆。 因此，可以在不进行任何凸块形成工艺的情况下制造具有优异的粘合强度的用于PCB的铜箔。

公开(公告)号：US20030213767A1

公开(公告)日：2003-11-20

申请号：US10426326

申请日：2003-04-29

Inventor： Robert Edward Belke JR. ,  Vivek A. Jairazbhoy ,  Thomas B. Krautheim ,  William F. Quitty JR.

IPC: H01B013/00

CPC classification number: H05K3/44 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/09554 ,  H05K2201/09745 ,  H05K2201/0979 ,  H05K2201/09854 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49156

Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26 which have improved solder-wetting characteristics.

Abstract translation: 具有选择性地形成的具有改善的焊料润湿特性的孔或腔26的多层电子电路板设计10。

公开(公告)号：US06623651B2

公开(公告)日：2003-09-23

申请号：US09815364

申请日：2001-03-22

Applicant: Bharat Patel ,  Jay D. Baker ,  Mohan Paruchuri

Inventor： Bharat Patel ,  Jay D. Baker ,  Mohan Paruchuri

IPC: H01B1300

CPC classification number: H05K3/44 ,  H05K3/0047 ,  H05K3/06 ,  H05K3/062 ,  H05K3/064 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4611 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4647 ,  H05K3/4652 ,  H05K3/4685 ,  H05K2201/0305 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/0379 ,  H05K2201/0397 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2203/0369 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1152 ,  H05K2203/1184 ,  H05K2203/1536

Abstract: A method 10 for making a multi-layer electronic circuit board 98 having at least one electrically conductive protuberance 15 which forms a “via” and which traverses through the various layers of the electric circuit board 98, and further having at least one interconnection portion 102 which supports a wide variety of components and interconnection assemblies.

Abstract translation: 一种用于制造多层电子电路板98的方法10，该多层电子电路板98具有形成“通孔”的至少一个导电突起15，并穿过电路板98的各个层，并且还具有至少一个互连部分102 其支持各种组件和互连组件。

公开(公告)号：US06612025B1

公开(公告)日：2003-09-02

申请号：US09656043

申请日：2000-09-06

Applicant: Zhong-You (Joe) Shi ,  Lakhi N. Goenka ,  Andrew Z. Glevatsky

Inventor： Zhong-You (Joe) Shi ,  Lakhi N. Goenka ,  Andrew Z. Glevatsky

IPC: H05K334

CPC classification number: H05K3/4038 ,  H05K3/062 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0305 ,  H05K2201/0361 ,  H05K2201/0373 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09581 ,  H05K2203/1438 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167

Abstract: A method for forming connections within a multi-layer electronic circuit board 10. The method includes forming an aperture within the circuit board and selectively coating the interior surface of the aperture with a polar solder mask material that is effective to bond with solder that is selectively inserted into the aperture, thereby retaining the solder within the aperture and improving the electrical connection provided by the solder.

Abstract translation: 一种用于在多层电子电路板10内形成连接的方法。该方法包括在电路板内形成孔，并用极性焊料掩模材料选择性地涂覆孔的内表面，极性焊料掩模材料有效地与选择性地焊接 插入到孔中，从而将焊料保持在孔内并改善由焊料提供的电连接。