公开(公告)号：US20090183904A1

公开(公告)日：2009-07-23

申请号：US12409670

申请日：2009-03-24

Applicant: Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K1/00

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: A multilayer printed circuit board including a substrate board and a built-up structure formed over the substrate board. The built-up structure includes conductor circuits and resin insulating layers. The built-up structure has via holes interconnecting the conductor circuits through one or more resin insulating layers. The via holes are filled up with plating, and the resin insulating layers is formed of a cycloolefin resin.

Abstract translation: 一种多层印刷电路板，包括形成在基板上的基板和叠层结构。 组合结构包括导体电路和树脂绝缘层。 积层结构具有通过一个或多个树脂绝缘层将导体电路互连的通孔。 通孔填充有电镀，树脂绝缘层由环烯烃树脂形成。

公开(公告)号：US07540082B2

公开(公告)日：2009-06-02

申请号：US10595127

申请日：2004-08-19

Applicant: Kohichi Ohsumi ,  Kaoru Kobayashi

Inventor： Kohichi Ohsumi ,  Kaoru Kobayashi

IPC: H01K3/10 ,  H05K1/03

CPC classification number: H05K3/426 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/1461 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A printed wiring board having a through hole conductor formed on the surface of a through hole formed in a copper-clad laminate board, and on the surface of the copper-clad laminate board 1 in the vicinity of an opening of the through hole. The through hole conductor is filled with a positive photosensitive resin. A capped conductor is formed on the positive photosensitive resin and is coupled to the through hole conductor. Further, a circuit pattern is formed on the surface of the copper-clad laminate board. An insulating layer is formed on the surface of the copper-clad laminate board, capped conductor, and the circuit pattern, and formed with a via hole extending from the surface of the insulating layer to the capped conductor. A via conductor is formed inside the via hole and on the surface of the insulating layer in the vicinity of an opening of the via hole.

Abstract translation: 一种印刷电路板，具有形成在覆铜层压板上形成的通孔的表面上的通孔导体，以及覆铜层压板1的通孔附近的表面。 通孔导体填充有正性感光性树脂。 在正性感光性树脂上形成有帽状导体，并与通孔导体连接。 此外，在覆铜层压板的表面上形成电路图案。 在覆铜层压板，封盖导体和电路图案的表面上形成绝缘层，并且形成有从绝缘层的表面延伸到封盖导体的通孔。 通孔导体形成在通孔内部以及在通孔的开口附近的绝缘层的表面上。

公开(公告)号：US07507913B2

公开(公告)日：2009-03-24

申请号：US10522335

申请日：2003-03-24

Applicant: Yasushi Inagaki ,  Katsuyuki Sano

Inventor： Yasushi Inagaki ,  Katsuyuki Sano

IPC: H05K1/16

CPC classification number: H05K1/09 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0237 ,  H05K1/056 ,  H05K1/183 ,  H05K1/185 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/0347 ,  H05K2201/0352 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09809 ,  H01L2224/05599

Abstract: A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer 34P on a core substrate 30 is formed to have a thickness of 30 μm and a conductor circuit 58 on an interlayer resin insulating layer 50 is formed to have a thickness of 15 μm. By making the conductor layer 34P thick, it is possible to increase a volume of the conductor itself and decrease resistance. Further, by employing the conductor layer 34 as a power supply layer, it is possible to improve a capability of supplying power to the IC chip.

Abstract translation: 即使IC芯片处于高频范围，特别是具有频率超过3GHz的IC芯片，也不会出现故障或误差的封装基板。 芯基板30上的导体层34P形成为具有30μm的厚度，层间树脂绝缘层50上的导体电路58形成为15μm的厚度。 通过使导体层34P变厚，可以增加导体本身的体积并降低电阻。 此外，通过使用导体层34作为电源层，可以提高向IC芯片供电的能力。

公开(公告)号：US07490402B2

公开(公告)日：2009-02-17

申请号：US11902758

申请日：2007-09-25

Applicant: Deepak K. Pai ,  Ronald R. Denny

Inventor： Deepak K. Pai ,  Ronald R. Denny

IPC: H05K3/36 ,  B23K31/00

CPC classification number: H05K3/462 ,  H01L2224/05548 ,  H05K3/28 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/0949 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates then may be pressed together to mechanically bond the two or more substrates via the adhesive films. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.

Abstract translation: 本发明提供了用于层叠和互连多个基板以形成多层封装或其他电路部件的多种技术。 可以在两个或更多个基板中的至少一个的导电焊盘上形成焊料凸块。 焊料凸块优选地由焊膏应用于导电焊盘形成。 粘合剂膜可以位于具有导电焊盘的基板的表面之间，其中粘合剂膜包括基本上位于导电焊盘上方的孔，使得导电焊盘和/或焊料凸块通过孔彼此面对。 然后可以将两个或更多个基底压在一起以经由粘合剂膜机械地粘合两个或更多个基底。 可以在叠层期间或之后回流焊料凸块以产生焊接段，该焊料段通过粘合剂膜中的孔提供导电焊盘之间的电连接。

公开(公告)号：US20090019693A1

公开(公告)日：2009-01-22

申请号：US12237955

申请日：2008-09-25

Applicant: Masaru Takada ,  Hiroyuki Kobayashi ,  Kenji Chihara ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Mitsuhiro Kondo

Inventor： Masaru Takada ,  Hiroyuki Kobayashi ,  Kenji Chihara ,  Hisashi Minoura ,  Kiyotaka Tsukada ,  Mitsuhiro Kondo

IPC: H05K3/10

CPC classification number: H01L24/32 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/112 ,  H05K1/116 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/027 ,  H05K3/242 ,  H05K3/243 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4038 ,  H05K3/421 ,  H05K3/428 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09381 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/0959 ,  H05K2201/09781 ,  H05K2203/0554 ,  H05K2203/0571 ,  H05K2203/107 ,  H05K2203/175 ,  Y10S428/901 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.

Abstract translation: 在具有导体电路（6）的绝缘板（7）的表面上印刷包括热固性树脂的阻焊剂。 然后将阻焊剂热固化以形成具有低热膨胀系数的绝缘膜（1）。 然后将激光束（2）施加到要形成开口的绝缘膜的部分，以烧掉用于形成开口（10）的相同部分，由此导体电路（6）暴露。 该开口可以通过在其内表面上形成金属电镀膜而形成为导电孔。 优选地，形成外部连接垫以覆盖开口。 通过使用在电镀完成后优选用激光束切断的电镀铅来形成金属涂膜。

公开(公告)号：US07479014B2

公开(公告)日：2009-01-20

申请号：US10531494

申请日：2003-05-13

Applicant: Gareth G. Hougham ,  Keith E. Fogel ,  Paul A. Lauro ,  Joseph Zinter, Jr.

Inventor： Gareth G. Hougham ,  Keith E. Fogel ,  Paul A. Lauro ,  Joseph Zinter, Jr.

IPC: H01R12/00

CPC classification number: H01R13/2414 ,  H01R12/7082 ,  H01R12/714 ,  H01R43/007 ,  H05K3/4007 ,  H05K3/42 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/0959 ,  H05K2201/10378 ,  Y10S439/931 ,  Y10T442/109 ,  Y10T442/172

Abstract: Methods for fabricating Land Grid Array (LGA) interposer contacts that are both conducting and elastic. Also provided are LGA interposer contacts as produced by the inventive methods. Provided is LGA type which utilizes a pure unfilled elastomer button core that is covered with an electrically-conductive material that is continuous from the top surface to the bottom surface of the button structure. In order to obviate the disadvantages and drawbacks which are presently encountered in the technology pertaining to the fabrication and structure of land grid arrays using electrically-conductive interposer contacts, there is provided both methods and structure for molding elastomer buttons into premetallized LGA carrier sheets, and wherein the non-conductive elastomer buttons are surface-metallized in order to convert them into conductive electrical contacts.

Abstract translation: 制造导电和弹性的Land Grid Array（LGA）插入器触点的方法。 还提供了通过本发明的方法制造的LGA插入器触点。 提供了LGA型，其利用由从按钮结构的顶表面到底表面连续的导电材料覆盖的纯未填充弹性体按钮芯。 为了消除在使用导电插入器触点的地面栅格阵列的制造和结构的技术中目前遇到的缺点和缺点，提供了用于将弹性体按钮模制成预金属化的LGA载体片的方法和结构，以及 其中非导电弹性体按钮被表面金属化以便将它们转换为导电电触点。

公开(公告)号：US07438969B2

公开(公告)日：2008-10-21

申请号：US10615067

申请日：2003-07-09

Applicant: Toshifumi Kojima ,  Makoto Wakazono ,  Toshikatu Takada

Inventor： Toshifumi Kojima ,  Makoto Wakazono ,  Toshikatu Takada

IPC: B32B3/00 ,  H05K1/03

CPC classification number: H05K3/0094 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/0959 ,  Y10S428/901 ,  Y10T156/10 ,  Y10T428/24893 ,  Y10T428/24917 ,  Y10T428/25

Abstract: A solvent-free filling material comprising a filler, a thermosetting resin, a curing agent, and a curing catalyst, wherein the thermosetting resin is an epoxy resin, and the curing agent is a dicyandiamide curing agent; a multilayer printed wiring board comprising a substrate, a through-hole, the filling material filling the through-hole, and a conductor layer formed on an exposed surface of the filling material in the through-hole; and a process for producing the multilayer printed wiring board.

Abstract translation: 一种无溶剂填充材料，包括填料，热固性树脂，固化剂和固化催化剂，其中热固性树脂是环氧树脂，固化剂是双氰胺固化剂; 包括基板，通孔，填充通孔的填充材料和形成在通孔中的填充材料的暴露表面上的导体层的多层印刷线路板; 以及多层印刷布线板的制造方法。

公开(公告)号：US20080189943A1

公开(公告)日：2008-08-14

申请号：US12098582

申请日：2008-04-07

Applicant: Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H05K3/42 ,  H01L21/306

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口部20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US20080173473A1

公开(公告)日：2008-07-24

申请号：US11875486

申请日：2007-10-19

Applicant: Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

Inventor： Naohiro HIROSE ,  Kouta Noda ,  Hiroshi Segawa ,  Honjin En ,  Kiyotaka Tsukada ,  Naoto Ishida ,  Kouji Asano ,  Atsushi Shouda

IPC: H01R12/04

CPC classification number: H05K3/4652 ,  B23K26/389 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0201 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/28 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0358 ,  H05K2201/062 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2201/09863 ,  H05K2201/09881 ,  H05K2203/0307 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0773 ,  H05K2203/107 ,  H05K2203/121 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract translation: 通过激光束在树脂20中形成开口，从而形成通孔。 此时，通过进行蚀刻来降低导热率的铜箔22的厚度（3μm）被用作保形掩模。 因此，如果脉冲形激光束的照射次数减少，则可以在树脂20中形成开口部20a。 因此，可以防止形成层间绝缘树脂层的树脂20的底切的发生。 因此，可以提高通孔连接的可靠性。

公开(公告)号：US20080121420A1

公开(公告)日：2008-05-29

申请号：US11557711

申请日：2006-11-08

Applicant: Jaroslaw A. Magera ,  Gregory J. Dunn ,  Kathy D. Leganski

Inventor： Jaroslaw A. Magera ,  Gregory J. Dunn ,  Kathy D. Leganski

IPC: H05K1/00

CPC classification number: H05K3/427 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/0047 ,  H05K3/4602 ,  H05K2201/0394 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/097 ,  H05K2201/09845 ,  H05K2203/1476

Abstract: Closed vias are formed in a multilayer printed circuit board by laminating a dielectric layer to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer. Resin from one dielectric layer fills the cavities of approximately one half of the closed vias, and resin from the other dielectric layer fills the circular cavities of the remainder of the closed vias. The total amount of resin migrated from each of the dielectric layers into the closed via cavities is approximately equal.

Abstract translation: 通过在每侧具有金属层的中心芯的一侧层叠电介质层，在多层印刷电路板中形成封闭的通孔。 第二电介质层被层压到中心芯的另一侧。 已经通过部分地穿过但不完全穿透中心芯而形成中心芯上的闭合的通孔，然后通过直径小得多的孔从相对侧完成通孔，以形成完全穿透中心芯的通路 从一边到另一边。 然后通孔用金属电镀以基本上闭合较小的孔。 闭合通孔的大约一半被定位成使得闭合孔面对一个电介质层，并且其余的封闭通孔被定位成使得闭合孔面对另一介电层。 来自一个介电层的树脂填充了大约一半的封闭通孔的空腔，而另一个介电层的树脂填充了其余的封闭通孔的圆形空腔。 从每个介电层迁移到封闭通孔中的树脂的总量近似相等。