公开(公告)号：US20090027865A1

公开(公告)日：2009-01-29

申请号：US11815539

申请日：2006-01-06

Applicant: Junya Tsuji

Inventor： Junya Tsuji

IPC: H01R9/00 ,  H05K3/34

CPC classification number: H05K3/3415 ,  H05K2201/10189 ,  H05K2201/10477 ,  H05K2201/1084 ,  H05K2203/1572 ,  H05K2203/159 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A surface mount electrical component comprising a first soldering interface having a fist soldering interface total solder path length of sufficient length such that a first melted solder fillet substantially disposed along the first soldering interface total solder path length produces an first upward moment greater than a first downward moment produced by the weight of the surface mount electrical component about the first soldering interface, and a second soldering interface comprising a second soldering interface total solder path length such that a surface tension produced by a second melted solder fillet substantially disposed along the second soldering interface total solder path length produces a second upward moment greater than a second downward moment produced by the weight of the surface mount electrical component about the second soldering interface is disclosed.

Abstract translation: 表面安装电子部件包括第一焊接界面，其具有第一焊接界面，总焊锡路径长度足够长，使得沿着第一焊接界面总焊料路径长度基本设置的第一熔融焊接圆角产生大于第一向下 由第一焊接界面周围的表面安装电气部件的重量产生的力矩，以及包括第二焊接界面总焊料路径长度的第二焊接界面，使得由第二焊接焊丝产生的表面张力基本上沿第二焊接界面 总焊料路径长度产生大于由围绕第二焊接界面的表面安装电气部件的重量产生的第二向下力矩的第二向上力矩。

公开(公告)号：US20080106876A1

公开(公告)日：2008-05-08

申请号：US11934616

申请日：2007-11-02

Applicant: Hyun-Seok CHOI ,  Hyung-Mo HWANG ,  Yong-Hyun KIM ,  Hyo-Jae BANG ,  Su-Yong AN

Inventor： Hyun-Seok CHOI ,  Hyung-Mo HWANG ,  Yong-Hyun KIM ,  Hyo-Jae BANG ,  Su-Yong AN

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K3/3442 ,  H05K1/111 ,  H05K1/181 ,  H05K3/06 ,  H05K3/244 ,  H05K2201/09736 ,  H05K2201/10477 ,  H05K2201/10636 ,  H05K2203/0369 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49133

Abstract: A semiconductor memory module having a reverse mounted chip resistor, and a method of fabricating the same are provided. By reverse mounting the chip resistor on the semiconductor memory module, the resistive material is protected, thereby preventing open circuits caused by damage to the resistive material. Also, a chip-resistor connection pad of a module substrate is formed to extend higher from the module substrate than other connection pads connected to other elements. Thus, the resistive material of the chip resistor does not contact the module substrate, thereby preventing poor alignment and defective connections.

Abstract translation: 提供了具有反向安装的芯片电阻器的半导体存储器模块及其制造方法。 通过将芯片电阻器反向安装在半导体存储器模块上，电阻材料被保护，从而防止由电阻材料损坏引起的开路。 此外，模块基板的芯片电阻器连接焊盘形成为从与其它元件连接的其它连接焊盘相比，从模块基板延伸得更高。 因此，片式电阻器的电阻材料不与模块基板接触，从而防止对准不良和连接不良。

公开(公告)号：US20080080142A1

公开(公告)日：2008-04-03

申请号：US11763630

申请日：2007-06-15

Applicant: Nan-Cheng Chen ,  Chun-Wei Chang ,  Chao-Wei Tseng

Inventor： Nan-Cheng Chen ,  Chun-Wei Chang ,  Chao-Wei Tseng

IPC: H05K7/20

CPC classification number: H05K7/205 ,  H05K1/0203 ,  H05K1/0204 ,  H05K1/0206 ,  H05K3/341 ,  H05K3/3452 ,  H05K2201/0715 ,  H05K2201/09054 ,  H05K2201/10303 ,  H05K2201/10477 ,  H05K2201/10727

Abstract: An electronic device with enhanced heat spread. A printed circuit board is disposed in a casing and includes a first metal ground layer, a second metal ground layer, and a metal connecting portion. The first metal ground layer is opposite the second metal ground layer. The metal connecting portion is connected between the first and second metal ground layers. The second metal ground layer is connected to the casing. A chip is electrically connected to the printed circuit board and includes a die and a heat-conducting portion connected to the die and soldered with the first metal ground layer. Heat generated by the chip is conducted to the casing through the heat-conducting portion, first metal ground layer, metal connecting portion, and second metal ground layer.

Abstract translation: 具有增强散热性的电子设备。 印刷电路板设置在壳体中，并且包括第一金属接地层，第二金属接地层和金属连接部分。 第一金属接地层与第二金属接地层相对。 金属连接部分连接在第一和第二金属接地层之间。 第二金属接地层连接到外壳。 芯片电连接到印刷电路板，并且包括模具和连接到模具并与第一金属接地层焊接的导热部分。 由芯片产生的热量通过导热部分，第一金属接地层，金属连接部分和第二金属接地层传导到壳体。

公开(公告)号：US20080070000A1

公开(公告)日：2008-03-20

申请号：US11888543

申请日：2007-07-31

Applicant: Jin Suzuki

Inventor： Jin Suzuki

IPC: B32B3/10 ,  H01R43/00

CPC classification number: H05K1/183 ,  H01L23/057 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/165 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16152 ,  H01L2924/19106 ,  H01R12/523 ,  H05K1/182 ,  H05K3/4611 ,  H05K3/4697 ,  H05K2201/09845 ,  H05K2201/10477 ,  H05K2201/10727 ,  Y10T29/49004 ,  Y10T29/49124 ,  Y10T428/24331 ,  H01L2224/0401

Abstract: A circuit module includes a multilayer wiring board having a cavity portion and an interposer on which a chip part is mounted. The interposer is bonded to the multilayer wiring board so that the chip part is disposed in the cavity portion and the cavity portion is hermetically sealed. In the manufacturing process for the circuit module, a continuity test of the chip part is conducted by applying a testing voltage to the interposer before the interposer is bonded to the multilayer wiring board.

Abstract translation: 电路模块包括具有空腔部分和插入件的多层布线板，其上安装有芯片部分。 插入器与多层布线板接合，使得芯片部分设置在空腔部分中并且空腔部分被气密密封。 在电路模块的制造工序中，通过在插入件与多层布线板接合之前，向插入件施加测试电压来进行芯片部分的连续性测试。

公开(公告)号：US20080012117A1

公开(公告)日：2008-01-17

申请号：US11752770

申请日：2007-05-23

Applicant: Shin KIM

Inventor： Shin KIM

IPC: H01L23/48 ,  H01L21/30 ,  H01L21/58

CPC classification number: H01L23/3114 ,  H01L21/561 ,  H01L23/13 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/12 ,  H01L24/81 ,  H01L24/83 ,  H01L24/94 ,  H01L25/105 ,  H01L2224/03334 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/16105 ,  H01L2224/16157 ,  H01L2224/274 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83 ,  H01L2225/1005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H05K1/183 ,  H05K1/184 ,  H05K2201/09845 ,  H05K2201/10477 ,  H05K2201/10727 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Provided are a semiconductor package having connection terminals whose side surfaces are exposed and a semiconductor module including such a semiconductor package. Also provided are methods of fabricating the semiconductor package and semiconductor module. According to an embodiment of the present invention, a semiconductor package includes a semiconductor chip including a semiconductor wafer having first and second opposite surfaces and a plurality of conductive pads arranged in a row on the first surface along the edges of the semiconductor wafer such that a side surface of each conductive pad is exposed. An insulating layer is formed on the first surface of the semiconductor wafer and includes openings for exposing parts of the conductive pads. A plurality of connection terminals are respectively arranged on the conductive pads exposed through the openings and a reinforcing member is arranged on the insulating layer to cover a portion of each connection terminal.

Abstract translation: 提供了具有侧表面露出的连接端子和包括这种半导体封装的半导体模块的半导体封装。 还提供了制造半导体封装和半导体模块的方法。 根据本发明的实施例，半导体封装包括半导体芯片，其包括具有第一和第二相对表面的半导体晶片和沿着半导体晶片的边缘在第一表面上排成一行的多个导电焊盘，使得 每个导电焊盘的侧面露出。 绝缘层形成在半导体晶片的第一表面上，并且包括用于暴露导电焊盘部分的开口。 多个连接端子分别布置在通过开口暴露的导电焊盘上，并且在绝缘层上布置加强构件以覆盖每个连接端子的一部分。

公开(公告)号：US20070278670A1

公开(公告)日：2007-12-06

申请号：US11836988

申请日：2007-08-10

Applicant: Masahiro KIMURA ,  Yoshifumi SAITO

Inventor： Masahiro KIMURA ,  Yoshifumi SAITO

IPC: H01L23/34

CPC classification number: H05K1/141 ,  H01L23/15 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0306 ,  H05K1/183 ,  H05K3/284 ,  H05K3/368 ,  H05K3/4007 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/09481 ,  H05K2201/10477 ,  H05K2203/308 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A multilayer electronic component including a resin layer disposed on a mounting board side is mounted on a mounting board, and has a structure such that, even when deformation, such as deflection and strain, occurs, a stress on the multilayer electronic component is relieved. In the multilayer electronic component, ends of columnar conductors protrude from a main surface of a resin layer facing the outside. The multilayer electronic component is mounted on a mounting board, and the ends of the columnar conductors are electrically connected to conductive lands. In this case, a predetermined gap is formed between the multilayer electronic component and the mounting board.

Abstract translation: 包括设置在安装板侧的树脂层的多层电子部件安装在安装板上，并且具有这样的结构，使得即使发生诸如挠曲和应变的变形，也可以减轻对多层电子部件的应力。 在多层电子部件中，柱状导体的端部从面向外部的树脂层的主面突出。 多层电子部件安装在安装板上，柱状导体的端部电连接到导电焊盘。 在这种情况下，在多层电子部件和安装基板之间形成规定的间隙。

公开(公告)号：US20070218781A1

公开(公告)日：2007-09-20

申请号：US11717706

申请日：2007-03-14

Applicant: Takahiko Yokai ,  Toshiki Naito ,  Yasunari Ooyabu

Inventor： Takahiko Yokai ,  Toshiki Naito ,  Yasunari Ooyabu

IPC: H01R13/514

CPC classification number: H01R12/592 ,  H01R12/52 ,  H05K1/056 ,  H05K1/118 ,  H05K3/363 ,  H05K2201/10477 ,  H05K2203/041

Abstract: A wired circuit board includes a metal supporting layer, an insulating layer formed on the metal supporting layer and a conductive pattern formed on the insulating layer, and having a terminal portion for connecting to an external terminal. The terminal portion is disposed at an end portion of the conductive pattern, supported on the insulating layer, and exposed from the metal supporting layer to have an end surface thereof used as a point of contact with the external terminal.

Abstract translation: 布线电路板包括金属支撑层，形成在金属支撑层上的绝缘层和形成在绝缘层上的导电图案，并且具有用于连接到外部端子的端子部分。 端子部分设置在导电图案的端部，被支撑在绝缘层上，并从金属支撑层露出，使其端面用作与外部端子的接触点。

公开(公告)号：US20070215378A1

公开(公告)日：2007-09-20

申请号：US11717152

申请日：2007-03-13

Applicant: Takashi Kasahara ,  Yoshiaki Ukawa

Inventor： Takashi Kasahara ,  Yoshiaki Ukawa

IPC: H05K1/03

CPC classification number: G11B7/12 ,  H05K1/118 ,  H05K3/363 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/4688 ,  H05K3/4691 ,  H05K2201/0305 ,  H05K2201/056 ,  H05K2201/10477

Abstract: A circuit board has, jointed together with adhesive, a single-layer flexible PCB having a through hole formed therein in the thickness direction and a rigid member having copper foil formed on one side of an insulating base member. A conductive pattern on the single-layer flexible PCB and the copper foil are electrically connected together via solder filling the through hole. Thus, with a low-cost circuit board, unnecessary electromagnetic emissions can be effectively reduced.

Abstract translation: 电路板与粘合剂接合，在厚度方向上形成有通孔的单层柔性PCB，以及形成在绝缘基体的一侧上的具有铜箔的刚性构件。 单层柔性PCB和铜箔上的导电图案通过填充通孔的焊料电连接在一起。 因此，利用低成本电路板，可以有效地减少不必要的电磁辐射。

公开(公告)号：US07243421B2

公开(公告)日：2007-07-17

申请号：US10975500

申请日：2004-10-29

Applicant: Philip Gareth Bentley ,  James Edward Fox ,  Alan Lionel Hudd ,  Martyn John Robinson ,  Michael Graham Johnson ,  Ian Williams

Inventor： Philip Gareth Bentley ,  James Edward Fox ,  Alan Lionel Hudd ,  Martyn John Robinson ,  Michael Graham Johnson ,  Ian Williams

IPC: H05K3/30

CPC classification number: H01L23/5389 ,  C23C18/1608 ,  C23C18/1621 ,  C23C18/208 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/05553 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/45124 ,  H01L2224/76155 ,  H01L2224/82007 ,  H01L2224/82102 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K3/182 ,  H05K3/32 ,  H05K2201/10477 ,  H05K2203/013 ,  H05K2203/0709 ,  H05K2203/1469 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49144 ,  H01L2924/00 ,  H01L2224/48

Abstract: A contact of a component is electrically connected to an associated contact of an electrical circuit, typically formed on a substrate, by depositing material between the contacts, the material forming or being processed to form an electrical connection between the contacts. The invention also provides apparatus for this purpose and a resulting circuit.

Abstract translation: 组件的触点通常在触点之间沉积材料，形成或被处理以在触点之间形成电连接的材料，电连接到通常形成在基板上的电路的相关触头。 本发明还提供了用于该目的的装置以及所产生的电路。

公开(公告)号：US07235880B2

公开(公告)日：2007-06-26

申请号：US10931917

申请日：2004-09-01

Applicant: Victor Prokofiev

Inventor： Victor Prokofiev

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/02 ,  H01L23/34

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/1532 ,  H01L2924/15323 ,  H01L2924/1533 ,  H01L2924/16152 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/3011 ,  H05K1/0203 ,  H05K1/0262 ,  H05K1/141 ,  H05K1/145 ,  H05K1/182 ,  H05K2201/066 ,  H05K2201/10477 ,  H05K2201/10734 ,  H01L2224/0401

Abstract: A package for integrated circuits is described. The package has a package substrate with a land side and an opposite die side, a first set of low level signal connectors on the die side to connect to an IC to be carried by the package, and a second set of low level signal connectors on the die side to connect to external components. The package may have power connectors on the land side or a power supply attached to the land side. A heat spreader or cooler may be attached to the die side.

Abstract translation: 描述了集成电路的封装。 封装具有封装衬底，其具有焊盘侧和相对的裸片侧，裸片侧的第一组低电平信号连接器连接到要由封装承载的IC，以及第二组低电平信号连接器 模具侧连接到外部组件。 该包装可能在陆地上具有电源连接器或者连接到陆地侧的电源。 散热器或冷却器可以附接到管芯侧。