CIRCUIT BOARD
    1.
    发明申请
    CIRCUIT BOARD 有权
    电路板

    公开(公告)号:US20160095216A1

    公开(公告)日:2016-03-31

    申请号:US14858409

    申请日:2015-09-18

    Abstract: A circuit board is provided that includes an outermost conductor layer including a plurality of terminals for flip-chip bonding and an outermost resin insulating layer defining a first opening and a second opening in an electronic-component mounting region. One of a power supply terminal and a ground terminal is exposed in the first opening. A plurality of signal terminals are exposed in the second opening. The resin insulating layer includes a reinforcing portion that defines an inner bottom surface of the second opening. A height of a portion of the terminal exposed in the first opening, the portion projecting from an inner bottom surface of the first opening, is greater than a height of portions of the terminals exposed in the second opening, the portions projecting from the inner bottom surface of the second opening.

    Abstract translation: 提供了一种电路板,其包括最外面的导体层,其包括用于倒装芯片接合的多个端子和限定电子部件安装区域中的第一开口和第二开口的最外层树脂绝缘层。 电源端子和接地端子中的一个在第一开口中露出。 多个信号端子在第二开口中露出。 树脂绝缘层包括限定第二开口的内底面的加强部。 在第一开口中暴露的端子的部分的高度,从第一开口的内底表面突出的部分的高度大于在第二开口中露出的端子的部分的高度,从内底部突出的部分 第二个开口的表面。

    WIRING SUBSTRATE
    3.
    发明申请
    WIRING SUBSTRATE 审中-公开
    接线基板

    公开(公告)号:US20150357277A1

    公开(公告)日:2015-12-10

    申请号:US14762185

    申请日:2013-12-12

    Abstract: To provide a wiring substrate which can reliably prevent progress of cracking in a solder bump, and which exhibits improved reliability. The wiring substrate 10 of the present invention includes a substrate main body 11, pads 61, and a solder resist 81. The pads 61 are provided on the substrate back surface 13 of the substrate main body, and have surfaces 62 on which solder bumps 84 employed for connection of a motherboard 91 can be formed. The solder resist 81 covers the substrate back surface 13 of the substrate main body, and has openings 82 through which the pads 61 are exposed. A protrusion 71 is formed on a portion of the surface 62 of each pad 61. The height A4 of the end surface 72 of the protrusion 71, as measured from the surface 62 of the pad 61, is smaller than the depth of each opening 82. The protrusion 71 is provided in the opening 82 such that the peripheral surface 73 of the protrusion 71 faces the inner surface of the opening 82, and the protrusion 71 has a plan-view shape similar to that of the opening 82.

    Abstract translation: 提供一种可以可靠地防止焊料凸块的开裂进行的布线基板,其可靠性提高。 本发明的布线基板10包括基板主体11,焊盘61和阻焊剂81.焊盘61设置在基板主体的基板背面13上,并且具有表面62,焊料凸块84 用于连接主板91可以形成。 阻焊剂81覆盖基板主体的基板背面13,并且具有开口82,焊盘61通过该开口82露出。 在每个垫61的表面62的一部分上形成突起71.突起71的端面72的高度A4,从垫61的表面62测量,小于每个开口82的深度 突起71设置在开口82中,使得突起71的周面73面对开口82的内表面,突起71具有与开口82相似的平面形状。

    WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    4.
    发明申请
    WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    接线基板及其制造方法

    公开(公告)号:US20130081862A1

    公开(公告)日:2013-04-04

    申请号:US13633421

    申请日:2012-10-02

    Abstract: Embodiments of the present invention provide a wiring substrate which is excellent in terms of the reliability of connection between the wiring substrate and a semiconductor chip. In some embodiments the wiring substrate comprises a first build-up layer in which resin insulation layers and conductor layers are laminated alternately. The outermost conductor layer can include a plurality of connection terminal portions to which a semiconductor chip is flip-chip connected. The plurality of connection terminal portions can be exposed through openings of a solder resist layer. Each of the connection terminal portions includes a connection region to which a connection terminal of the semiconductor chip is to be connected, and a wiring region which extends in a planar direction from the connection region and which is narrower than the connection region. The surface of the wiring region has a solder wettability lower than that of the surface of the connection region.

    Abstract translation: 本发明的实施例提供了一种在布线基板和半导体芯片之间的连接可靠性方面优异的布线基板。 在一些实施例中,布线基板包括交替层叠树脂绝缘层和导体层的第一堆积层。 最外面的导体层可以包括半导体芯片倒装芯片连接的多个连接端子部分。 多个连接端子部分可以通过阻焊层的开口露出。 每个连接端子部分包括连接半导体芯片的连接端子的连接区域和从连接区域在平面方向上延伸并且比连接区域窄的布线区域。 布线区域的表面的焊料润湿性低于连接区域的表面。

    WIRING BOARD
    5.
    发明申请
    WIRING BOARD 审中-公开
    接线板

    公开(公告)号:US20150313015A1

    公开(公告)日:2015-10-29

    申请号:US14647212

    申请日:2013-05-27

    Abstract: Provided is a wiring substrate which allows connection terminals to be disposed at high density, can increase the degree of freedom of wiring layout, and can enhance the reliability of connection of the connection terminals. A wiring substrate of the present invention includes a laminate which includes one or more insulating layers and one or more conductor layers laminated together; a wiring formed on the laminate; a columnar connection terminal which is formed directly on the wiring and is in contact with at least one of opposite side surfaces of the wiring; and a solder resist layer which covers the wiring and which exposes at least a portion of the connection terminal. The width of the wiring at a position at which the connection terminal is formed is smaller than the length of the connection terminal in the width direction.

    Abstract translation: 提供了一种允许以高密度设置连接端子的布线基板,可以增加布线布局的自由度,并且可以提高连接端子的连接的可靠性。 本发明的布线基板包括一层叠体,其包括一层或多层绝缘层和层压在一起的一层或多层导体层; 形成在层压板上的布线; 一个柱形连接端子,其直接形成在布线上并且与布线的相对侧表面中的至少一个相接触; 以及覆盖所述布线并且暴露所述连接端子的至少一部分的阻焊层。 形成连接端子的位置处的配线的宽度小于连接端子在宽度方向上的长度。

    WIRING SUBSTRATE AND METHOD FOR PRODUCING THE SAME
    6.
    发明申请
    WIRING SUBSTRATE AND METHOD FOR PRODUCING THE SAME 审中-公开
    配线基板及其制造方法

    公开(公告)号:US20140097007A1

    公开(公告)日:2014-04-10

    申请号:US14037496

    申请日:2013-09-26

    Abstract: Embodiments of the present wiring substrate include a stacked body including one or more insulation layers and one or more conductive layers, wherein the wiring substrate has a plurality of connection terminals formed on the stacked body, each connection terminal has a top surface whose area is smaller than that of each of opposite side surfaces thereof, and a filling member provided in a filling manner between the connection terminals. The top surface of each connection terminal has an area larger than that of a portion of each side surfaces portion exposed from the filling member, and a bonding layer containing a solder is formed on the top surface.

    Abstract translation: 本发明的布线基板的具体实施方式包括具有一个以上的绝缘层和一个以上的导电层的层叠体,其中,布线基板具有形成在层叠体上的多个连接端子,各连接端子的面积较小的顶面 比其各个相对侧面的填充构件和填充构件设置在连接端子之间。 每个连接端子的顶表面的面积大于从填充构件露出的每个侧表面部分的部分的面积,并且在顶表面上形成包含焊料的接合层。

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