公开(公告)号：EP1461828A4

公开(公告)日：2005-09-28

申请号：EP02803310

申请日：2002-11-07

Applicant: IBM

Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

IPC: B81B3/00 ,  B81C1/00 ,  H01H49/00 ,  H01H59/00

CPC classification number: B81C1/00246 ,  B81B2201/016 ,  B81B2201/018 ,  B81B2203/0127 ,  B81B2207/07 ,  B81C1/00611 ,  B81C2201/0122 ,  B81C2203/0735 ,  H01G5/40 ,  H01H59/0009

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

公开(公告)号：EP0814497A2

公开(公告)日：1997-12-29

申请号：EP97304224

申请日：1997-06-17

Applicant: SIEMENS AG ,  TOSHIBA KK ,  IBM

Inventor： ALSMEIER JOHANN ,  COTE DONNA R ,  LOH STEPHEN K ,  PARRIES PAUL C ,  GIFFORD GEORGE G ,  PREIN FRANK ,  LEVY MAX G ,  SUGIURA SOICHI

IPC: C23C16/30 ,  C23C16/56 ,  H01L21/205 ,  H01L21/28 ,  H01L21/30 ,  H01L21/31 ,  H01L21/318 ,  H01L21/336 ,  H01L23/31 ,  H01L29/78 ,  H01L21/22

CPC classification number: H01L29/66575 ,  H01L21/28176 ,  H01L21/3003 ,  H01L21/3185 ,  H01L23/3171 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/00

Abstract: A process for fabricating a device including the step of forming a structure for facilitating the passivation of surface states is disclosed. The structure comprises a hydrogen-rich (H-R) silicon nitride layer formed as part of the device structure. The H-R layer, which is formed by plasma-enhanced chemical vapor deposition, comprises hydrogen in an amount greater than that of conventional PLCVD nitride layers.

Abstract translation: 公开了一种用于制造包括形成用于促进表面状态钝化的结构的步骤的装置的方法。 该结构包括作为器件结构的一部分形成的富氢（H-R）氮化硅层。 通过等离子体增强化学气相沉积形成的H-R层包含比常规PLCVD氮化物层大的量的氢。

公开(公告)号：JP2007243180A

公开(公告)日：2007-09-20

申请号：JP2007046465

申请日：2007-02-27

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KEITH KWONG HON WONG ,  MAUTHE RONALD ,  COTE DONNA R

IPC: H01L27/105 ,  H01L45/00

CPC classification number: H01L45/06 ,  H01L27/2409 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1641

Abstract: PROBLEM TO BE SOLVED: To provide an electrode for a phase change memory, the method of forming the electrode, and the phase change memory. SOLUTION: An electrode 100 for a memory material for the phase change memory comprises: a first layer 110 joined on a memory material 102 containing nitride (AN x ), where A is one of Ti and W and x is smaller than 1.0; and a second layer 114 joined on the first layer 110 containing nitride (AN y ), where y is equal to or larger than 1.0. The first layer 110 of this multi-layer electrode is joined on a chalcogenide based memory material 102 such as GST stronger than stochiometric TiN or WN. As a result, interlaminar peeling is prevented. A substrate 116 has a diode 120 internally, such as a diode (lower) electrode 118 for connecting a PNP diode to the (lower) surface 122 of the memory material 102. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于相变存储器的电极，形成电极的方法和相变存储器。 解决方案：用于相变存储器的存储材料的电极100包括：第一层110，其接合在包含氮化物（AN x ）的存储材料102上，其中A是Ti和 W和x小于1.0; 以及接合在包含氮化物（AN y ）的第一层110上的第二层114，其中y等于或大于1.0。 这种多层电极的第一层110被连接在基于硫属化物的记忆材料102上，例如比固化TiN或WN更强的GST。 结果，防止了层间剥离。 衬底116在内部具有二极管120，例如用于将PNP二极管连接到存储器材料102的（下））表面122的二极管（下）电极118.版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2000311948A

公开(公告)日：2000-11-07

申请号：JP2000092149

申请日：2000-03-29

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： ARNDT KENNETH C ,  BRINTZINGER AXEL C ,  CONTI RICHARD A ,  COTE DONNA R ,  NARAYAN CHANDRASEKHAR ,  RAMACHANDRAN RAVIKUMAR ,  RUPP THOMAS S ,  SENTEIRU K SURIINIVUASAN

IPC: H01L21/82 ,  H01H69/02 ,  H01H85/00 ,  H01L21/8242 ,  H01L23/525 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To provide a method and structure for generating a void fuse structure on a gate conductor stack. SOLUTION: A semiconductor substrate is provided, wherein a gate conductor stack 32 is provided on a shallow trench isolation region. Oxide layers 33 and 34 are formed on a substrate around the gate conductor stack 32, and an electric contact opening part etched to the substrate down to the oxide layer is filled with a first conductive material 40, establishing electric contact to the gate conductor stack. A conductive layer 41 of a second conductive material is allowed to stick to the oxide layer and the electric contact, and the oxide layer is anisotropically etched so that at least one etching hole, as far as the shallow trench isolation region through the oxide layer, is formed. A part 60 around the least the etching hole of the oxide layer is isotropically etched to form a void under at least a part of a conductive player pattern. The gate conductor stack comprises a fuse.

公开(公告)号：AU2002365158A1

公开(公告)日：2003-07-09

申请号：AU2002365158

申请日：2002-11-07

Applicant: IBM

Inventor： PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI ,  VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A

IPC: B81B3/00 ,  B81C1/00 ,  H01H49/00 ,  H01H59/00 ,  H01L21/20

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

公开(公告)号：DE60224836T2

公开(公告)日：2009-01-08

申请号：DE60224836

申请日：2002-11-07

Applicant: IBM

Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

IPC: B81C1/00 ,  B81B3/00 ,  H01H49/00 ,  H01H59/00

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

公开(公告)号：DE60224836D1

公开(公告)日：2008-03-13

申请号：DE60224836

申请日：2002-11-07

Applicant: IBM

Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

IPC: B81C1/00 ,  B81B3/00 ,  H01H49/00 ,  H01H59/00

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

公开(公告)号：AT384685T

公开(公告)日：2008-02-15

申请号：AT02803310

申请日：2002-11-07

Applicant: IBM

Inventor： VOLANT RICHARD ,  BISSON JOHN ,  COTE DONNA R ,  DALTON TIMOTHY ,  GROVES ROBERT ,  PETRARCA KEVIN ,  STEIN KENNETH ,  SUBBANNA SESHADRI

IPC: B81C1/00 ,  B81B3/00 ,  H01H49/00 ,  H01H59/00

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.