公开(公告)号：KR1020090104378A

公开(公告)日：2009-10-06

申请号：KR1020080029778

申请日：2008-03-31

Applicant: 성균관대학교산학협력단

Inventor： 서수정 ,  임승규 ,  박인수 ,  나성훈 ,  김진수 ,  김태성 ,  염광섭

IPC: H01L21/28 ,  H01L23/12

CPC classification number: H01L21/76838 ,  H01L21/31144 ,  H01L21/76802 ,  H01L23/12

Abstract: PURPOSE: A multilayer manufacturing method using the anode oxidation is provided to apply the aluminum oxide to the interlayer dielectric layer and to improve the high electrical characteristic of insulation performance. CONSTITUTION: The multilayer manufacturing method using the anode oxidation comprises as follows. The first metal layer is formed in the surface of a substrate(S1). The first circuit has the first part oxidative region and the first metal wirings by oxidizing the first metal layer partially. The interlayer dielectric layer is formed by anodizing extensively the first metal layer and the first part oxidative region(S3). The penetration hole is formed by partially etching the interlayer dielectric layer. The second metal layer is formed within the surface and penetration hole of the interlayer dielectric layer(S5). The second circuit has the second part oxidative region and the second metal wirings.

Abstract translation: 目的：提供使用阳极氧化的多层制造方法以将氧化铝施加到层间电介质层，并提高绝缘性能的高电特性。 构成：使用阳极氧化的多层制造方法如下。 第一金属层形成在基板的表面（S1）中。 第一电路通过部分氧化第一金属层而具有第一部分氧化区和第一金属布线。 通过对第一金属层和第一部分氧化区域进行阳极氧化而形成层间电介质层（S3）。 穿透孔通过部分蚀刻层间电介质层而形成。 第二金属层形成在层间介质层的表面和贯通孔内（S5）。 第二电路具有第二部分氧化区和第二金属布线。

公开(公告)号：KR1020090035963A

公开(公告)日：2009-04-13

申请号：KR1020070101019

申请日：2007-10-08

Applicant: 성균관대학교산학협력단

Inventor： 서수정 ,  김장현 ,  정근희 ,  장주희 ,  이용호 ,  김태성 ,  강치구

IPC: H01L23/48 ,  H01L21/60

CPC classification number: H01L21/76897 ,  H01L21/3213 ,  H01L21/76838

Abstract: A formation method of the through hole electrode is provided to reduce the process time by growing the conductor material based on the side wall seed layer of the through hole. The through hole formation step is the step that forms one or more through holes on the substrate by using the RIE(Reactive Ion Etch) etcher etc(S1). The through hole is formed by the dry etching process. A step for forming the side wall seed layer is to form the side wall seed layer in the inner wall surface of the through hole of substrate(S2). The side wall seed layer is formed by the electroless plating process. A step for forming the coated layer is to form the coated layer including the dry film formed in the one side of substrate(S3). The coated layer is formed by the general coating progress. The though electrode is formed by filling up the conductor material including Cu etc from the side wall seed layer of the through hole to the center(S4).

Abstract translation: 提供通孔电极的形成方法，以通过基于通孔的侧壁种子层生长导体材料来缩短处理时间。 通孔形成步骤是通过使用RIE（反应离子蚀刻）蚀刻器等在基板上形成一个或多个通孔的步骤（S1）。 通孔是通过干式蚀刻工艺形成的。 用于形成侧壁种子层的步骤是在基板的通孔的内壁表面中形成侧壁种子层（S2）。 侧壁种子层通过无电镀方法形成。 形成涂层的步骤是形成包含在基材一侧形成的干膜的涂层（S3）。 涂层通过一般的涂层进行形成。 贯通电极通过从贯通孔的侧壁种子层向中央填充包括Cu等的导体材料而形成（S4）。