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公开(公告)号：WO2011089795A1
公开(公告)日：2011-07-28
申请号：PCT/JP2010/072258
申请日：2010-12-10
IPC: H05K3/46
CPC classification number: H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5383 , H05K1/0298 , H05K1/092 , H05K1/116 , H05K1/18 , H05K3/0011 , H05K3/0094 , H05K3/4069 , H05K3/4611 , H05K3/4623 , H05K2201/09545 , H05K2201/09563 , H05K2201/096 , H05K2201/09854 , Y10T156/1056
Abstract: 配線板（１００）が、第１面から第２面に向かって順に積層される第１絶縁層（１０ａ）、第２絶縁層（２０ａ）、及び第３絶縁層（３０ａ）と、第１絶縁層（１０ａ）を貫通する第１孔（１３ａ）にめっきが充填されてなる第１導体（１３）と、第２絶縁層（２０ａ）を貫通する第２孔（２１ａ）に導電性ペーストが充填されてなる第２導体（２１）と、第３絶縁層（３０ａ）を貫通する第３孔（３３ａ）にめっきが充填されてなる第３導体（３３）と、を有する。そして、第１導体（１３）、第２導体（２１）、及び第３導体（３３）が、同軸上に配置され、互いに導通している。
Abstract translation: 布线板（100）包括：第一绝缘层（10a），第二绝缘层（20a）和第三绝缘层（30a），其从第一表面到第二表面依次层叠; 由金属镀层形成的填充穿过第一绝缘层（10a）的第一孔（13a）的第一导体（13）; 由填充穿过所述第二绝缘层（20a）的第二孔（21a）的导电膏形成的第二导体（21）; 以及填充通过所述第三绝缘层（30a）的第一孔（33a）的由金属电镀形成的第三导体（33）。 第一导体（13），第二导体（21）和第三导体（33）设置在同一轴线上并彼此电连接。
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公开(公告)号：WO2011072990A2
公开(公告)日：2011-06-23
申请号：PCT/EP2010/067964
申请日：2010-11-23
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , SU, James , QUACKENBUSH, Richard, Alan , WILSON, John, Thomas
Inventor： SU, James , QUACKENBUSH, Richard, Alan , WILSON, John, Thomas
IPC: H05K1/18
CPC classification number: H05K1/183 , H05K3/28 , H05K3/3447 , H05K3/429 , H05K3/4697 , H05K2201/09127 , H05K2201/09545 , H05K2201/09781 , H05K2201/10189 , H05K2203/0228 , H05K2203/0242 , Y10T29/49156
Abstract: The present invention provides a printed circuit board assembly that includes a first printed circuit board portion having a first thickness and including at least one plated through hole selectively electrically interconnecting electrically conductive layers of the printed circuit board assembly. A second printed circuit board portion is also provided that has a second thickness which is less than the first thickness and further includes another a second plated through hole array exposed on a surface of the second printed circuit board portion.
Abstract translation: 本发明提供了一种印刷电路板组件，其包括具有第一厚度的第一印刷电路板部分，并且包括至少一个电镀通孔，其选择性地电连接印刷电路板组件的导电层。 还提供了第二印刷电路板部分，其具有小于第一厚度的第二厚度，并且还包括暴露在第二印刷电路板部分的表面上的另一个第二电镀通孔阵列。
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公开(公告)号：WO2007132533A1
公开(公告)日：2007-11-22
申请号：PCT/JP2006/309851
申请日：2006-05-17
CPC classification number: H05K3/426 , H05K1/116 , H05K3/002 , H05K3/108 , H05K2201/09545 , H05K2203/0191 , H05K2203/0574 , H05K2203/1184 , H05K2203/1394
Abstract: 回路基板の高密度化を実現するランドレスや狭小ランド幅の貫通孔を有する回路基板を作製するためのレジストパターンの形成方法、回路基板の製造方法及び回路基板を提供する。 貫通孔を有する基板の第１面に樹脂層及びマスク層を形成する工程と、基板の第１面とは反対側の第２面から樹脂層除去液を供給して、第１面の貫通孔上及び貫通孔周辺部の樹脂層を除去する工程と、を含むレジストパターンの形成方法、及び、このレジストパターンの形成方法を用いた回路基板の製造方法、及び回路基板である。
Abstract translation: 本发明提供了一种抗蚀剂图形形成方法，用于制备具有无电缆或窄平坦宽度的通孔的电路板，该电路板实现电路板中的密度增加，电路板的制造工艺和电路板。 抗蚀剂图案形成方法包括在具有通孔的板的第一平面上形成树脂层和掩模层的步骤，以及从与第一平面相反的第二平面供给树脂层除去液体的步骤 在第一平面中去除通孔上的树脂层和通孔的周边。 还提供了一种使用该抗蚀剂图形形成方法制造电路板的方法和电路板。
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94.发明申请
公开(公告)号：WO2006053206A1
公开(公告)日：2006-05-18
申请号：PCT/US2005/040907
申请日：2005-11-10
Applicant: PPG INDUSTRIES OHIO, INC.
Inventor： OLSON, Kevin, C. , WANG, Alan, E. , ELENIUS, Peter , GOODMAN, Thomas, W.
CPC classification number: H05K3/002 , H05K1/056 , H05K3/0052 , H05K3/403 , H05K3/44 , H05K3/445 , H05K3/4623 , H05K3/4641 , H05K3/4644 , H05K2201/0166 , H05K2201/0397 , H05K2201/0909 , H05K2201/09181 , H05K2201/0919 , H05K2201/09309 , H05K2201/09536 , H05K2201/09545 , H05K2201/09554 , H05K2201/09645 , H05K2201/09827 , H05K2203/1105 , H05K2203/135
Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.
Abstract translation: 多层电路板的电路板或每个电路板包括涂覆有覆盖导电片的一个表面的绝缘顶层的导电片，覆盖导电片的另一表面的绝缘底层和覆盖 导电片的边缘。 绝缘中间层可以夹在多层电路板组件的一对相邻电路板之间。 无地通孔或通孔可以延伸通过一个或多个电路板，用于连接其相对表面上的电导体。
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95.发明申请SOLDERED INTERCONNECT FOR A PRINTED CIRCUIT BOARD HAVING AN ANGULAR RADIAL FEATURE 审中-公开具有斜角径向特征的印刷电路板的焊接互连
公开(公告)号：WO2017091548A1
公开(公告)日：2017-06-01
申请号：PCT/US2016/063260
申请日：2016-11-22
Applicant: MERCURY SYSTEMS, INC.
Inventor： MCKENNEY, Darryl, J. , METHRATTA, Absu , OUELLETTE, Erica
CPC classification number: H01R12/716 , H01R4/028 , H01R9/091 , H01R12/526 , H01R12/58 , H01R12/714 , H01R13/05 , H01R13/405 , H01R13/652 , H05K1/0213 , H05K1/0237 , H05K1/0298 , H05K1/11 , H05K1/111 , H05K1/115 , H05K1/181 , H05K1/184 , H05K3/308 , H05K3/34 , H05K3/421 , H05K2201/09545 , H05K2201/09827 , H05K2201/10098 , H05K2201/10189 , H05K2201/10295 , H05K2201/1078 , H05K2201/10803 , H05K2201/10878 , H05K2201/10901 , Y02P70/611
Abstract: According to exemplary embodiments, a tapered surface interconnect is formed on a printed circuit board (PCB). A compliant pin of an electrical connector may be coupled to the tapered surface interconnect and soldered thereto. The depth of the surface interconnect may be shorter than a height or a thickness of the PCB. The surface interconnect may have a tapered side wall to allow for a better fit with a tapered compliant pin. The inclination of the side wall of the surface interconnect may be linear or concave. The intersection between the tapered sidewall and the bottom of the surface interconnect may be rounded to minimize pin insertion issues and may allow for easier solder flux evacuation from the surface interconnect during the soldering process. The compliant pin may be soldered into place upon being coupled to the tapered surface interconnect.
Abstract translation: 根据示例性实施例，在印刷电路板（PCB）上形成锥形表面互连。 电连接器的顺从针可以连接到锥形表面互连并焊接到其上。 表面互连的深度可以短于PCB的高度或厚度。 表面互连可以具有锥形侧壁以允许与锥形顺应针更好地配合。 表面互连的侧壁的倾斜可以是线性的或凹陷的。 锥形侧壁和表面互连的底部之间的交点可以被倒圆以最小化引脚插入问题并且可以允许在焊接工艺期间更容易从表面互连排出焊料流。 顺应针可以在连接到锥形表面互连时焊接到位。
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Patent Agency Ranking
公开(公告)号：WO2016081868A1
公开(公告)日：2016-05-26
申请号：PCT/US2015/061930
申请日：2015-11-20
Applicant: AMPHENOL CORPORATION
Inventor： GAILUS, Mark, W. , CARTIER, Marc, B., Jr. , SIVARAJAN, Vysakh , LEVINE, David
CPC classification number: H05K1/0222 , H01R43/205 , H05K1/0216 , H05K1/0219 , H05K1/025 , H05K1/0251 , H05K1/0253 , H05K1/0298 , H05K1/115 , H05K3/0047 , H05K3/4038 , H05K3/429 , H05K2201/07 , H05K2201/09063 , H05K2201/09318 , H05K2201/09545 , H05K2201/096 , H05K2201/097 , H05K2201/09718 , H05K2201/09845 , H05K2201/09854 , H05K2201/10189
Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; first and second signal vias forming a differential signal pair, the first and second signal vias extending through the attachment layers and connecting to respective signal traces on a breakout layer of the routing layers; an antipad of a first type around and between the first and second signal vias in one or more of the attachment layers; and antipads of a second type around the first and second signal vias in at least one routing layer adjacent to the breakout layer.
Abstract translation: 印刷电路板包括多个层，包括附着层和布线层; 形成差分信号对的第一和第二信号通孔，第一和第二信号通孔延伸穿过连接层并连接到路由层的突围层上的各个信号迹线; 围绕一个或多个附着层中的第一和第二信号通孔之间和第一信号通路之间的第一类型的止动件; 以及围绕与突出层相邻的至少一个路由层中的第一和第二信号通孔周围的第二类型的反码器。
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公开(公告)号：WO2016081861A1
公开(公告)日：2016-05-26
申请号：PCT/US2015/061919
申请日：2015-11-20
Applicant: AMPHENOL CORPORATION
Inventor： CARTIER, Marc, B., Jr.
CPC classification number: H05K1/0222 , H01R43/205 , H05K1/0216 , H05K1/0219 , H05K1/025 , H05K1/0251 , H05K1/0253 , H05K1/0298 , H05K1/115 , H05K3/0047 , H05K3/4038 , H05K3/429 , H05K2201/07 , H05K2201/09063 , H05K2201/09318 , H05K2201/09545 , H05K2201/096 , H05K2201/097 , H05K2201/09718 , H05K2201/09845 , H05K2201/09854 , H05K2201/10189
Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns comprising: dual diameter first and second signal vias forming a differential signal pair, the first and second signal vias being configured to accept contact tails of signal conductors of a connector; dual diameter ground shadow vias adjacent to each of the first and second signal vias, wherein the dual diameter shadow ground vias have a reversed diameter configuration with respect to the dual diameter first and second signal vias; and ground vias configured to accept contact tails of ground conductors of the connector.
Abstract translation: 印刷电路板包括多个层，包括附着层和布线层; 以及形成在多个层中的通孔图案，每个通孔图案包括：形成差分信号对的双直径第一和第二信号通孔，第一和第二信号通孔被配置为接纳连接器的信号导体的接触尾部; 与第一和第二信号通孔中的每一个相邻的双直径地面阴影通孔，其中双直径阴影接地通孔相对于双直径第一和第二信号通孔具有反向直径构型; 以及配置为接受连接器的接地导体的接触尾部的接地通孔。
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公开(公告)号：WO2016081855A1
公开(公告)日：2016-05-26
申请号：PCT/US2015/061907
申请日：2015-11-20
Applicant: AMPHENOL CORPORATION
Inventor： GAILUS, Mark, W. , CARTIER, Marc, B., Jr. , SIVARAJAN, Vysakh , LEVINE, David
CPC classification number: H05K1/0222 , H01R43/205 , H05K1/0216 , H05K1/0219 , H05K1/025 , H05K1/0251 , H05K1/0253 , H05K1/0298 , H05K1/115 , H05K3/0047 , H05K3/4038 , H05K3/429 , H05K2201/07 , H05K2201/09063 , H05K2201/09318 , H05K2201/09545 , H05K2201/096 , H05K2201/097 , H05K2201/09718 , H05K2201/09845 , H05K2201/09854 , H05K2201/10189
Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.
Abstract translation: 印刷电路板包括多个层，包括附着层和布线层; 以及通过多层形成的通路图案，每个通孔图案包括形成差分信号对的第一和第二信号通孔，第一和第二信号通孔至少延伸穿过附着层; 至少延伸穿过连接层的接地通孔，包括接地导体的接地通孔; 以及位于与第一和第二信号通孔中的每一个相邻的阴影通孔，其中阴影通孔在附着层中不含导电材料。 印刷电路板还可以包括延伸穿过附接层并且位于通孔图案之间的槽通道。
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公开(公告)号：WO2016049212A1
公开(公告)日：2016-03-31
申请号：PCT/US2015/051758
申请日：2015-09-23
Applicant: FINISAR CORPORATION
Inventor： DAGHIGHIAN, Henry, M.
CPC classification number: H05K1/115 , H05K1/0231 , H05K1/0243 , H05K1/0298 , H05K1/092 , H05K1/113 , H05K1/162 , H05K1/182 , H05K2201/0187 , H05K2201/0257 , H05K2201/09545 , H05K2201/09809 , H05K2201/10734
Abstract: A capacitor in a multilayer printed circuit board 100 is described. The capacitor may include a via 114, 116 of a via-in-pad type and a dielectric mixture filled in the via of the via-in-pad type. The via may be disposed under an integrated circuit contact pad 112 of the multilayer printed circuit board. The dielectric mixture may include a nanoparticle-sized dielectric powder mixed with an adhesive material.
Abstract translation: 对多层印刷电路板100中的电容器进行说明。 电容器可以包括填充在通孔式焊盘型的通路中的通孔式焊盘型通孔114和116和介质混合物。 通孔可以设置在多层印刷电路板的集成电路接触焊盘112的下方。 介电混合物可以包括与粘合剂材料混合的纳米颗粒尺寸的介电粉末。
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公开(公告)号：WO2015183184A1
公开(公告)日：2015-12-03
申请号：PCT/SG2014/000238
申请日：2014-05-30
Applicant: DAO, Nguyen Phu Cuong
Inventor： DAO, Nguyen Phu Cuong
CPC classification number: H05K1/115 , H01L21/486 , H01L21/6835 , H01L23/49822 , H01L23/49827 , H01L24/08 , H01L24/16 , H01L24/73 , H01L24/80 , H01L24/81 , H01L24/92 , H01L2221/68345 , H01L2224/08238 , H01L2224/13023 , H01L2224/16111 , H01L2224/16237 , H01L2224/73201 , H01L2224/80903 , H01L2224/81011 , H01L2224/81024 , H01L2224/81385 , H01L2224/81815 , H01L2224/9211 , H05K3/0014 , H05K3/0032 , H05K3/205 , H05K3/4602 , H05K3/4682 , H05K2201/09436 , H05K2201/09545 , H05K2201/09827 , H05K2203/0108 , H01L2924/00014 , H01L2924/00012 , H01L2224/80 , H01L2224/81 , H01L2224/08 , H01L2224/16
Abstract: The present invention relates to a compact substrate and a method for making the same. The compact substrate comprises at least one or a combination of a coreless structure, a double via structure and a compact double sided laser drilled (DSLD) via structure. The coreless structure has a first circuit comprising a plurality of first metal pads (151) and first metal lines (152). A first solder resist layer (16) is formed to cover parts of the first circuit and expose parts of the first metal pads (151) and parts of the first metal lines (152). Some Photo-Imageable Dielectric (PID) material can also be used to form the first solder resist layer (16). A second circuit comprising second metal pads (181) and second metal lines (182) are formed on the first solder resist layer (16). The second metal pads (181) cover the exposed first metal pads (151) and exposed first metal lines (152). The double via structure comprises a core substrate (19) having a first surface (191) and a second surface (192). Blind via holes (201) are formed on the first surface (191) of the core substrate (19). At least one through via holes (202) are formed on the base of the blind Via holes. The through via holes (202) are smaller in diameter as compared to that of the blind via holes (201). The through via holes (202) are located within the base of the blind via holes (201): The combination of the blind via holes (201) and the through via holes (202) forms the double via holes that penetrate through the core substrate (19). A compact double sided laser drilled (DSLD) via structure comprises a core substrate (19) having a first surface (191) and a second surface (192). DSLD via holes are formed and penetrate through the core substrate (19). Having the shape of two cones combined heads on, the DSLD via hole has its largest opening at its both ends and has its smallest opening somewhere near its middle portion.
Abstract translation: 本发明涉及一种紧凑型基板及其制造方法。 紧凑型基板包括无芯结构，双通孔结构和紧凑型双面激光钻孔（DSLD）通孔结构中的至少一种或组合。 无芯结构具有包括多个第一金属焊盘（151）和第一金属线（152）的第一电路。 形成第一阻焊层（16）以覆盖第一电路的部分并暴露第一金属焊盘（151）的部分和第一金属线（152）的部分。 一些可光成像电介质（PID）材料也可用于形成第一阻焊层（16）。 在第一阻焊层（16）上形成包括第二金属焊盘（181）和第二金属线（182）的第二电路。 第二金属焊盘（181）覆盖暴露的第一金属焊盘（151）和暴露的第一金属线（152）。 双通道结构包括具有第一表面（191）和第二表面（192）的芯基板（19）。 在芯基板（19）的第一表面（191）上形成有盲通孔（201）。 至少一个通孔（202）形成在盲孔通孔的底部上。 通孔（202）的直径比盲孔（201）的直径小。 通孔（202）位于盲孔（201）的基部内。盲孔（201）和通孔（202）的组合形成穿过芯基板的双通孔 （19）。 紧凑的双面激光钻孔（DSLD）通孔结构包括具有第一表面（191）和第二表面（192）的芯基板（19）。 DSLD通孔形成并穿透芯基板（19）。 DSLD通孔具有两个锥体的形状，其两端具有最大的开口，并且在其中间部分附近具有最小的开口。
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