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公开(公告)号:US20160050754A1
公开(公告)日:2016-02-18
申请号:US14823519
申请日:2015-08-11
Applicant: FANUC Corporation
Inventor: Makoto BEKKE
IPC: H05K1/11
CPC classification number: H05K1/115 , H05K3/3447 , H05K2201/09545 , H05K2201/09609 , H05K2201/09636 , H05K2203/044
Abstract: A printed wiring board includes three or more than three through holes. An inner wall of the through hole is covered by conductive coating. Same size leads of an electronic component are inserted into the through holes. The through holes are soldered by dip soldering the printed wiring board in melting solder. The through holes have two or more diameters. The diameter of the through hole having more adjacent through holes is not larger than the diameter of the through hole having less adjacent through holes.
Abstract translation: 印刷电路板包括三个或三个以上的通孔。 通孔的内壁被导电涂层覆盖。 将电子部件的相同尺寸的引线插入到通孔中。 通孔通过浸焊焊接印刷线路板而熔化焊料来焊接通孔。 通孔具有两个或更多个直径。 具有更多相邻通孔的通孔的直径不大于具有较少相邻通孔的通孔的直径。
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公开(公告)号:US09107315B2
公开(公告)日:2015-08-11
申请号:US12582647
申请日:2009-10-20
Applicant: Chih-kuang Yang
Inventor: Chih-kuang Yang
CPC classification number: H05K1/116 , H05K1/0393 , H05K1/115 , H05K3/048 , H05K3/4076 , H05K2201/09509 , H05K2201/09545 , H05K2201/09645 , H05K2201/09827 , Y10T29/49204
Abstract: Disclosed is a via structure in a multi-layer substrate, comprising a first metal layer, a dielectric layer and a second metal layer. The first metal layer has an upper surface. The dielectric layer covers the first metal layer in which a via is opened to expose the upper surface. The second metal layer is formed in the via and contacts an upper surface and an inclined wall of the via. A contacting surface of the second metal layer has a top line lower than the upper edge of the inclined wall. Alternatively, the second metal layer can be formed on the dielectric layer as being a metal line simultaneously as formed in the via as being a pad. The metal line and the pad are connected electronically. The aforesaid metal second layer can be formed in the via and on the dielectric layer by a metal lift-off process.
Abstract translation: 公开了一种多层基板中的通孔结构,包括第一金属层,电介质层和第二金属层。 第一金属层具有上表面。 电介质层覆盖第一金属层,其中通孔被打开以暴露上表面。 第二金属层形成在通孔中并与通孔的上表面和倾斜壁接触。 第二金属层的接触表面具有比倾斜壁的上边缘低的顶线。 或者,第二金属层可以作为金属线形成在电介质层上,同时形成在通孔中作为焊盘。 金属线和焊盘以电子方式连接。 上述金属第二层可以通过金属剥离工艺在通孔和电介质层上形成。
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公开(公告)号:US09093767B2
公开(公告)日:2015-07-28
申请号:US13879883
申请日:2011-11-29
Applicant: James Rathburn
Inventor: James Rathburn
CPC classification number: H01R23/6813 , H01L24/16 , H01L24/48 , H01L2224/16225 , H01L2224/45144 , H01L2224/48091 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01R12/73 , H01R12/82 , H01R13/2457 , H01R13/2485 , H01R31/06 , H05K1/092 , H05K1/111 , H05K1/141 , H05K1/182 , H05K3/0094 , H05K3/10 , H05K3/1291 , H05K3/326 , H05K3/363 , H05K3/365 , H05K3/4007 , H05K3/4015 , H05K3/4092 , H05K3/425 , H05K3/4694 , H05K7/1076 , H05K2201/0397 , H05K2201/048 , H05K2201/09381 , H05K2201/09545 , H05K2201/09563 , H05K2201/09854 , H05K2201/10378 , H05K2201/10386 , H05K2201/2072 , H05K2201/209 , H05K2203/041 , H05K2203/1476 , Y10T29/49165 , H01L2224/45099 , H01L2924/00
Abstract: A surface mount electrical interconnect adapted to provide an interface between solder balls on a BGA device and a PCB. The electrical interconnect includes a socket substrate with a first surface, a second surface, and a plurality of openings sized and configured to receive the solder balls on the BGA device. A plurality of electrically conductive contact tabs are bonded to the first surface of the socket substrate so that contact tips on the contact tabs extend into the openings. The contact tips electrically couple with the BGA device when the solder balls are positioned in the openings. Vias are located in the openings that electrically couple the contact tabs to contact pads located proximate the second surface of the socket substrate. Solder balls are bonded to the contact pad that are adapted to electrically and mechanically couple the electrical interconnect to the PCB.
Abstract translation: 适于在BGA器件上的焊球和PCB之间提供界面的表面贴装电互连。 电互连包括具有第一表面,第二表面和多个开口的插座基板,其尺寸和构造用于接收BGA器件上的焊球。 多个导电接触片接合到插座衬底的第一表面,使得接触片上的接触尖端延伸到开口中。 当焊球定位在开口中时,接触尖端与BGA器件电耦合。 通孔位于开口中,其将接触片电耦合到位于插座衬底的第二表面附近的接触垫。 焊球被接合到接触焊盘上,适于电连接和机械地将电互连件耦合到PCB。
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公开(公告)号:US09059152B2
公开(公告)日:2015-06-16
申请号:US13659147
申请日:2012-10-24
Applicant: NGK SPARK PLUG CO., LTD.
Inventor: Masahiro Inoue , Atsuhiko Sugimoto
CPC classification number: H01L21/4853 , H01L23/49811 , H01L23/49822 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/16225 , H01L2224/17051 , H01L2224/32225 , H01L2224/73204 , H01L2224/81193 , H01L2224/81385 , H01L2224/81444 , H01L2224/81815 , H01L2924/01322 , H01L2924/12042 , H01L2924/1461 , H01L2924/15311 , H05K1/118 , H05K1/119 , H05K3/34 , H05K2201/09545 , Y10T29/49147 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
Abstract: Embodiments of the present invention provide a wiring substrate having a structure where a plurality of projection electrodes are arranged within an electrode formation region on a substrate main surface. At least one among a plurality of the projection electrodes is a variant projection electrode which has a recess portion on an upper surface, an outer diameter at the upper end that is larger than an outer diameter at the lower end, and a reverse trapezoidal cross-section shape. Embodiments of the present invention also provide methods for manufacturing wiring substrates having one or more of said variant projection electrode.
Abstract translation: 本发明的实施例提供一种布线基板,其具有多个突起电极布置在基板主表面上的电极形成区域内的结构。 多个突起电极中的至少一个是突起电极,其上表面具有凹部,上端的外径大于下端的外径,反向梯形截面, 截面形状。 本发明的实施例还提供了制造具有一个或多个所述变型投影电极的布线基板的方法。
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公开(公告)号:US20150075848A1
公开(公告)日:2015-03-19
申请号:US14552771
申请日:2014-11-25
Applicant: IBIDEN CO., LTD.
Inventor: Nobuyuki NAGANUMA , Michimasa Takahashi , Masakazu Aoyama
CPC classification number: H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5383 , H05K1/0298 , H05K1/092 , H05K1/116 , H05K1/18 , H05K3/0011 , H05K3/0094 , H05K3/4069 , H05K3/4611 , H05K3/4623 , H05K2201/09545 , H05K2201/09563 , H05K2201/096 , H05K2201/09854 , Y10T156/1056
Abstract: A wiring board includes multiple insulating layers including first, second, third, fourth and fifth insulation layers laminated in the order of the first, second, third, fourth and fifth insulation layers. The first insulation layer has a first conductor including plating, the second insulation layer has a second conductor including plating, the third insulation layer has a third conductor including conductive paste, the fourth insulation layer has a fourth conductor including plating, the fifth insulation layer has a fifth conductor including plating, and the first conductor, the second conductor, the third conductor, the fourth conductor and the fifth conductor are formed along the same axis and are electrically continuous with each other.
Abstract translation: 布线板包括多个绝缘层,包括以第一,第二,第三,第四和第五绝缘层的顺序层叠的第一,第二,第三,第四和第五绝缘层。 所述第一绝缘层具有包括电镀的第一导体,所述第二绝缘层具有包括电镀的第二导体,所述第三绝缘层具有包括导电糊的第三导体,所述第四绝缘层具有包括电镀的第四导体,所述第五绝缘层具有 包括电镀的第五导体,并且第一导体,第二导体,第三导体,第四导体和第五导体沿着相同的轴线形成并且彼此电连接。
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公开(公告)号:US20140116765A1
公开(公告)日:2014-05-01
申请号:US13664264
申请日:2012-10-30
Applicant: MD Altaf Hossain , Jin Zhao , John T. Vu
Inventor: MD Altaf Hossain , Jin Zhao , John T. Vu
CPC classification number: H05K1/183 , H01L2224/16225 , H01L2924/15311 , H05K1/0326 , H05K1/113 , H05K1/115 , H05K1/162 , H05K1/165 , H05K1/167 , H05K3/32 , H05K3/42 , H05K2201/09545 , H05K2201/09709 , H05K2201/0989 , H05K2201/10734 , Y10T29/4913
Abstract: Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.
Abstract translation: 本公开的实施例涉及具有诸如电感器,电容器,电阻器和相关技术和配置的集成无源器件的电路板。 在一个实施例中,一种装置包括具有与第一表面相对的第一表面和第二表面的电路板,以及与电路板成一体的无源器件,该无源器件具有被配置为与管芯的电力耦合的输入端子, 与输入端子电耦合的输出端子以及设置在电路板的第一表面和第二表面之间的电气路由特征,并且与输入端子和输出端子耦合以在输入端子和输出端子之间布置电力 ,其中所述输入端子包括被配置为接收包括所述管芯的封装组件的焊球连接的表面。 可以描述和/或要求保护其他实施例。
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公开(公告)号:US08107253B2
公开(公告)日:2012-01-31
申请号:US12034517
申请日:2008-02-20
Applicant: Yasushi Inagaki , Motoo Asai , Dongdong Wang , Hideo Yabashi , Seiji Shirai
Inventor: Yasushi Inagaki , Motoo Asai , Dongdong Wang , Hideo Yabashi , Seiji Shirai
IPC: H05K1/18
CPC classification number: H05K1/115 , H01G2/06 , H01G4/12 , H01G4/224 , H01G4/228 , H01G4/248 , H01G4/40 , H01L21/4857 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/642 , H01L23/645 , H01L25/16 , H01L25/162 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05027 , H01L2224/05568 , H01L2224/05572 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2924/01002 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01025 , H01L2924/01027 , H01L2924/01046 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15312 , H01L2924/19041 , H01L2924/19105 , H01L2924/19106 , H01L2924/30107 , H01L2924/3011 , H01L2924/3511 , H05K1/0231 , H05K1/112 , H05K1/181 , H05K1/183 , H05K1/185 , H05K1/186 , H05K3/4602 , H05K2201/09509 , H05K2201/09545 , H05K2201/096 , H05K2201/10015 , H05K2201/10636 , H05K2201/10674 , Y02P70/611
Abstract: A printed circuit board includes a chip capacitor having electrodes and a metal film formed on one or more of the electrodes, an accommodating layer accommodating the chip capacitor inside the accommodating layer, a connection layer formed over the accommodating layer and having a via hole opening extending to the metal film, and a first via hole structure formed in the via hole opening of the connection layer and connected to the metal film on the one or more of the electrodes of the chip capacitor.
Abstract translation: 印刷电路板包括具有电极的片状电容器和形成在一个或多个电极上的金属膜,在容纳层内容纳片状电容器的容纳层,形成在容纳层上的连接层,并且具有通孔开口延伸 以及形成在连接层的通孔开口中并连接到片式电容器的一个或多个电极上的金属膜的第一通孔结构。
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公开(公告)号:US07995352B2
公开(公告)日:2011-08-09
申请号:US12691154
申请日:2010-01-21
Applicant: Yasushi Inagaki , Motoo Asai , Dongdong Wang , Hideo Yabashi , Seiji Shirai
Inventor: Yasushi Inagaki , Motoo Asai , Dongdong Wang , Hideo Yabashi , Seiji Shirai
IPC: H05K1/18
CPC classification number: H05K1/115 , H01G2/06 , H01G4/12 , H01G4/224 , H01G4/228 , H01G4/248 , H01G4/40 , H01L21/4857 , H01L23/498 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L23/642 , H01L23/645 , H01L25/16 , H01L25/162 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05027 , H01L2224/05568 , H01L2224/05572 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2924/01002 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01025 , H01L2924/01027 , H01L2924/01046 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15312 , H01L2924/19041 , H01L2924/19105 , H01L2924/19106 , H01L2924/30107 , H01L2924/3011 , H01L2924/3511 , H05K1/0231 , H05K1/112 , H05K1/181 , H05K1/183 , H05K1/185 , H05K1/186 , H05K3/4602 , H05K2201/09509 , H05K2201/09545 , H05K2201/096 , H05K2201/10015 , H05K2201/10636 , H05K2201/10674 , Y02P70/611
Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.
Abstract translation: 片状电容器设置在印刷电路板中。 以这种方式,IC芯片和每个芯片电容器之间的距离缩短,并且环路电感减小。 此外,芯片电容器容纳在具有大厚度的芯基板中。 因此,印刷电路板的厚度不会变大。
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公开(公告)号:US20110180908A1
公开(公告)日:2011-07-28
申请号:US12895126
申请日:2010-09-30
Applicant: Nobuyuki NAGANUMA , Michimasa Takahashi , Masakazu Aoyama
Inventor: Nobuyuki NAGANUMA , Michimasa Takahashi , Masakazu Aoyama
CPC classification number: H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5383 , H05K1/0298 , H05K1/092 , H05K1/116 , H05K1/18 , H05K3/0011 , H05K3/0094 , H05K3/4069 , H05K3/4611 , H05K3/4623 , H05K2201/09545 , H05K2201/09563 , H05K2201/096 , H05K2201/09854 , Y10T156/1056
Abstract: A wiring board includes a laminated body having first and second surfaces and including first, second and third insulation layers in the order of the first, second and third insulation layers from the first surface toward the second surface. The first insulation layer has a first hole which penetrates through the first insulation layer and includes a first conductor made of a plating in the first hole. The second insulation layer has a second hole which penetrates through the second insulation layer and includes a second conductor made of a conductive paste in the second hole. The third insulation layer has a third hole which penetrates through the third insulation layer and includes a third conductor made of a plating in the third hole. The first, second and third conductors are positioned along the same axis and are electrically continuous with each other.
Abstract translation: 布线板包括具有第一表面和第二表面并且包括第一,第二和第三绝缘层从第一表面朝向第二表面的顺序的层叠体。 第一绝缘层具有穿过第一绝缘层的第一孔,并且包括在第一孔中由电镀制成的第一导体。 第二绝缘层具有穿过第二绝缘层的第二孔,并且包括在第二孔中由导电膏制成的第二导体。 第三绝缘层具有穿过第三绝缘层的第三孔,并且包括在第三孔中由电镀制成的第三导体。 第一,第二和第三导体沿着相同的轴定位并且彼此电连续。
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公开(公告)号:US20110147069A1
公开(公告)日:2011-06-23
申请号:US12642020
申请日:2009-12-18
Applicant: Richard A. Quackenbush , James Su , John T. Wilson
Inventor: Richard A. Quackenbush , James Su , John T. Wilson
CPC classification number: H05K1/183 , H05K3/28 , H05K3/3447 , H05K3/429 , H05K3/4697 , H05K2201/09127 , H05K2201/09545 , H05K2201/09781 , H05K2201/10189 , H05K2203/0228 , H05K2203/0242 , Y10T29/49156
Abstract: The present invention provides a printed circuit board assembly that includes a first printed circuit board portion having a first thickness and including at least one plated through hole selectively electrically interconnecting electrically conductive layers of the printed circuit board assembly. A second printed circuit board portion is also provided that has a second thickness which is less than the first thickness and further includes another a second plated through hole array exposed on a surface of the second printed circuit board portion.
Abstract translation: 本发明提供了一种印刷电路板组件,其包括具有第一厚度的第一印刷电路板部分,并且包括至少一个电镀通孔,其选择性地电连接印刷电路板组件的导电层。 还提供第二印刷电路板部分,其具有小于第一厚度的第二厚度,并且还包括暴露在第二印刷电路板部分的表面上的另一个第二电镀通孔阵列。
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