公开(公告)号：WO2004027866A2

公开(公告)日：2004-04-01

申请号：PCT/FR2003/002599

申请日：2003-08-28

Applicant: JOHNSON CONTROLS TECHNOLOGY COMPANY ,  HERNANDEZ, Michel ,  MARTEAU, Daniel

Inventor： HERNANDEZ, Michel ,  MARTEAU, Daniel

IPC: H01L23/498

CPC classification number: H01L23/50 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/056 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/0382 ,  H05K2201/0385 ,  H05K2201/09554 ,  H05K2201/09745 ,  H05K2203/0195 ,  H01L2924/00

Abstract: ABREGEL'invention concerne un procédé d'établissement d'une liaison dans un substrat métallique intégré comportant une première couche métallique (300) et une deuxième couche métallique (100) séparées par une couche isolante (200), comportant l'étape de découper une portion (22) de la première couche métallique (300) et une portion correspondante de la couche isolante (23) et ô enfoncer ces portions dans la seconde couche métallique (100).Figure 3.

Abstract translation: 本发明涉及一种用于在集成金属基板中形成连接件的方法，该方法包括由绝缘层（200）分隔的第一金属层（300）和第二金属层（100），所述第一金属层（300）和第二金属层（100） 切除第一金属层（300）的绝缘层（22）和绝缘层（23）的对应部分，并将所述部分插入到第二金属层（100）中。

公开(公告)号：WO2003065510A1

公开(公告)日：2003-08-07

申请号：PCT/US2003/000175

申请日：2003-01-02

Applicant: ANAREN MICROWAVE, INC.

Inventor： VAN DER WINDT, Leendert, J.

IPC: H01R12/04

CPC classification number: H05K3/44 ,  H05K1/0203 ,  H05K1/021 ,  H05K1/0243 ,  H05K1/182 ,  H05K3/0047 ,  H05K3/0061 ,  H05K3/429 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/0959 ,  H05K2201/09618 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175

Abstract: A printed circuit board through- hole connection that includes an assembled layout of a printed circuit board (10) and formed through holes (20a) by material removed from the first side of the printed circuit board up to the backing (11) and then slightly into the top portion (11a) of the backing. It further includes plated through-holes that connect the backing (11), a ground layer (19) and a signal layer (16), removed plating from the signal layer without the connection removed from the ground layer to the backing and filled through holes from the first side with a non conductive filler (17).

Abstract translation: 一种印刷电路板通孔连接，其包括印刷电路板（10）的组装布局，并且通过从印刷电路板的第一侧直到背衬（11）去除的材料形成通孔（20a），然后稍微 进入背衬的顶部（11a）。 它还包括连接背衬（11），接地层（19）和信号层（16）的电镀通孔，从信号层移除镀层，而不将连接从接地层移除到背衬并填充通孔 从第一侧用非导电填料（17）。

公开(公告)号：WO00005934A1

公开(公告)日：2000-02-03

申请号：PCT/JP1999/003908

申请日：1999-07-22

IPC: H05K3/06 ,  H05K3/20 ,  H05K3/44 ,  H05K3/46

CPC classification number: H05K3/062 ,  H05K3/20 ,  H05K3/44 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/09554 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10S428/901 ,  Y10T428/12903 ,  Y10T428/1291 ,  Y10T428/12931 ,  Y10T428/12944 ,  Y10T428/24917

Abstract: A method of manufacturing a multilayered printed-circuit board and a low-cost clad board. Copper foil layers (19, 24, 33) for forming conductor layers (10, 17, 18) and nickel plating layers (20, 21) for forming etch stop layers (11, 12) are alternately stacked and compressed to form a clad board (34) for a printed-circuit board. The clad board (34) for the printed-circuit board is selectively etched to manufacture a base. External conductor layers (15, 16) are formed on the surface of the base and patterned. The conductor layers (10, 15, 16) are interconnected electrically through conductors blocks (17, 18) formed by etching the copper foil layers (19, 24, 33) and the nickel plating layers (20, 21) to complete the manufacture of multilayered printed-circuit board.

Abstract translation: 一种制造多层印刷电路板和低成本复合板的方法。 用于形成用于形成蚀刻停止层（11,12）的导体层（10,17,18）和镀镍层（20,21）的铜箔层（19,24,33）交替堆叠并压缩以形成覆盖板 （34）用于印刷电路板。 选择性地蚀刻用于印刷电路板的复合板（34）以制造基底。 外部导体层（15,16）形成在基底的表面上并被图案化。 导体层（10,15,16）通过蚀刻铜箔层（19,24,33）和镀镍层（20,21）形成的导体块（17,18）电连接，以完成制造 多层印刷电路板。

公开(公告)号：WO99045754A1

公开(公告)日：1999-09-10

申请号：PCT/FR1999/000461

申请日：1999-03-02

IPC: H01R9/16 ,  H01R12/58 ,  H05K1/05 ,  H05K1/14 ,  H05K3/00 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K3/44 ,  H01R9/09

CPC classification number: H05K3/3447 ,  H01R9/16 ,  H01R12/58 ,  H05K3/0061 ,  H05K3/44 ,  H05K2201/0382 ,  H05K2201/09554 ,  H05K2201/09745 ,  H05K2201/10401

Abstract: The invention concerns an assembly comprising an electronic card (2) with a printed circuit mounted on a metal substrate (1), and means ensuring said card electrical connection on said substrate (1). The invention is characterised in that said means comprise a cap (4) set in a cavity (3) borne by the metal substrate (1) and extending through a hole (6) in the electronic card (2), said hole (6) edges being metal coated, said cap (4) being soldered to the metal coating (7) on said edges.

Abstract translation: 本发明涉及一种组件，其包括具有安装在金属基板（1）上的印刷电路的电子卡（2），以及确保所述基板（1）上的卡电连接的装置。 本发明的特征在于，所述装置包括设置在由金属基板（1）承载并延伸穿过电子卡（2）中的孔（6）的空腔（3）中的盖（4），所述孔（6） 边缘被金属涂覆，所述盖（4）被焊接到所述边缘上的金属涂层（7）上。

公开(公告)号：WO1996002959A1

公开(公告)日：1996-02-01

申请号：PCT/US1995009201

申请日：1995-07-19

Applicant: TESSERA, INC.

Inventor： TESSERA, INC. ,  DISTEFANO, Thomas, H. ,  SMITH, John, W. ,  KARAVAKIS, Konstantine ,  KOVAK, Zlata ,  FJELSTAD, Joseph

IPC: H01R09/09

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/445 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0382 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: An interposer for interconnection between microelectronic circuit panels (260) has contacts (250) at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad (262) on the engaged circuit panel. Thus, when the circuit panels (260) are compressed with the interposers, the contacts expand radially and wipe across the pads (262). The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material (246) carried on the contacts themselves.

Abstract translation: 用于微电子电路板（260）之间的互连的插入器在其表面具有触点（250）。 每个触点具有垂直于表面的中心轴线，以及适于根据由接合电路板上的焊盘（262）施加的力从中心轴线径向向外扩张的外围部分。 因此，当电路板（260）用插入件压缩时，触头径向膨胀并擦拭穿过焊盘（262）。 擦拭动作有助于将接触件接合到焊盘，如通过接触件本身承载的导电接合材料（246）。

公开(公告)号：EP3095307B1

公开(公告)日：2018-11-28

申请号：EP14783877.5

申请日：2014-10-14

Applicant: Auto-Kabel Management GmbH

Inventor： TAZARINE, Wacim ,  BETSCHER, Simon ,  GRONWALD, Frank

IPC: H05K1/02 ,  H05K1/05 ,  H01L23/367 ,  H05K1/11 ,  H05K1/14

CPC classification number: H05K1/145 ,  C23C14/042 ,  H01L23/142 ,  H01L23/367 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0209 ,  H05K1/056 ,  H05K1/111 ,  H05K1/117 ,  H05K1/142 ,  H05K1/181 ,  H05K1/182 ,  H05K3/28 ,  H05K3/282 ,  H05K3/368 ,  H05K2201/09372 ,  H05K2201/09554 ,  H05K2201/10166 ,  H05K2201/10689 ,  H05K2203/1377 ,  H01L2924/00

公开(公告)号：EP3300464A1

公开(公告)日：2018-03-28

申请号：EP17197530.3

申请日：2009-11-09

Applicant: Nitto Denko Corporation

Inventor： ISHII, Jun ,  NAITOU, Toshiki ,  HONJO, Mitsuru

IPC: H05K1/02 ,  H05K3/46 ,  G11B5/48

CPC classification number: H05K3/4685 ,  G11B5/484 ,  G11B5/486 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/025 ,  H05K1/0265 ,  H05K1/056 ,  H05K3/06 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09627 ,  H05K2201/0979 ,  H05K2203/0323 ,  Y10T29/49155

Abstract: An end of a first line and an end of a second line of a first write wiring pattern are arranged on both sides of a third line of a second write wiring pattern. Circular connection portions are provided at the ends of the first line and the second line. In addition, through holes are formed in respective portions of a base insulating layer below the connection portions. Each connection portion comes in contact with a connecting region of a suspension body within the through hole.

Abstract translation: 第一写入布线图案的第一行的末端和第二行的末端布置在第二写入布线图案的第三行的两侧。 在第一行和第二行的末端提供圆形连接部分。 另外，在连接部分下方的基底绝缘层的各个部分中形成通孔。 每个连接部分与通孔内的悬挂体的连接区域接触。

公开(公告)号：EP3095307A1

公开(公告)日：2016-11-23

申请号：EP14783877.5

申请日：2014-10-14

Applicant: Auto-Kabel Management GmbH

Inventor： TAZARINE, Wacim ,  BETSCHER, Simon ,  GRONWALD, Frank

IPC: H05K1/02 ,  H05K1/05 ,  H01L23/367 ,  H05K1/11 ,  H05K1/14

CPC classification number: H05K1/145 ,  C23C14/042 ,  H01L23/142 ,  H01L23/367 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0209 ,  H05K1/056 ,  H05K1/111 ,  H05K1/117 ,  H05K1/142 ,  H05K1/181 ,  H05K1/182 ,  H05K3/28 ,  H05K3/282 ,  H05K3/368 ,  H05K2201/09372 ,  H05K2201/09554 ,  H05K2201/10166 ,  H05K2201/10689 ,  H05K2203/1377 ,  H01L2924/00

Abstract: Disclosed is a circuit comprising a first printed circuit board (2a) and a second printed circuit board (2b). The first circuit board is provided with a metal supporting board (14) and an insulating layer (8) which electrically insulates the metal supporting board on a surface, the supporting board being without any insulating layer in at least one connection region (10a-10d). The supporting board is metal-coated (12) in the connection region, and a contact (30a) of a semiconductor (30) is electrically contacted on the metal coating of the connection region. The second circuit board is provided with a metal supporting board (2b), an insulator (16) that electrically insulates the metal supporting board (24) on a surface, and a conducting layer (18) that is applied to the insulator. The insulator and the conducting layer have a breakdown region (21) in at least one contact zone, and at least one metal contact pad (20) is arranged in the contact zone in such a way that the contact pad is peripherally disposed at a distance from the insulator and from the conducting layer. The circuit boards in the circuit are separated from one another by an air gap (28) and are mechanically interconnected by at least one power semiconductor device (30).

Abstract translation: 电路具有第一印刷电路板和第二印刷电路板。 在电路中，通过气隙彼此间隔开的印刷电路板通过至少一个功率半导体机械连接在一起。

公开(公告)号：EP2496062A1

公开(公告)日：2012-09-05

申请号：EP12003710.6

申请日：2008-05-19

Applicant: PPG Industries Ohio, Inc.

Inventor： Wang, Alan, E. ,  Olson, Kevin C.

IPC: H05K3/44

CPC classification number: H05K3/44 ,  H05K3/108 ,  H05K3/388 ,  H05K3/445 ,  H05K3/4647 ,  H05K2201/09554 ,  H05K2203/0582 ,  H05K2203/0733 ,  H05K2203/135

Abstract: A method is provided comprising:
- applying a layer of a first conductive material to a substrate having a dielectric coating on a conductive core and conductive vias extending through openings in the dielectric coating;
- plating and patterning the first conductive material, forming a circuitry layer;
- applying a layer of plating resist on the just patterned circuitry layer;
- forming openings in the plating resist to expose areas of the patterned circuitry layer to be plated;
- plating a second conductive material onto the exposed areas of the first conductive material; and
- removing the plating resist.

Abstract translation: 一种方法被提供，其包括： - 将第一材料层具有上的导电芯部和导电通孔通过在所述介电涂层的开口延伸的介电涂层的导电性基板; - 电镀以及图案化所述第一导电材料，形成了一个电路层; - 施加电镀刚刚图案化电路层上的抗蚀剂层; - 在电镀形成开口的抗蚀剂以暴露图案化的电路层的区域被电镀; - 电镀第二导电材料在第一导电材料的暴露区域; 和 - 除去电镀抗蚀剂。

公开(公告)号：EP2163147A2

公开(公告)日：2010-03-17

申请号：EP08755835.9

申请日：2008-05-19

Applicant: PPG Industries Ohio, Inc.

Inventor： OLSON, Kevin C. ,  WANG, Alan E.

IPC: H05K3/46

CPC classification number: H05K3/44 ,  H05K3/108 ,  H05K3/388 ,  H05K3/445 ,  H05K3/4647 ,  H05K2201/09554 ,  H05K2203/0582 ,  H05K2203/0733 ,  H05K2203/135

Abstract: A method is provided comprising: - applying a layer of a first conductive material to a substrate having a dielectric coating on a conductive core and conductive vias extending through openings in the dielectric coating; - plating and patterning the first conductive material, forming a circuitry layer; - applying a layer of plating resist on the just patterned circuitry layer; - forming openings in the plating resist to expose areas of the patterned circuitry layer to be plated; - plating a second conductive material onto the exposed areas of the first conductive material; and - removing the plating resist.