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181.
公开(公告)号:US10020200B1
公开(公告)日:2018-07-10
申请号:US14966165
申请日:2015-12-11
Applicant: Multibeam Corporation
Inventor: Kevin M. Monahan , Theodore A. Prescop , Michael C. Smayling , David K. Lam
IPC: H01L21/3065 , H01L21/02 , H01L21/308 , H01L21/66
CPC classification number: H01L21/3065 , B81C1/00373 , B81C2201/0143 , B81C2201/0188 , C23C14/48 , C23C16/047 , C23C16/48 , C23C16/486 , C23C16/487 , H01J37/05 , H01J37/06 , H01J37/08 , H01J37/228 , H01J37/244 , H01J37/30 , H01J37/304 , H01J37/305 , H01J37/3053 , H01J37/3056 , H01J37/3172 , H01J37/3174 , H01J37/3177 , H01J37/3178 , H01J2237/004 , H01J2237/0635 , H01J2237/1501 , H01J2237/24592 , H01J2237/30466 , H01J2237/30472 , H01J2237/31708 , H01J2237/31732 , H01J2237/31735 , H01J2237/31737 , H01J2237/3174 , H01J2237/31749 , H01L21/0228 , H01L21/0262 , H01L21/26 , H01L21/308 , H01L21/3085 , H01L22/12 , H01L22/20 , H01L22/26
Abstract: Methods and systems for direct atomic layer etching and deposition on or in a substrate using charged particle beams. Electrostatically-deflected charged particle beam columns can be targeted in direct dependence on the design layout database to perform atomic layer etch and atomic layer deposition, expressing pattern with selected 3D-structure. Reducing the number of process steps in patterned atomic layer etch and deposition reduces manufacturing cycle time and increases yield by lowering the probability of defect introduction. Local gas and photon injectors and detectors are local to corresponding columns, and support superior, highly-configurable process execution and control.
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182.
公开(公告)号:US10003014B2
公开(公告)日:2018-06-19
申请号:US14310844
申请日:2014-06-20
Inventor: Michael C. Gaidis , Erwan Gapihan , Rohit Kilaru , Eugene J. O'Sullivan
CPC classification number: H01L43/08 , B81C2201/0132 , B81C2201/0142 , B81C2201/0143 , G11C11/161 , G11C2211/5615 , H01L21/31105 , H01L43/02 , H01L43/10 , H01L43/12
Abstract: A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.
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公开(公告)号:US20180005922A1
公开(公告)日:2018-01-04
申请号:US15630363
申请日:2017-06-22
Applicant: CORNING INCORPORATED
Inventor: Daniel Wayne Levesque, JR. , Garrett Andrew Piech , Aric Bruce Shorey
IPC: H01L23/48 , B81C1/00 , H01L21/268 , H01L21/683 , H01L21/311 , B81B7/00 , H01L21/762 , H01L21/768 , H01L21/306
CPC classification number: H01L23/481 , B81B7/0006 , B81B2207/096 , B81C1/00301 , B81C2201/013 , B81C2201/0143 , B81C2203/031 , H01L21/268 , H01L21/30604 , H01L21/31105 , H01L21/31111 , H01L21/486 , H01L21/6835 , H01L21/76251 , H01L21/76877 , H01L21/76898 , H01L23/49827 , H01L2221/68359
Abstract: A process comprises bonding a semiconductor wafer to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. After the bonding, a damage track is formed in the inorganic wafer using a laser that emits the wavelength of light. The damage track in the inorganic wafer is enlarged to form a hole through the inorganic wafer by etching. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer. An article is also provided, comprising a semiconductor wafer bonded to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. The inorganic wafer has a hole formed through the inorganic wafer. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer.
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公开(公告)号:US20170362082A1
公开(公告)日:2017-12-21
申请号:US15610987
申请日:2017-06-01
Applicant: HITACHI, LTD.
Inventor: Keiji WATANABE , Shuntaro MACHIDA , Katsuya MIURA , Aki TAKEI , Tetsufumi KAWAMURA , Nobuyuki SUGII , Daisuke RYUZAKI
CPC classification number: B81C1/00531 , B05D3/064 , B81C99/0025 , B81C2201/0132 , B81C2201/0136 , B81C2201/0143 , Y10S148/042 , Y10S438/924
Abstract: First, an ion beam is applied to a workpiece to form a tapered hole the side wall of which is inclined. Next, the application of the ion beam is stopped, and then a material gas is introduced from the gas source to the upper surface of the workpiece from an oblique direction to cause gas molecules to be adsorbed to the upper surface of the workpiece and to the upper portion of the side wall of the hole. Next, introduction of the material gas is stopped, and then the ion beam is applied again to the region of the workpiece where the hole is formed. As a result, at the upper portion of the side wall of the hole, film formation occurs using the gas molecules as the material adsorbed to the side wall of the hole, and, at the bottom portion of the hole, etching of the workpiece occurs.
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185.
公开(公告)号:US20170158488A1
公开(公告)日:2017-06-08
申请号:US14958372
申请日:2015-12-03
Applicant: Honeywell International Inc.
Inventor: Gregory C. Brown
CPC classification number: B81B3/0051 , B81B2201/0264 , B81B2203/0127 , B81B2203/0315 , B81C1/00158 , B81C2201/013 , B81C2201/0143 , B81C2203/0118 , G01L9/0047 , G01L9/0054 , G01L9/0055 , G01L19/0618
Abstract: A pressure sensor die assembly comprises a base substrate having a first surface, a stop structure on the first surface, and a diaphragm structure coupled to the first surface. The diaphragm structure comprises a first side with a cavity section including a first cavity and a second cavity surrounding the first cavity; a pressure sensing diaphragm portion having a first thickness and defined by the first cavity; and an over pressure diaphragm portion having a second thickness and defined by the second cavity, the second thickness greater than the first thickness. When an over pressure is applied, at least some area of the pressure sensing diaphragm portion is deflected and supported by the stop structure. As over pressure is increased, the over pressure diaphragm portion deflects and engages with the first surface such that additional area of the pressure sensing diaphragm portion is deflected and supported by the stop structure.
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公开(公告)号:US09656859B2
公开(公告)日:2017-05-23
申请号:US14687943
申请日:2015-04-16
Applicant: David J. Meyer , Brian P. Downey
Inventor: David J. Meyer , Brian P. Downey
IPC: B81C1/00
CPC classification number: B81C1/00539 , B81C1/00936 , B81C2201/0107 , B81C2201/0132 , B81C2201/0143 , B81C2201/0159 , B81C2201/0177
Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.
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公开(公告)号:US20170113919A1
公开(公告)日:2017-04-27
申请号:US15291142
申请日:2016-10-12
Applicant: Robert Bosch GmbH
Inventor: Frank Reichenbach , Till Schade , Jochen Reinmuth , Philip Kappe , Alexander Ilin , Mawuli Ametowobla
CPC classification number: B81B7/0035 , B81B2201/0235 , B81C1/00182 , B81C1/00277 , B81C1/00293 , B81C1/00325 , B81C1/00666 , B81C2201/0132 , B81C2201/0143 , B81C2203/0109 , B81C2203/0145
Abstract: A method is provided for manufacturing a micromechanical component including a substrate and a cap connected to the substrate and together with the substrate enclosing a first cavity, a first pressure prevailing and a first gas mixture with a first chemical composition being enclosed in the first cavity. An access opening, connecting the first cavity to surroundings of the micromechanical component, is formed in the substrate or in the cap. The first pressure and/or the first chemical composition are adjusted in the first cavity. The access opening is sealed by introducing energy and heat into an absorbing part of the substrate or the cap with the aid of a laser. A recess is formed in a surface of the substrate or of the cap facing away from the first cavity in the area of the access opening for reducing local stresses occurring at a sealed access opening.
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公开(公告)号:US20160304340A1
公开(公告)日:2016-10-20
申请号:US14687943
申请日:2015-04-16
Applicant: David J. Meyer , Brian P. Downey
Inventor: David J. Meyer , Brian P. Downey
IPC: B81C1/00
CPC classification number: B81C1/00539 , B81C1/00936 , B81C2201/0107 , B81C2201/0132 , B81C2201/0143 , B81C2201/0159 , B81C2201/0177
Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.
Abstract translation: 一种用于制造悬浮微机电系统(MEMS)结构的方法,其包括部分或完全悬浮在衬底上的外延半导体功能层。 在基板上形成牺牲剥离层和功能元件层。 功能器件层被蚀刻以在功能器件层中形成窗口,其限定要由功能器件层形成的悬置的MEMS器件的轮廓。 然后用选择性释放蚀刻剂蚀刻牺牲剥离层,以去除由窗口限定的区域中的功能层下方的牺牲剥离层,以形成悬浮的MEMS结构。
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189.
公开(公告)号:US20160276579A1
公开(公告)日:2016-09-22
申请号:US15170359
申请日:2016-06-01
Inventor: Michael C. Gaidis , Erwan Gapihan , Rohit Kilaru , Eugene J. O'Sullivan
CPC classification number: H01L43/08 , B81C2201/0132 , B81C2201/0142 , B81C2201/0143 , G11C11/161 , G11C2211/5615 , H01L21/31105 , H01L43/02 , H01L43/10 , H01L43/12
Abstract: A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.
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公开(公告)号:US09302905B1
公开(公告)日:2016-04-05
申请号:US14738980
申请日:2015-06-15
Applicant: Innovative Micro Technology
Inventor: Suresh K Sampath
IPC: H01L21/00 , B81C1/00 , H01L21/027
CPC classification number: B81C1/00412 , B81C2201/0143 , H01L21/0272 , H01L21/32139 , H01L43/12
Abstract: A method for forming a feature in a device layer, including forming a first layer of a liftoff material and a second layer of photoresist over the liftoff material, exposing the photoresist and developing the photoresist and the liftoff layer. The photoresist develops at a slower rate than the liftoff layer. The development results in a first opening in the lift off layer and a second opening in the photoresist layer wherein the first opening is smaller than the second opening because of the different developing rates. The device layer is then dry etched or ion milled through the opening. Subsequent removal of the first layer and second layer leaves a clean surface of the patterned device layer, without the fences that can be formed using other methods.
Abstract translation: 一种用于在器件层中形成特征的方法,包括在剥离材料上形成第一层剥离材料和第二层光致抗蚀剂,暴露光致抗蚀剂并显影光致抗蚀剂和剥离层。 光致抗蚀剂以比剥离层更慢的速率显影。 显影导致剥离层中的第一开口和光致抗蚀剂层中的第二开口,其中由于不同的显影速率,第一开口小于第二开口。 然后将器件层干蚀刻或通过开口离子研磨。 随后去除第一层和第二层离开图案化的器件层的干净的表面,而不需要使用其它方法形成的栅栏。
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