公开(公告)号：JP2000353678A

公开(公告)日：2000-12-19

申请号：JP2000148694

申请日：2000-05-19

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： PANDEY SUMIT ,  JAMIN FEN FEN

IPC: B24B37/04 ,  B24B41/06 ,  B24B57/02 ,  H01L21/304 ,  H01L21/306 ,  B24B37/00

Abstract: PROBLEM TO BE SOLVED: To eliminate variance in quantity and temperature of a slurry which is in contact with the surface of a wafer. SOLUTION: A system for CMP is provided by moving cyclically and relatively an abrasive cloth 42 and a wafer W on a platen 41, and the wafer W is held by an opening 59a of a ring 59, which has a wearing face 59b surrounding the opening 59a. A slurry is supplied to the periphery WP of the wafer in a plurality of channels 61 provided on the wearing face. The ring is fixed on a lower side 58c of a carrier 58, fixed to the bottom of a spindle 56. The carrier is provided with a heat exchanger 65 for heating and cooling the slurry S. The path of the spindle connected with the conduit of the carrier supplies the slurry to the channels and provides a temperature regulating fluid to the heat exchanger and supplies a pressure fluid to the inside of the wafer.

公开(公告)号：JP2000315684A

公开(公告)日：2000-11-14

申请号：JP2000111181

申请日：2000-04-12

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： BUTT SHAHID ,  SCHROEDER UWE PAUL

IPC: H01L21/302 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/311

Abstract: PROBLEM TO BE SOLVED: To provide a method for transferring an image to a surface by using a substrate layer in a front layer imaging lithography. SOLUTION: This method for etching comprises the steps of forming a substrate layer 14 on a surface and a front layer 16 on the layer 14, patterning the front layer to partly expose the substrate layer, forming a layer containing silicon on the exposed portion of the substrate layer, removing the front layer, exposing the substrate layer except a portion which is covered with the silicon layer, and etching the substrate layer except a portion having the silicon layer, thereby causing the surface to be expose.

公开(公告)号：JP2000315381A

公开(公告)日：2000-11-14

申请号：JP2000078940

申请日：2000-03-21

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： GERD FRANKOVSKI

IPC: G11C7/00 ,  G06F5/06 ,  G11C8/04

Abstract: PROBLEM TO BE SOLVED: To generate a pointer including a pointer with almost a same delay concerning a clock. SOLUTION: A pointer generating circuit supplies a clock cycle; a shift register has plural latches for storing data bits; a switch by which a 1st latch receives a flag bit at a 1st clock cycle of the clock and transfers the flag bit to a shift register at the 1st clock cycle connects the last latch to the 1st latch after the flag bit has been transferred to the shift register; the flag bit is transferred to the next latch, and when the next latch is the final one, this latch is made to be a 1st latch, and thus, a pointer signal is generated in each consecutive clock according to the data bit stored in the clock cycle and latch in each clock cycle.

公开(公告)号：JP2000299282A

公开(公告)日：2000-10-24

申请号：JP2000086623

申请日：2000-03-27

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： TOEBBEN DIRK DR ,  LEE GILL YOUNG ,  LU ZHIJIAN

IPC: G03F7/004 ,  G03F7/09 ,  G03F7/11 ,  G03F7/26 ,  H01L21/027

Abstract: PROBLEM TO BE SOLVED: To provide an ARC(antireflection coating) layer which effects more improved CD(critical dimension) control, so as to lessen a resist layer in reflectivity in a lithographic process. SOLUTION: This reduction method is carried out in a manner, where an antireflection coating layer 130 is deposited on a board 130, and a resist layer 170 is deposited on the ARC layer 130, where the ARC layer 130 is composed of a first section 135 and a second section 140, the first section 135 operates in an absorption mode, and the reflectivity of the second section 140 is so set as to reduce the reflectivity difference between the first section 135 and the resist layer 170.

公开(公告)号：JP2000292929A

公开(公告)日：2000-10-20

申请号：JP2000092100

申请日：2000-03-29

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： SCHROEDER UWE PAUL ,  GERHARD KUNKEL ,  ALOIS GUTMAN ,  SPULER BRUNO

IPC: G03F7/075 ,  G03F7/038 ,  G03F7/039 ,  G03F7/40 ,  H01L21/027

Abstract: PROBLEM TO BE SOLVED: To improve the etching resistance of a photoresist used in photolithography. SOLUTION: In the method of producing a photolithographic structure, the photoresist containing a photoactive component that responds to actinic radiation and a base resin having a protected active part is applied to a substrate, patternwise exposed to an effective dose of actinic radiation and exposed to a developer to form a patterned photoresist. The protected active part of the base resin is then made chemically reactive by deprotection, the formed reactive part is allowed to react with a silylating agent containing an etching protective component to incorporate the etching protective component into the structure of the base resin and the substrate is etched to product the objective photolithographic structure.

公开(公告)号：JP2000286693A

公开(公告)日：2000-10-13

申请号：JP2000063779

申请日：2000-03-08

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： HANSON DAVID R ,  MUELLER GERHARD

IPC: G11C11/409 ,  G11C7/10 ,  G11C11/4096 ,  G11C11/41 ,  G11C11/417 ,  H03K19/017 ,  H03K19/0175

Abstract: PROBLEM TO BE SOLVED: To provide an improved driver circuit which can increase a charge rate to attain an operation faster than an IC by increasing the current of the driver output and operating the driver circuit in an increased overdrive mode. SOLUTION: An overdrive sub-circuit 240 includes an overdrive output 248 which is connected to a driver input 273. The offset set to an active control output signal is supplied to the circuit 240 and the circuit 240 generates an active overdrive output signal to increase the level of overdrive voltage. The overdrive voltage represents the difference between the gate-source voltage and the threshold voltage of a driver transistor. The increased overdrive voltage results in the operation of the driver transistor in an increased overdrive mode, thus improving the performance of the driver transistor.

公开(公告)号：JP2000243934A

公开(公告)日：2000-09-08

申请号：JP2000041642

申请日：2000-02-18

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： GRUENING ULRIKE

IPC: H01L21/302 ,  G11C11/413 ,  H01L21/3065 ,  H01L21/8242 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To eliminate the need for critical alignment by forming a sacrifice material at a side wall being extended to the lower portion of the surface of a semiconductor substrate and allowing its one portion to project into a covering material, selectively eliminating the sacrifice material, and then exposing the lower substrate region of the semiconductor substrate while allowing the covering material to remain. SOLUTION: A side wall 22 with a recessed part 24 is formed in a semiconductor substrate 10, the side wall 22 is extended to the lower portion on the surface of a semiconductor substrate 10, a protection layer 32 and a thin covering layer 34 of polycrystalline silicon deposited on the protection layer 32 are formed at the side wall 22. One portion of the protection layer 32 is allowed to project into the covering layer 34, at the same time the protection layer 32 is selectively eliminated, and the covering layer 34 is allowed to remain, thus exposing a lower region on the surface of the semiconductor substrate 10 and hence eliminating the need for critical alignment.

公开(公告)号：JP2000235793A

公开(公告)日：2000-08-29

申请号：JP2000000202

申请日：2000-01-05

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： HANSON DAVID R ,  MUELLER GERHARD

IPC: G11C11/41 ,  G11C7/10 ,  G11C11/409 ,  G11C11/4096 ,  G11C11/417 ,  H03K19/017

Abstract: PROBLEM TO BE SOLVED: To provide a driver circuit in which a charge rate is increased to operate a semiconductor device with a high clock cycle. SOLUTION: A memory chip has plural first sense amplifier 14. The plural first sense amplifiers 14 are multiplexed by MUX16 and connected to a second sense amplifier 24 through global data bus MDQ and bMDQ. The first sense amplifiers detect electric charges from a memory array cell of a memory array, the second sense amplifier 24 translates this charges to a higher level (DOUT), and this high level is expelled by an off-chip driver from a chip. A changing circuit 22 is connected to the global data bus MDQ and bMDQ, and comprises a driver circuit which can charge the global data bus with an increased rate.

公开(公告)号：JP2000231535A

公开(公告)日：2000-08-22

申请号：JP32395199

申请日：1999-11-15

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： FLECK ROD G ,  OBERLAENDER KLAUS ,  BAROR GIGY ,  EDER ALFRED ,  NGUYEN LE TRONG

IPC: G06F9/30 ,  G06F12/00 ,  G06F12/06 ,  G06F13/16

Abstract: PROBLEM TO BE SOLVED: To provide a data processing unit which has a coupling unit for data transfer. SOLUTION: This data processing unit is provided with a register file 8 having plural registers, a memory having plural n-bit input/output ports, a coupling unit for connecting the memory to the register file and a memory address and a selection unit 9 for addressing a memory bank. The coupling unit includes at least a bus which forms 1st and 2nd sub buses and has at least 2n-bit bus width, a 1st coupler for selectively connecting each memory bank or register file to one of the sub buses and a 2nd coupler for connecting the register file or a memory bank to the buses.

公开(公告)号：JP2000228504A

公开(公告)日：2000-08-15

申请号：JP2000028340

申请日：2000-02-04

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： MANDELMAN JACK A ,  LAROSA GIUSEPPE ,  RADENS CARL ,  DIVAKARUNI RAMA ,  GRUENING ULRIKE

IPC: H01L21/76 ,  H01L21/763 ,  H01L21/765 ,  H01L21/8242 ,  H01L27/108

Abstract: PROBLEM TO BE SOLVED: To provide a dynamic random access memory formed at a semiconductor body comprising individual paired memory cell separated each other by a vertical electric isolation trench and separated from a support circuit. SOLUTION: An isolation trench 20, comprising a side wall, upper part, and lower part, encloses the region of a semiconductor body 10 comprising a memory cell. Thus, the paired memory cell is electrically separated each other, while separated from a support circuit which is not in the enclosed region but contained in the semiconductor body. The isolation trench lower-part is filled with a conductive material 14, which material comprises a side wall part which is at least partially separated from the trench lower-part side wall by a first electric insulator and a lower part electrically connecting to the semiconductor body. The isolation trench upper-part is filled with a second electric insulator.