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    11.
    发明专利
    未知

    公开(公告)号：DE69420004D1

    公开(公告)日：1999-09-16

    申请号：DE69420004

    申请日：1994-10-06

    Applicant: IBM

    Inventor： CABRAL CYRIL ,  CLEVENGER LAWRENCE ALFRED ,  D HEURLE FRANCOIS MAX ,  HARPER JAMES MCKELL EDWIN ,  MANN RANDY WILLIAM ,  MILES GLEN LESTER ,  RAKOWSKI DONALD WALTER DOUGLAS

    IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B1/00

    Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.

    12.
    发明专利
    未知

    公开(公告)号：DE2845074A1

    公开(公告)日：1979-05-10

    申请号：DE2845074

    申请日：1978-10-17

    Applicant: IBM

    Inventor： CUOMO JEROME JOHN ,  GAMBINO RICHARD JOSEPH ,  HARPER JAMES MCKELL EDWIN

    IPC: C23F4/00 ,  H01J37/34 ,  H01L21/302 ,  H01L21/3065 ,  C23C15/00

    Abstract: Bombardment some intermetallic compounds above a sufficient target voltage Vo can be used for etching substrates. Etching a substrate located in an evacuated chamber involves bombardment of an intermetallic compound or alloy comprising for example Au, Pt, etc. and a metallic element such as Eu, La, Cs, etc. with ions so that a large flux of negative Au, Pt, etc. ions is produced which etches a substrate located nearby. Such bombardment is achieved by placing an Au, Pt, etc. intermetallic composition target in a sputtering chamber using an argon sputtering gas, located opposite from a substrate. A gold alloy or compound target can be SmAu, EuAu, LaAu, CsAu, etc. The target of Au, Pt, etc. and a rare earth element, etc. is bombarded by sputtering gas atoms excited by RF or D.C. energy, creating negative metal ions by sputtering. Instead of depositing upon the substrate, the negative ions cause a cascade of energetic sputtering gas atoms and metal atoms to etch the substrate surface directly beneath the target as outlined by ground shields. Outside that region negative ion and rare earth metals deposit on the substrate. Bombardment with an ion gun, neutral atoms or energetic particle sources or an ionic molecular source may produce negative ions. A use is ion milling. A target material is useful as a negative ion source of metal B in an intermetallic compound of metals A and B if A has ionization potential IA and B has electron affinity EAB such that IA-EAB > about 3.4 electron volts or if there is a electronegativity difference DELTA X greater than about 2.55.

    13.
    发明专利
    未知

    公开(公告)号：ES2136148T3

    公开(公告)日：1999-11-16

    申请号：ES94115744

    申请日：1994-10-06

    Applicant: IBM

    Inventor： CABRAL CYRIL JR ,  CLEVENGER LAWRENCE ALFRED ,  D HEURLE FRANCOIS MAX ,  HARPER JAMES MCKELL EDWIN ,  MANN RANDY WILLIAM ,  MILES GLEN LESTER

    IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B1/00

    Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.

    14.
    发明专利
    未知

    公开(公告)号：AT183251T

    公开(公告)日：1999-08-15

    申请号：AT94115744

    申请日：1994-10-06

    Applicant: IBM

    Inventor： CABRAL CYRIL JR ,  CLEVENGER LAWRENCE ALFRED ,  D HEURLE FRANCOIS MAX ,  HARPER JAMES MCKELL EDWIN ,  MANN RANDY WILLIAM ,  MILES GLEN LESTER ,  RAKOWSKI DONALD WALTER DOUGLAS

    IPC: C23C20/02 ,  C30B1/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  C30B1/00

    Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10 atoms/cm . The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700 DEG C, and more preferably between about 600-700 DEG C. Optionally, the wafer is annealed following the step of disposing the refractory metal and prior to the step of depositing the precursory metal layer. Preferably, this annealing step is performed at a wafer temperature of at least about 900 DEG C.

    SYSTEM AND METHOD FOR DEFLECTING AND FOCUSING A BROAD PLASMA BEAM
    17.
    发明专利
    SYSTEM AND METHOD FOR DEFLECTING AND FOCUSING A BROAD PLASMA BEAM 未知

    公开(公告)号：DE3171316D1

    公开(公告)日：1985-08-14

    申请号：DE3171316

    申请日：1981-09-09

    Applicant: IBM

    Inventor： CUOMO JEROME JOHN ,  HARPER JAMES MCKELL EDWIN

    IPC: H01J37/08 ,  C23C14/32 ,  H01J37/147 ,  H01J37/30 ,  H01J37/305 ,  H01J37/317 ,  H01L21/302 ,  H01J3/14

    Abstract: A method and system for deflecting a broad ion plasma beam which includes an ion source for forming an ion plasma, an extraction means for extracting a broad ion plasma beam from the ion plasma, and deflection means including a non-grounded surface located in the path of the ion plasam beam and at an angle to the path for deflecting the ion plasma beam to a target material. A grounded, screen grid is located in front of the deflecting means in the path of the ion plasma. The screen grid has openings which permit passage of the ions in the ion plasma, but block passage of the electrons. The plasma beam is deflected by the deflection means and the grounded, screen grid onto the target material for sputter cleaning, deposition and ion milling applications.

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